Patents by Inventor Yi Yang

Yi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155629
    Abstract: Methods, systems, and devices for wireless communications are described. Wireless communications systems may employ one or more scheduling constraints to support efficient utilization of techniques for intra-device handling of overlapping scheduled uplink transmissions (e.g., intra-device dynamic resource cancelation and multiplexing) as well as inter-device handling of overlapping scheduled uplink transmissions (e.g., inter-device dynamic resource cancelation and multiplexing). Scheduling constraints may define how a device may apply intra-device and inter-device multiplexing and cancelation rules for various scenarios. For example, a device may apply intra-UE cancelation rules before inter-device cancelation rules. In some examples, later-received grants or uplink preemption indications (ULPIs) may not change a device's previously established decision to drop an uplink transmission.
    Type: Application
    Filed: January 16, 2024
    Publication date: May 9, 2024
    Inventors: Wei YANG, Kianoush HOSSEINI, Peter GAAL, Wanshi CHEN, Yi HUANG
  • Publication number: 20240155876
    Abstract: Disclosed are a display substrate and a method for manufacturing same, and a display apparatus.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 9, 2024
    Inventors: Lei DENG, Yue WEI, Guoqiang YANG, Wei CUI, Xu YANG, Tinghua SHANG, Yi ZHANG, Tingliang LIU, Huijuan YANG, Huiyang YU, Wei ZHANG, Xiaoliang GUO
  • Publication number: 20240150832
    Abstract: The present disclosure provides a reagent for detecting an expression level of a human histamine receptor HRH4 mRNA, a kit and a detection method. In the present disclosure, the reagent includes a specific primer and a probe for a human histamine receptor HRH4, the specific primer includes an HRH4-F and an HRH4-R, and the probe includes an H4-Probe; and the HRH4-F has a nucleotide sequence shown in SEQ ID NO. 1, the HRH4-R has a nucleotide sequence shown in SEQ ID NO. 2 and the H4-Probe has a nucleotide sequence shown in SEQ ID NO. 3. In the present disclosure, a kit for one-step detection and a detection method based on the reagent are prepared, and the expression level of the HRH4 mRNA can be one-step quantitatively detected with simple operation and short detection time.
    Type: Application
    Filed: August 4, 2021
    Publication date: May 9, 2024
    Inventors: Shandong WU, Yi LIU, Zhoujie WU, Xuehan JIANG, Xukai YANG, Meijie WANG, Weiyue CAI
  • Publication number: 20240154215
    Abstract: An aluminum plastic film for a lithium battery and a method for manufacturing the same are provided. The method includes steps as follows: preparing a polyolefin adhesive; coating the polyolefin adhesive onto one surface of an aluminum foil layer; disposing an inner polyolefin layer onto the polyolefin adhesive; and drying the polyolefin adhesive, so that a polyolefin adhesive layer is formed between the aluminum foil layer and the inner polyolefin layer. Components of the polyolefin adhesive include a modified polyolefin polymer and a hardener. The modified polyolefin polymer has a modified group, a structure of the modified group contains maleic anhydride, and a molecular weight of the modified polyolefin polymer ranges from 100,000 g/mol to 200,000 g/mol.
    Type: Application
    Filed: February 17, 2023
    Publication date: May 9, 2024
    Inventors: TE-CHAO LIAO, SHIOU-YEH SHENG, TENG-KO MA, CHING-YAO YUAN, Chao-Hsien Lin, CHIA-YU LIN, YUN-BIN HSI, HAN-YI LEE, SHUN-CHIEH YANG
  • Publication number: 20240153430
    Abstract: A method for compensating display of a spliced screen, including: obtaining a picture to be displayed; obtaining a theoretical brightness gain of at least one sub-display region in a plurality of sub-display regions; obtaining an actual brightness gain of the central region according to the theoretical brightness gain of at least part of the sub-display regions, and obtaining actual brightness gains of a plurality of first nodes in the non-central region according to the theoretical brightness gain of at least part of the sub-display regions; obtaining an actual brightness gain of at least part of the non-central region by using a bilinear interpolation method according to the actual brightness gains of the plurality of first nodes and an actual brightness gain of at least one second node on the central region; and compensating the picture to be displayed based on an actual brightness gain of the picture to be displayed.
    Type: Application
    Filed: December 30, 2021
    Publication date: May 9, 2024
    Inventors: Mingi CHU, Ying HAN, Fei YANG, Lirong WANG, Yi CHEN, Yu WANG, Jingbo XU, Pan LI
  • Publication number: 20240154467
    Abstract: Provided are a shielding module for wireless charging and a wireless charging apparatus, which belong to the field of wireless charging technology. The shielding module for wireless charging includes a tray, a plurality of ferrites and a colloid, where the tray has a bottom wall and an annular sidewall connected to an edge of the bottom wall, the sidewall and the bottom wall form an accommodation groove therebetween, the plurality of ferrites are arranged in the accommodation groove and completely accommodated in the accommodation groove, the colloid is filled in the accommodation groove in a potting manner and filled between the ferrites and the bottom wall, and the tray and the ferrites are integrally formed through the colloid.
    Type: Application
    Filed: February 7, 2023
    Publication date: May 9, 2024
    Applicant: Lanto Electronic Limited
    Inventors: Hui ZHANG, Yi ZHOU, Yanlei YANG, Junyun ZHANG
  • Publication number: 20240151661
    Abstract: A radiographic inspection apparatus and a vehicle-mounted security inspection system. The radiographic inspection apparatus includes a scanning device, where the scanning device includes: an upright framework; a slip ring rotatably provided on the upright framework; and a locking mechanism. The locking mechanism includes: a driving mechanism provided on the upright framework; and a contact portion provided on the driving mechanism to come into contact with an outer ring of the slip ring under a driving of the driving mechanism, so as to prevent the slip ring from rotating relative to the upright framework.
    Type: Application
    Filed: January 14, 2022
    Publication date: May 9, 2024
    Inventors: Li ZHANG, Zhiqiang CHEN, Qingping HUANG, Mingzhi HONG, Yi CHENG, Minghua QIU, Yao ZHANG, Jianxue YANG, Lei ZHENG
  • Patent number: 11978663
    Abstract: A semiconductor structure includes a first dielectric layer, a first metallic feature over the first dielectric layer, an air gap over the first dielectric layer and adjacent to the first metallic feature, a second dielectric layer disposed above the air gap and on a sidewall of the first metallic feature, and a third dielectric layer disposed above the air gap and on a sidewall of the second dielectric layer. A lower portion of the first metallic feature is exposed in the air gap. The third and the second dielectric layers are substantially co-planar.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Lung Chung, Shin-Yi Yang, Ming-Han Lee
  • Patent number: 11976961
    Abstract: A transfer impedance calibration device for transducers based on spatial frequency domain smoothing technology is provided. The calibration device comprises a signal transmitter, a power amplifier, a transducer pair, a measurement amplifier, a signal collector, a measurement processor and a current sampler. The device extracts acoustic channel information through the sound filed spatial information or measurement method to design a spatial domain smoothing filter, and then comprehensively processes the transmitted current signal and the received signal through the spatial frequency domain smoothing technology to obtain the transfer impedance of the transducer pair.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: May 7, 2024
    Assignee: Zhejiang University
    Inventors: Yi Chen, Liuqing Yang, Xiaofeng Jin, Guanghui Jia, Han Zhao
  • Patent number: 11977705
    Abstract: A touch event processing circuit includes receiving circuits and an average circuit. Each of the receiving circuits includes an operation amplifier, a current processing circuit, and a touch event detection circuit. The operation amplifier receives an input signal from a touch panel, and outputs a first current signal and a second current signal. The current processing circuit processes the first current signal and the second current signal according to a first current average signal and a second current average signal, to generate a processed current signal. The touch event detection circuit detects a touch event according to the processed current signal. The average circuit receives first current signals and second current signals from the receiving circuits; performs an average operation upon the first current signals, to generate the first current average signal; and performs an average operation upon the second current signals, to generate the second current average signal.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: May 7, 2024
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Jia-Ming He, Yaw-Guang Chang, Yi-Yang Tsai
  • Patent number: 11979239
    Abstract: Aspects of the present disclosure relate to wireless communications, and more particularly, to mechanisms for using block acknowledgments to acknowledge semi-persistently scheduled (SPS) occasions from multiple SPS configurations. An example method generally includes identifying a slot or subslot scheduled for reporting acknowledgment feedback for an SPS physical downlink shared channel (PDSCH). The method identifies that one or more symbols of the identified slot or subslot that are scheduled to transmit a physical uplink control channel (PUCCH) containing the acknowledgment feedback are semi-static flexible symbols. The method further monitors for a dynamic slot format indicator (SFI) dynamically configuring one or more of the semi-static flexible symbols of the slot or subslot as downlink, uplink, or flexible. The method then decides whether to report the acknowledgment feedback in the scheduled slot or subslot, in a subsequent slot or subslot, or both, based on the monitoring.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: May 7, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Jing Sun, Yi Huang
  • Patent number: 11977783
    Abstract: A method for performing data access control of a memory device with aid of a predetermined command and associated apparatus are provided. The method may include: utilizing the memory controller to receive a first single command from a host device through a transmission interface circuit of the memory controller; and in response to the first single command conforming to a predetermined format of the predetermined command, utilizing the memory controller to perform a series of operations according to the first single command, wherein the first single command represents a first duplicate command, for duplicating from a first source logical address to a first destination logical address. The series of operations may include: reading first data at the first source logical address; and writing the first data at the first destination logical address.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: May 7, 2024
    Assignee: Silicon Motion, Inc.
    Inventor: Tzu-Yi Yang
  • Patent number: 11980043
    Abstract: A metal mask and an inspecting method thereof are provided for improving quality standard detection. The metal mask has a first and a second long side and plural pattern regions. The method includes the followings steps Based on the pattern regions adjacent to the first and second long sides, a first and a second reference straight line adjacent to the first and second long sides respectively are defined. Then, a first maximum offset length between the pattern regions and the first reference straight line is measured. A second maximum offset length between the pattern regions and the second reference straight line is measured. When a difference between the first and second maximum offset lengths is less than or equal to 20 ?m, the metal mask is determined to meet an inspecting standard.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: May 7, 2024
    Assignee: DARWIN PRECISIONS CORPORATION
    Inventors: Yun-Pei Yang, Mei-Lun Li, Wen-Yi Lin
  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Publication number: 20240145246
    Abstract: Embodiments of the present technology include semiconductor processing methods. The methods may include providing a silicon-containing precursor and a dopant precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the semiconductor processing chamber. A silicon-containing material may be formed on the substrate. The methods may include contacting the silicon-containing material with the silicon-containing precursor and the dopant precursor. The methods may include forming a doped silicon-containing material on the silicon-containing material. The methods may include oxidizing the substrate. The oxidizing may form an oxidized doped silicon-containing material. The methods may include etching the oxidized doped silicon-containing material.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Yi Yang, In Soo Jung, Sean S. Kang, Srinivas D. Nemani, Papo Chen, Ellie Y. Yieh
  • Publication number: 20240145554
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure, the method includes forming a buffer layer over a substrate. An active layer is formed on the buffer layer. A top electrode is formed on the active layer. An etch process is performed on the buffer layer and the substrate to define a plurality of pillar structures. The plurality of pillar structures include a first pillar structure laterally offset from a second pillar structure. At least portions of the first and second pillar structures are spaced laterally between sidewalls of the top electrode.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: Yao-Chung Chang, Chun Lin Tsai, Ru-Yi Su, Wei Wang, Wei-Chen Yang
  • Publication number: 20240145581
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN, Zheng-Yang PAN, Cheng-Po CHAU, Pin-Chu LIANG, Hung-Yao CHEN, De-Wei YU, Yi-Cheng LI
  • Publication number: 20240145919
    Abstract: An antenna module includes a first metal plate and a frame body. The frame body surrounds the first metal plate. The frame body includes a first antenna radiator, a second antenna radiator, a third antenna radiator, a first breakpoint and a second breakpoint. The first antenna radiator includes a first feeding end and excites a first frequency band. The second antenna radiator includes a second feeding end and excites a second frequency band. The third antenna radiator includes a third feeding end and excites a third frequency band. The first breakpoint is located between the first antenna radiator and the second antenna radiator. The second breakpoint is located between the second antenna radiator and the third antenna radiator. An electronic device including the above-mentioned antenna module is also provided.
    Type: Application
    Filed: September 6, 2023
    Publication date: May 2, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Shih-Keng Huang, Chao-Hsu Wu, Chih-Wei Liao, Sheng-Chin Hsu, Hao-Hsiang Yang, Tse-Hsuan Wang
  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Patent number: D1025930
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: May 7, 2024
    Assignee: EMOMO TECHNOLOGY CO., LTD.
    Inventors: Wei Zhou, Wenji Tang, Jing Song, Yushu Zhao, Xiaolian Zhou, Zhigang Wang, Jun Yang, Qishuang Lu, Juntao Chen, Yi Wang