Patents by Inventor Yi Yang

Yi Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250107334
    Abstract: A display substrate and a manufacturing method therefor, and a display device. In the display substrate at least one of a plurality of sub-functional film layers in a light-emitting functional layer is disconnected at the positions where the pixel partition structures are located. Each pixel partition structure includes a first subpixel partition part, a second subpixel partition part, and a third subpixel partition part that are stacked in a direction perpendicular to the base substrate. The second subpixel partition part includes a plurality of sub-partition layers stacked in the direction perpendicular to the base substrate. The first subpixel partition part is provided, in an arrangement direction of two adjacent subpixels, with a first protrusion going beyond at least one sub-partition layer. The third subpixel partition part is provided, in the arrangement direction of two adjacent subpixels, with a second protrusion going beyond at least one sub-partition layer.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 27, 2025
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoliang GUO, Wuyang ZHAO, Yi ZHANG, Zhongfei DONG, Chengbao QIN, Li XIONG, Wei ZHANG, Donghua JIANG, Liang SONG, Long JIANG, Jianbo YANG, Yanwei LU
  • Publication number: 20250105163
    Abstract: A semiconductor chiplet device includes a first die, a second die, a decoupling circuit and an interposer. The interposer includes a plurality of power traces and a plurality of ground traces. The first die and the second die are arranged on a first side of the interposer according to a configuration direction, and are coupled to the power traces and the ground traces. The decoupling circuit is arranged on a second side of the interposer, and is coupled to the power traces and the ground traces. The power traces and the ground traces are staggered with each other, and an extending direction of the ground traces and the power traces is the same as the configuration direction.
    Type: Application
    Filed: March 20, 2024
    Publication date: March 27, 2025
    Inventors: Liang-Kai CHEN, Chih-Chiang HUNG, Wen-Yi JIAN, Yuan-Hung LIN, Sheng-Fan YANG
  • Publication number: 20250101362
    Abstract: The invention proposes a high-pressure environment biological enrichment and spray-type solid isolation and cultivation device, including a spray-type isolation and cultivation solid unit, and a biological enrichment unit. In the case of constructing a high-pressure, low-temperature environment consistent with the marine environment, the biological enrichment unit is used to realize enrichment and multi-stage purification process of marine microorganisms, obtain a biological enrichment fluid and inject the biological enrichment fluid into the spray-type isolation and cultivation solid unit; and the spray-type isolation and cultivation solid unit is use to convert the biological enrichment fluid into a state of microbeads, so that the biological enrichment fluid can be isolated and cultivated in a dispersed state.
    Type: Application
    Filed: March 30, 2022
    Publication date: March 27, 2025
    Applicants: GUANGDONG LABORATORY OF SOUTHERN OCEAN SCIENCE AND ENGINEERING (GUANGZHOU), GUANGDONG UNIVERSITY OF TECHNOLOGY
    Inventors: Jingchun FENG, Si ZHANG, Zhifeng YANG, Yi WANG, Yanpeng CAI, Song ZHONG
  • Publication number: 20250106483
    Abstract: Provided in the present disclosure are a video generation method and apparatus, and a device and a storage medium. The method includes: firstly, when an application request for a target effect object has been received, acquiring location information of the current user; then, on the basis of the location information of the current user, determining a target place of interest (POI) corresponding to the current user; acquiring an effect resource of the target POI, and on the basis of the location information of the current user and location information of the target POI, determining a direction relationship between the current user and the target POI; on the basis of the direction relationship, displaying, on a photographic page, a photographic effect corresponding to the effect resource; and then on the basis of the photographic effect corresponding to the effect resource, generating a result video corresponding to the target effect object.
    Type: Application
    Filed: January 3, 2023
    Publication date: March 27, 2025
    Inventors: Jingjie CHEN, Tianyang XU, Siyao YANG, Weikai LI, Zihao CHEN, Changhao OU, Yixin ZHAO, Yiling CHEN, Sang Hyup LEE, Yi YUE, Jie LIAO, Shengchuan SHI, Zixiong ZHANG, Quan WANG, Jian SUN, Aoyu WANG
  • Publication number: 20250107454
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on a first sidewall of the MTJ, and a second spacer on a second sidewall of the MTJ. Preferably, the first spacer and the second spacer are asymmetric, the first spacer and the second spacer have different heights, and a top surface of the MTJ includes a reverse V-shape.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ying-Cheng Liu, Yi-An Shih, Yi-Hui Lee, Chen-Yi Weng, Chin-Yang Hsieh, I-Ming Tseng, Jing-Yin Jhang, Yu-Ping Wang
  • Patent number: 12262611
    Abstract: Disclosed are a display panel and a display device. The display panel comprises: a base substrate, a plurality of scanning lines, a first insulating layer, a plurality of data lines, an interlayer insulating layer, and an auxiliary power line. The auxiliary power line comprises: a plurality of sub-auxiliary power lines and a plurality of auxiliary conduction lines; the plurality of sub-auxiliary power lines are arranged in a first direction and extend in a second direction, and two sub-auxiliary power lines that are at least partially adjacent are electrically connected by means of at least one auxiliary conduction line; the orthographic projection of at least one of the plurality of auxiliary conduction lines on the base substrate does not overlap the orthographic projections of the scanning lines on the base substrate.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: March 25, 2025
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Huijun Li, Tingliang Liu, Tinghua Shang, Huijuan Yang, Lulu Yang, Xiaofeng Jiang, Yi Qu, Xin Zhang, Meng Zhang, Junxi Wang, Siyu Wang, Lu Bai, Jie Dai, Hao Zhang, Yu Wang, Mengqi Wang
  • Patent number: 12260816
    Abstract: Provided are a pixel circuit, a driving method and a display apparatus, including: a light emitting device; a driving transistor, configured to produce a current for driving the light emitting device to emit light according to a data voltage; a voltage control circuit, coupled to the driving transistor, wherein the voltage control circuit is configured to reset the driving transistor (M0) and input the data voltage in response to a loaded signal; and a light emitting control circuit, coupled to the driving transistor and the light emitting device, wherein the light emitting control circuit is configured to provide the current produced by the driving transistor to the light emitting device; wherein a frequency of resetting the driving transistor is not less than a frequency of inputting the data voltage.
    Type: Grant
    Filed: January 29, 2022
    Date of Patent: March 25, 2025
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yi Zhang, Ming Hu, Huijuan Yang, Tingliang Liu, Kai Zhang, Haijun Qiu, Youngyik Ko, Tinghua Shang, Biao Liu
  • Patent number: 12258477
    Abstract: Silicon-substituted rhodamine compounds are disclosed herein. Also described herein are SiR dyes comprising at least one vinyl group attached to the Si atom (10 position) of the SiR dye. Derivatives, functionalized versions, conjugates, kits, related synthetic methods and uses of SiR compounds also are provided. Silicon-rhodamine (SiR) dyes can provide bright fluorescence at far red wavelengths and exhibit good photostability. The compounds described herein can be useful for fluorescent labeling and detection of biological samples.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: March 25, 2025
    Assignee: Life Technologies Corporation
    Inventors: Jongtae Yang, Xin Wang, Yi-Zhen Hu, Kyle Gee, Aimei Chen, Aleksey Rukavishnikov
  • Patent number: 12262378
    Abstract: This disclosure provides systems, methods, and devices for wireless communication that support sub-slot based Type-1 hybrid automatic repeat request (HARQ) feedback codebook generation. In aspects, techniques are provided for generating a set of candidate physical downlink shared channel (PDSCH) reception occasions for an active bandwidth part (BWP) of a downlink (DL) serving cell. In aspects, a user equipment (UE) obtains a set of UL sub-slots based, at least in part, on a set of K1 values, and then determines, for each UL sub-slot in the set of UL sub-slots, whether the UL sub-slots satisfy a predetermined overlapping condition with a current DL slot. A PDSCH reception occasions set is generated based, at least in part, on a set of time domain resource allocation (TDRA) candidates of the current DL slot and a determination that a current UL sub-slot satisfies the predetermined overlapping condition with the current DL slot.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: March 25, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Yi Huang, Konstantinos Dimou
  • Patent number: 12262369
    Abstract: Techniques related to multiplexing uplink control information (UCI) onto a multi-transport block (TB) physical uplink shared channel (PUSCH) transmission are disclosed. Some aspects of the disclosure relate to devices and methods for wireless communication where a user equipment (UE) receives an uplink grant for a PUSCH transmission having a plurality of TBs, each being associated with a respective TB priority index. The UE then transmits the PUSCH including the plurality of TBs. The UE may further transmit a plurality of UCIs multiplexed with the PUSCH, where each UCI is associated with a respective UCI priority index. Other aspects, embodiments, and features are also claimed and described.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: March 25, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Wei Yang, Yu Zhang, Yi Huang, Peter Gaal
  • Publication number: 20250095909
    Abstract: A vertically-wound inductor and a method for fabricating the same are provided. The vertically-wound inductor includes an inductor body, a coil, a first external electrode, a second external electrode and an intermediate layer. The coil includes a first coil portion and a second coil portion that are arranged opposite to each other and have a first gap therebetween. The first external electrode and the second external electrode are arranged on an outer surface of the inductor body, the first external electrode is connected to the first coil portion, and the second external electrode is connected to the second coil portion. The intermediate layer is located in the first gap and has a through hole. The first coil portion is connected to the second coil portion, and a direction of a central magnetic field is parallel to an arrangement direction of the first and second external electrodes.
    Type: Application
    Filed: September 16, 2024
    Publication date: March 20, 2025
    Inventors: SHU-PU YANG, SHOU-YI TSAO, WEN-HUI CHANG
  • Publication number: 20250096705
    Abstract: A multiphase motor driving circuit includes: a power stage circuit; and a control circuit. In a motor braking mode, when a holding voltage is less than the first voltage threshold, a first sub-mode is entered, in which the control circuit controls at least a portion of switches in the power stage circuit with a pulse width modulation (PWM) signal to switch periodically, thereby converting a back electromotive force (EMF) of a multiphase motor into the holding voltage to supply power to the control circuit. In the motor braking mode, when the holding voltage is greater than the second voltage threshold, a second sub-mode is entered, in which the control circuit controls at least a portion of switches in the power stage circuit with the PWM signal to keep them continuously conductive, thereby consuming the back EMF of the multiphase motor to reduce a speed of the multiphase motor.
    Type: Application
    Filed: September 7, 2024
    Publication date: March 20, 2025
    Inventors: I-Chi Lin, Hao-Che Ma, Yuan-Hsun Chang, Jong-Ruey Yang, Chang-Yi Lin
  • Publication number: 20250098259
    Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The method includes forming a first fin structure and a second fin structure from a substrate, depositing a first conformal layer over the first and second fin structures and between the first and second fin structures, depositing a second conformal layer on the first conformal layer, depositing a third conformal layer on the second conformal layer, depositing a fourth conformal layer on the third conformal layer, depositing a first insulating material on the fourth conformal layer between the first and second fin structures, and depositing a second insulating material on the first insulating material. The first and second fin structures are embedded by the second insulating material. The method further includes removing portions of the second insulating material and the first, second, third, and fourth conformal layers to expose the first and second fin structures.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Inventors: Ya-Wen CHIU, Yi-Hua CHENG, Szu-Ying CHEN, Zheng-Yang PAN
  • Publication number: 20250096950
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive an indication to retransmit a hybrid automatic repeat request acknowledgement (HARQ-ACK). The HARQ-ACK corresponds to a HARQ-ACK transmission type of a set of HARQ-ACK transmission types, the set comprising two or more of: first HARQ-ACK information, second HARQ-ACK information, and third HARQ-ACK information. In some examples, the first HARQ-ACK information may correspond to a retransmitted HARQ-ACK codebook, the second HARQ-ACK information may correspond to a standard HARQ-ACK, and the third HARQ-ACK information may correspond to a deferred SPS HARQ-ACK. The UE may transmit a HARQ-ACK transmission including a concatenation of at least two HARQ-ACK transmission types of the set of HARQ-ACK transmission types. Numerous other aspects are described.
    Type: Application
    Filed: December 5, 2024
    Publication date: March 20, 2025
    Inventors: Wei YANG, Konstantinos DIMOU, Yi HUANG
  • Publication number: 20250096140
    Abstract: An interconnect structure, along with methods of forming such, are described. The structure includes a dielectric layer, a conductive feature disposed in the dielectric layer, and a conductive layer disposed over the dielectric layer, wherein the conductive layer includes a first portion and a second portion adjacent the first portion. The structure also includes a first barrier layer in contact with the first portion of the conductive layer, a second barrier layer in contact with the second portion of the conductive layer, and a dielectric material disposed between and in contact with the first and second barrier layers, wherein a bottom surface of the second barrier layer and a bottom surface of the dielectric material are substantially co-planar.
    Type: Application
    Filed: September 17, 2023
    Publication date: March 20, 2025
    Inventors: Hsien-Chang WU, Shih-Kang FU, Shin-Yi YANG, Gary LIU, Ting-Ya LO, Ming-Han LEE
  • Publication number: 20250096522
    Abstract: An optoelectronic device includes a first substrate, a second substrate, a photonic integrated circuit, and a laser diode. The second substrate is over the first substrate. The photonic integrated circuit is disposed on the first substrate and includes a first waveguide channel, a second waveguide channel, and a patterned structure. The first waveguide channel and the second waveguide channel are coupled to the patterned structure. The laser diode is disposed on the second substrate and configured to emit a light beam toward the patterned structure.
    Type: Application
    Filed: September 19, 2024
    Publication date: March 20, 2025
    Applicant: AuthenX Inc.
    Inventors: Sheng-Fu LIN, Po-Kuan SHEN, Yi-Ting LU, Chu-Ching TSAI, Jenq-Yang CHANG, Mao-Jen WU
  • Publication number: 20250098296
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.
    Type: Application
    Filed: November 27, 2024
    Publication date: March 20, 2025
    Inventors: Jing-Yi Lin, Chih-Chuan Yang, Shih-Hao Lin
  • Publication number: 20250098051
    Abstract: A light-emitting device driving circuit includes: a voltage conversion circuit, at least one light-emitting device, a current driving circuit, and a controller. Any light-emitting device and the current driving circuit are coupled in series between an output terminal and a ground terminal of the voltage conversion circuit. The controller is configured to output a first control signal to the current driving circuit, the current driving circuit is configured to provide a predetermined current for a first light-emitting device based on the first control signal, the controller is configured to output a second control signal to the voltage conversion circuit based on an electrical parameter on a path on which the first light-emitting device and the current driving circuit are located, and the voltage conversion circuit is configured to adjust a voltage at the output terminal of the voltage conversion circuit based on the second control signal.
    Type: Application
    Filed: June 29, 2022
    Publication date: March 20, 2025
    Inventors: Sulin Yang, Yi Xi
  • Patent number: 12255533
    Abstract: A power converter includes a high side switch, a low side switch, a low side driver, a loading detector, a configurable regulator and a high side driver. The low side driver generates a low side drive signal to control the low side switch. The configurable regulator generates a regulation voltage, a magnitude of which is greater when the loading detector detects that the power converter has light loading than when the loading detector detects that the power converter has heavy loading. The high side driver generates a high side drive signal that switches between the input voltage and the regulation voltage to control the high side switch.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: March 18, 2025
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yi-Meng Lan, Yung-Chou Lin, Tuo-Kuang Chen, Chih-Yang Kang
  • Patent number: 12253957
    Abstract: A method of handling trim commands in a flash memory is provided. The method comprises: receiving a trim command; modifying logical-to-physical (L2P) address mapping entries of a L2P address mapping table according to the trim command; and storing trim information of the trim command into one of data blocks of the flash memory after modifying the L2P address mapping entries according to the trim command.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: March 18, 2025
    Assignee: Silicon Motion, Inc.
    Inventor: Tzu-Yi Yang