Patents by Inventor Yin To Chiu

Yin To Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10411018
    Abstract: Various embodiments provide semiconductor structures and their fabrication methods. An SRAM memory cell can include at least one semiconductor structure, and an SRAM memory can include at least one SRAM memory cell. An exemplary semiconductor structure can include at least two adjacent transistors formed on a semiconductor substrate. An opening can be formed and surrounded by gates of the two adjacent transistors and a doped region formed between the gates of the two adjacent transistors. A conductive layer can be formed to at least partially cover a bottom and a sidewall of the opening to electrically connect a gate of one transistor with the doped region of the other transistor of the two adjacent transistors.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: September 10, 2019
    Assignee: Semiconductor Manufacturing International Corp.
    Inventors: Tzu-Yin Chiu, Juilin Lu, Jianxiang Cai
  • Publication number: 20190252422
    Abstract: The present disclosure relates to the technical field of semiconductors, and discloses an image sensor and a manufacturing method therefor. The image sensor includes: a semiconductor substrate; a first active region located on the semiconductor substrate; a doped semiconductor layer located on the first active region; and a contact located on the semiconductor layer, where the first active region includes: a first doped region and a second doped region abutting against the first doped region, wherein the second doped region is located at an upper surface of the first active region, and wherein the second doped region is formed by dopants in the semiconductor layer that are annealed to be diffused to a surface layer of the first doped region. The present disclosure may reduce leakage current and improve device performances.
    Type: Application
    Filed: April 23, 2019
    Publication date: August 15, 2019
    Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Tzu Yin CHIU, Chong Wang, Haifang Zhang, Xuanjie Liu
  • Patent number: 10359423
    Abstract: Disclosed herein are devices and methods that use aqueous two phase systems and lateral flow assays to detect target analytes in a sample. These devices and methods may be used to diagnose a disease or condition in a biological sample, such as blood or serum. In addition, these devices and methods may be used to detect allergens in a food samples or contaminants, such as environmental toxins, in water samples. Device and kit components may be conveniently assembled in a portable container and are amenable to actuation in most settings. The devices are simple to use, requiring a non-trained operator to simply add the sample to the device. Conveniently, the time it takes to detect the target analyte is very short. Thus, the devices and methods disclosed herein provide novel and useful means for point-of-care.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: July 23, 2019
    Assignee: The Regents of the University of California
    Inventors: Daniel T. Kamei, Yin To Chiu, Benjamin M. Wu, Garrett L. Mosley
  • Publication number: 20190033308
    Abstract: Disclosed herein are devices and methods that use aqueous two phase systems and lateral flow assays to detect target analytes in a sample. These devices and methods may be used to diagnose a disease or condition in a biological sample, such as blood or serum. In addition, these devices and methods may be used to detect allergens in a food samples or contaminants, such as environmental toxins, in water samples. Device and kit components may be conveniently assembled in a portable container and are amenable to actuation in most settings. The devices are simple to use, requiring a non-trained operator to simply add the sample to the device. Conveniently, the time it takes to detect the target analyte is very short. Thus, the devices and methods disclosed herein provide novel and useful means for point-of-care.
    Type: Application
    Filed: May 25, 2018
    Publication date: January 31, 2019
    Inventors: Daniel T. Kamei, Yin To Chiu, Benjamin M. Wu, Garrett L. Mosley
  • Publication number: 20180259521
    Abstract: In various embodiments devices and methods for the detection and/or quantification of clinically relevant pathogens (e.g., bacteria, fungi, viruses, etc.) are provided. In certain embodiments the device comprises a lateral-flow assay that detects the bacterium at a concentration of less than about 6×106 cells/mL, less than about 3×106 cells/ml, less than about 1×106 CFU/mL, or less than about 50 ?g/mL. In certain embodiments the device comprises an aqueous two-phase system (ATPS) comprising a mixed phase solution that separates into a first phase solution and a second phase solution; and a lateral-flow assay (LFA). In certain embodiments the device comprises a flow-through system comprising a concentration component comprising an aqueous two-phase system (ATPS) comprising a mixed phase solution that separates into a first phase solution and a second phase solution; and a detection component disposed beneath said concentration component.
    Type: Application
    Filed: September 2, 2016
    Publication date: September 13, 2018
    Inventors: Daniel T. Kamei, Yin To Chiu, Benjamin M. Wu, Garrett L. Mosley
  • Patent number: 10062704
    Abstract: A method is provided for fabricating a buried-channel MOSFET and a surface-channel MOSFET of the same type and different gate electrodes on a same wafer. The method includes providing a semiconductor substrate having a well area and a plurality of shallow trench isolation structures; forming a threshold implantation region doped with impurity ions opposite of that of the well area in the well area for the buried-channel MOSFET; forming a gate structure including a gate dielectric layer and a gate electrode on the semiconductor substrate, wherein the gate electrode of the buried-channel MOSFET is doped with impurity ions with a same type as that of the well area, and the gate electrode of the surface-channel MOSFET is doped with impurity ions with a type opposite of that of the well area; and forming source and drain regions in the semiconductor substrate at both sides of the gate structure.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: August 28, 2018
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Tzu Yin Chiu, Clifford Ian Drowley, Leong Tee Koh, Yu Lei Jiang, Da Qiang Yu
  • Patent number: 10006911
    Abstract: Disclosed herein are devices and methods that use aqueous two phase systems and lateral flow assays to detect target analytes in a sample. These devices and methods may be used to diagnose a disease or condition in a biological sample, such as blood or serum. In addition, these devices and methods may be used to detect allergens in a food samples or contaminants, such as environmental toxins, in water samples. Device and kit components may be conveniently assembled in a portable container and are amenable to actuation in most settings. The devices are simple to use, requiring a non-trained operator to simply add the sample to the device. Conveniently, the time it takes to detect the target analyte is very short. Thus, the devices and methods disclosed herein provide novel and useful means for point-of-care.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: June 26, 2018
    Assignee: The Regents of the University of California
    Inventors: Daniel T. Kamei, Yin To Chiu, Benjamin M. Wu, Garrett L. Mosley
  • Publication number: 20180175082
    Abstract: The present disclosure relates to the technical field of semiconductors, and discloses an image sensor and a manufacturing method therefor. The image sensor includes: a semiconductor substrate; a first active region located on the semiconductor substrate; a doped semiconductor layer located on the first active region; and a contact located on the semiconductor layer, where the first active region includes: a first doped region and a second doped region abutting against the first doped region, wherein the second doped region is located at an upper surface of the first active region, and wherein the second doped region is formed by dopants in the semiconductor layer that are annealed to be diffused to a surface layer of the first doped region. The present disclosure may reduce leakage current and improve device performances.
    Type: Application
    Filed: November 22, 2017
    Publication date: June 21, 2018
    Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Tzu Yin Chiu, Chong Wang, Haifang Zhang, Xuanjie Liu
  • Publication number: 20180175098
    Abstract: The present disclosure relates to the technical field of semiconductors, and discloses an image sensor and a manufacturing method therefor. The method includes: providing a semiconductor structure, where the semiconductor structure includes: a semiconductor substrate, and a first active region located on the semiconductor substrate, the first active region including a first doped region and a second doped region abutting against the first doped region, and the second doped region being located at an upper surface of the first active region; forming a semiconductor layer on an upper surface of the second doped region; and forming a contact connected to the semiconductor layer. The present disclosure enables defects or damages caused when forming the contact to be kept away from a junction field formed by the second doped region and the first doped region. Therefore, leakage current may be reduced and device performances may be improved.
    Type: Application
    Filed: November 22, 2017
    Publication date: June 21, 2018
    Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Tzu Yin Chiu, Chong Wang, Haifang Zhang, Xuanjie Liu
  • Publication number: 20180100854
    Abstract: Disclosed herein are devices and methods that use aqueous two phase systems and lateral flow assays to detect target analytes in a sample. These devices and methods may be used to diagnose a disease or condition in a biological sample, such as blood or serum. In addition, these devices and methods may be used to detect allergens in a food samples or contaminants, such as environmental toxins, in water samples. Device and kit components may be conveniently assembled in a portable container and are amenable to actuation in most settings. The devices are simple to use, requiring a non-trained operator to simply add the sample to the device. Conveniently, the time it takes to detect the target analyte is very short. Thus, the devices and methods disclosed herein provide novel and useful means for point-of-care.
    Type: Application
    Filed: October 18, 2017
    Publication date: April 12, 2018
    Inventors: Daniel T. Kamei, Yin To Chiu, Benjamin M. Wu, Garrett L. Mosley
  • Patent number: 9823247
    Abstract: Disclosed herein are devices and methods that use aqueous two phase systems and lateral flow assays to detect target analytes in a sample. These devices and methods may be used to diagnose a disease or condition in a biological sample, such as blood or serum. In addition, these devices and methods may be used to detect allergens in a food samples or contaminants, such as environmental toxins, in water samples. Device and kit components may be conveniently assembled in a portable container and are amenable to actuation in most settings. The devices are simple to use, requiring a non-trained operator to simply add the sample to the device. Conveniently, the time it takes to detect the target analyte is very short. Thus, the devices and methods disclosed herein provide novel and useful means for point-of-care.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: November 21, 2017
    Assignee: The Regents of the University of California
    Inventors: Daniel T. Kamei, Yin To Chiu, Benjamin M. Wu, Garrett L. Mosley
  • Publication number: 20170194339
    Abstract: A method is provided for fabricating a buried-channel MOSFET and a surface-channel MOSFET of the same type and different gate electrodes on a same wafer. The method includes providing a semiconductor substrate having a well area and a plurality of shallow trench isolation structures; forming a threshold implantation region doped with impurity ions opposite of that of the well area in the well area for the buried-channel MOSFET; forming a gate structure including a gate dielectric layer and a gate electrode on the semiconductor substrate, wherein the gate electrode of the buried-channel MOSFET is doped with impurity ions with a same type as that of the well area, and the gate electrode of the surface-channel MOSFET is doped with impurity ions with a type opposite of that of the well area; and forming source and drain regions in the semiconductor substrate at both sides of the gate structure.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 6, 2017
    Inventors: Tzu Yin CHIU, Clifford Ian DROWLEY, Leong Tee KOH, Yu Lei JIANG, Da Qiang YU
  • Publication number: 20160260720
    Abstract: Various embodiments provide semiconductor structures and their fabrication methods. An SRAM memory cell can include at least one semiconductor structure, and an SRAM memory can include at least one SRAM memory cell. An exemplary semiconductor structure can include at least two adjacent transistors formed on a semiconductor substrate. An opening can be formed and surrounded by gates of the two adjacent transistors and a doped region formed between the gates of the two adjacent transistors. A conductive layer can be formed to at least partially cover a bottom and a sidewall of the opening to electrically connect a gate of one transistor with the doped region of the other transistor of the two adjacent transistors.
    Type: Application
    Filed: May 12, 2016
    Publication date: September 8, 2016
    Inventors: TZU-YIN CHIU, JUILIN LU, JIANXIANG CAI
  • Patent number: 9368503
    Abstract: Various embodiments provide semiconductor structures and their fabrication methods. An SRAM memory cell can include at least one semiconductor structure, and an SRAM memory can include at least one SRAM memory cell. An exemplary semiconductor structure can include at least two adjacent transistors formed on a semiconductor substrate. An opening can be formed and surrounded by gates of the two adjacent transistors and a doped region formed between the gates of the two adjacent transistors. A conductive layer can be formed to at least partially cover a bottom and a sidewall of the opening to electrically connect a gate of one transistor with the doped region of the other transistor of the two adjacent transistors.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: June 14, 2016
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL CORP.
    Inventors: Tzu-Yin Chiu, Juilin Lu, Jianxiang Cai
  • Publication number: 20160078970
    Abstract: A method for nuclide bombardment includes providing a nuclide bombardment target, which includes a metallic single-crystalline layer having a hydrogen-absorbing metallic element. The single-crystalline layer includes lattice channels disposed therein. The target also includes first hydrogen isotopes, configured as interstitial elements in the lattice channels in the single-crystalline layer. The method further includes injecting second hydrogen isotopes into the target substantially along the direction of the lattice channels.
    Type: Application
    Filed: September 9, 2015
    Publication date: March 17, 2016
    Inventor: Tzu-Yin CHIU
  • Patent number: 9263548
    Abstract: A method for fabricating a semiconductor integrated circuit having a self-aligned structure, the method comprises the steps of: providing a semiconductor substrate; forming a gate dielectric layer, a first polysilicon layer, and a first capping layer on top of the semiconductor substrate; patterning the first capping layer, the first polysilicon layer and stopping on the gate dielectric layer to form a gate structure; forming and patterning a composite dielectric layer, a second polysilicon layer, and a second capping layer to form an interconnect structure; forming a composite spacer; removing the photo-resist layer; forming a third polysilicon layer; making blanket removal of the third polysilicon layer to leave a remain third polysilicon layer; removing the first and the second capping layer; forming a source and a drain; and forming a silicide layer overlying the gate structure, source, drain and the interconnect structure to form the self-aligned structure.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: February 16, 2016
    Inventor: Tzu-Yin Chiu
  • Patent number: 9173531
    Abstract: A dual-purpose vacuum cleaner includes a self-walking carriage including three or more wheels, an accommodation chamber providing at least one bearing face, a roller brush, a dust guide, a passageway connected to the accommodation chamber and a plurality of first contacts disposed in the accommodation chamber, a hand-held vacuum cleaner detachably accommodated in the accommodation chamber and including at least one abutment face, a handle, a dust suction entrance attached to the passageway and a plurality of second contacts respectively physically kept in contact with the first contacts, and a cover covered on the self-walking carriage to conceal the hand-held vacuum cleaner in the self-walking carriage.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: November 3, 2015
    Assignee: EGENPOWER INC.
    Inventors: Ting-Yin Chiu, Gary Li
  • Publication number: 20150253320
    Abstract: Disclosed herein are devices and methods that use aqueous two phase systems and lateral flow assays to detect target analytes in a sample. These devices and methods may be used to diagnose a disease or condition in a biological sample, such as blood or serum. In addition, these devices and methods may be used to detect allergens in a food samples or contaminants, such as environmental toxins, in water samples. Device and kit components may be conveniently assembled in a portable container and are amenable to actuation in most settings. The devices are simple to use, requiring a non-trained operator to simply add the sample to the device. Conveniently, the time it takes to detect the target analyte is very short. Thus, the devices and methods disclosed herein provide novel and useful means for point-of-care.
    Type: Application
    Filed: March 6, 2015
    Publication date: September 10, 2015
    Inventors: Daniel T. Kamei, Yin To Chiu, Benjamin M. Wu, Garrett L. Mosley
  • Publication number: 20150194500
    Abstract: A method for fabricating a semiconductor integrated circuit having a self-aligned structure, the method comprises the steps of: providing a semiconductor substrate; forming a gate dielectric layer, a first polysilicon layer, and a first capping layer on top of the semiconductor substrate; patterning the first capping layer, the first polysilicon layer and stopping on the gate dielectric layer to form a gate structure; forming and patterning a composite dielectric layer, a second polysilicon layer, and a second capping layer to form an interconnect structure; forming a composite spacer; removing the photo-resist layer; forming a third polysilicon layer; making blanket removal of the third polysilicon layer to leave a remain third polysilicon layer; removing the first and the second capping layer; forming a source and a drain; and forming a silicide layer overlying the gate structure, source, drain and the interconnect structure to form the self-aligned structure.
    Type: Application
    Filed: January 13, 2015
    Publication date: July 9, 2015
    Inventor: Tzu-Yin Chiu
  • Patent number: 8948445
    Abstract: A two dimensional barcode containing encoded information can be embedded with an image with a high visual quality. The encoded information within the barcode is meaningful to machines, while the image is meaningful to humans. The two dimensional barcode embedded with the image is designed such that machines can decode the information encoded within the two dimensional barcode even with the distortion from the image. The subject application describes various systems, methods and devices that can facilitate embedding the image within the two dimensional barcode, detecting the two dimensional barcode embedded with the image within a practical environment, and decoding the encoded information from the two dimensional barcode even with the distortion from the image.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: February 3, 2015
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Wai Ho Mow, Chi Yeung Au, Cheuk Yin Chiu, Ka Shun Li, Wenjian Huang