Patents by Inventor Yin To Chiu

Yin To Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080254602
    Abstract: A method of introducing an impurity into a wafer surface is provided. The method comprises the steps of: low energy implantation of impurity into a surface of the wafer to generate an implanted dopant layer; and simultaneously removing an implanted surface of the implanted dopant layer to generate a doping profile with controlled areal impurity dosage.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 16, 2008
    Inventor: TZU-YIN CHIU
  • Publication number: 20080243292
    Abstract: A method of identifying defect generating process of a plurality of lots of wafers in a manufacturing environment is provided, wherein each lots of the wafers are divided into a plurality of sub lots of wafers, and dividing all processes into groups of manufacturing stages, the method comprises the steps of: assigning all the sub lots a reference orientation to be processed in a first group of manufacturing stages; rotating one or more of sub lots by designated combination of rotational angles with respect to the reference orientation during each of the subsequent group of manufacturing stages; detecting a defect pattern of the sub lots, wherein the defect pattern corresponds to a rotational combination associated with the designated combination of rotational angles of the sub lots and the number of the plurality of sub lots; and identifying the group of manufacturing stages corresponding to the rotational combination.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 2, 2008
    Inventor: TZU-YIN CHIU
  • Patent number: 7430462
    Abstract: An automatic charging station for an autonomous mobile machine includes a base, a housing, and a signal transmitter. The base is mounted on the ground or on a planar surface. The housing is rotatably mounted on the base, having at least one guide member and a plurality of electrically conductive members on a surface thereof. The electrically conductive members are located on the housing. The signal transmitter is mounted on the housing for transmitting a signal. When the autonomous mobile machine senses the signal transmitted by the transmitter while moving, the autonomous mobile machine moves along a route towards the housing and then forces the guide member to enable the housing to rotate for facing and accommodating the autonomous mobile machine and to further enable the autonomous mobile machine to contact against the housing to have its electrodes in contact with the electrically conductive members for charging.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: September 30, 2008
    Assignee: Infinite Electronics Inc.
    Inventors: Ting-Yin Chiu, Wen-Hsu Lin
  • Publication number: 20080024008
    Abstract: A household self-contained power supply combined with, what a civil residence has equipped, a panel board, a mains power supply line, and a plurality of sockets. The panel board includes a plurality of breakers. The household self-contained power supply is composed of a power line network module, a battery unit, a control unit, an automatic changeover switch, and a plurality of adaptors. Each of the adaptors includes a sub-plug, at least one sub-socket, an electrically-controlled switch, and a sub-power-line network module. The mains power supply line is connected with the power line network module, such that the electrically-controlled switch can be controlled by the control unit to control the conduction status between the sub-plugs and the sub-sockets. Therefore, it provides a self-contained power source and self-management thereof.
    Type: Application
    Filed: December 6, 2006
    Publication date: January 31, 2008
    Inventors: Ting-Yin Chiu, Calvin Liu
  • Publication number: 20070143949
    Abstract: A mobile robotic device includes a frame body having a receiving recession recessed inward therefrom and a guide pusher formed thereon and extending toward the receiving recession and having a bevel formed at its one side; a dust-collecting box detachably mounted in the receiving recession and having an opening formed at one side thereof and an indentation formed at the same side as the opening for receiving the guide pusher while the dust-collecting box is inserted into the receiving recession; and a sealing member pivotably mounted to the dust-collecting box to seal the opening. Accordingly, while the dust-collecting box is drawn from the receiving recession, the sealing member can seal the opening to prevent the dust from escaping from the dust-collecting box.
    Type: Application
    Filed: June 19, 2006
    Publication date: June 28, 2007
    Applicant: E-SUPPLY INTERNATIONAL CO., LTD.
    Inventor: Ting-Yin Chiu
  • Publication number: 20070042626
    Abstract: A multi-port jack assembly adapted for power transformers for computers includes a main body. The main body has a plurality of convex connection ports for electrical connection with the power transformers, an electric wire electrically connected with an end of the main body, and a plug electrically connected with a distal end of the electric wire. Thus, the present invention is connectable with the multiple transformers adapted for the computers to enable one-to-multiplicity connection and to further reduce the number of the electric wires.
    Type: Application
    Filed: August 17, 2005
    Publication date: February 22, 2007
    Applicant: INFINITE ELECTRONICS INC.
    Inventor: Ting-Yin Chiu
  • Publication number: 20060259194
    Abstract: A virtual wall system includes a mobile robotic device having a steering unit for steering itself, a steering control unit connected with the steering unit for controlling the steering of the steering unit, at least one signal transmitter mounted thereon for emitting a signal, and a sonic receiver for receiving a sonic signal; and a virtual wall generator having at least one signal receiver for receiving the signal, at least one sonic transmitter for emitting a sonic signal, and a signal controller for identifying the signal and controlling the emission of the sonic transmitter. While the mobile robotic device is moving, the signal controller controls the sonic transmitter to emit the sonic signal after the signal receiver receives the signal emitted by the signal transmitter and then the sonic receiver receives the sonic signal, enabling the steering control unit to control the steering unit to steer the mobile robotic device.
    Type: Application
    Filed: July 8, 2005
    Publication date: November 16, 2006
    Applicant: INFINITE ELECTRONICS INC.
    Inventor: Ting-Yin Chiu
  • Publication number: 20060185472
    Abstract: A boosting adaptor for a jack is comprised of a housing, a power input member received in the housing for rotation driven by an external input power, a boosting gear assembly connected with the power input member and having a plurality of gears and rotary shafts for running driven by the power input member and for boosting the input power, and a power output member connected with the boosting gear assembly for connection with the jack and for outputting the boosted input power to the jack. Accordingly, while in cooperative operation with a jack, the boosting adaptor not only enables the laborsaving operation of the jack but also can be connected with an electric tool to enable the convenient operation of the jack.
    Type: Application
    Filed: February 23, 2005
    Publication date: August 24, 2006
    Applicant: INFINITE ELECTRONICS INC.
    Inventors: Ting-Yin Chiu, Wen-Tsung Hsu
  • Publication number: 20060085105
    Abstract: An automatic charging station for an autonomous mobile machine includes a base, a housing, and a signal transmitter. The base is mounted on the ground or on a planar surface. The housing is rotatably mounted on the base, having at least one guide member and a plurality of electrically conductive members on a surface thereof. The electrically conductive members are located on the housing. The signal transmitter is mounted on the housing for transmitting a signal. When the autonomous mobile machine senses the signal transmitted by the transmitter while moving, the autonomous mobile machine moves along a route towards the housing and then forces the guide member to enable the housing to rotate for facing and accommodating the autonomous mobile machine and to further enable the autonomous mobile machine to contact against the housing to have its electrodes in contact with the electrically conductive members for charging.
    Type: Application
    Filed: October 20, 2004
    Publication date: April 20, 2006
    Applicant: INFINITE ELECTRONICS INC.
    Inventors: Ting-Yin Chiu, Wen-Hsu Lin
  • Patent number: 5989752
    Abstract: A reconfigurable mask for forming erasable patterns is disclosed. The mask includes material having optical properties manipulated by nonphysical means. In a preferred embodiment, the mask includes a liquid crystal array formed by materials that are transparent to the exposure light. A phase-shift mask can also be formed by controlling the refractive index of each cell. The mask can be used to form mask patterns that compensate for overexposure at corners of a mask pattern.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: November 23, 1999
    Inventor: Tzu-Yin Chiu
  • Patent number: 5856003
    Abstract: A process is described for forming a heavily doped buried element below an active device region of a silicon wafer without the use of costly epitaxial layers and without incurring ion implantation damage within active device regions. The method is particularly applicable to active device regions which have small lateral dimensions. Thus, the technological trend towards shrinking devices favors the incorporation of the process of the invention. The process utilizes a silicon nitride hardmask to define a narrow band around the perimeter of the device active area. A deep implant is performed through this mask, placing a ring of dopant below and outside the active area. The silicon nitride hardmask is then patterned a second time to define the conventional field oxide isolation regions. The LOCOS field oxidation is then performed whereby the implanted dopant diffuses vertically, engaging the field oxide around the perimeter of the device region and laterally filling in the region under the device active area.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: January 5, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Tzu-Yin Chiu
  • Patent number: 5559360
    Abstract: An inductor fabricated for semiconductor use is disclosed. The inductor is formed with a multi-level, multi-element conductor metallization structure which effectively increases conductance throughout the inductor thereby increasing the inductor's Q. The structure of the inductor may also provide for routing the current flowing through the multi-level, multi-element conductors in a way that increases the self inductance between certain conductive elements, thereby increasing the inductor's total inductance.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: September 24, 1996
    Assignee: Lucent Technologies Inc.
    Inventors: Tzu-Yin Chiu, Frank M. Erceg, Duk Y. Jeon, Janmye Sung
  • Patent number: 5470783
    Abstract: An integrated circuit fabrication process for creating field oxide regions in a substrate is disclosed. In the process, masking layers of oxide, nitride and deposited silicon dioxide are formed on the substrate. A pattern that defines the field oxide regions in the substrate is introduced into the substrate through these masking layers. The field oxide region is bordered by steep sidewalls in a portion of the substrate and the masking layers overlying the substrate. A thin layer of oxide is grown on the exposed portion of the substrate, and a conformal second layer of nitride followed by a conformal layer of a polycrystalline material are formed over the substrate/mask structure. The polycrystalline layer is selectively removed, so that the only portion of the polycrystalline material that remains on the structure is the portion covering the sidewalls.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: November 28, 1995
    Assignee: AT&T IPM Corp.
    Inventors: Tzu-Yin Chiu, Frank M. Erceg, Te-Yin M. Liu, Kenenth G. Moerschel, Michael A. Prozonic, Janmye Sung
  • Patent number: 5462888
    Abstract: A process for fabricating transistors on a substrate is disclosed. In accordance with the process, stacks of material are formed on the surface of the substrate. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. A first layer of polycrystalline material is deposited over the substrate and selectively removed such that only those portions of the polycrystalline layer that surround the stacks of material remain. A layer of silicon nitride or silicon dioxide is then formed over the substrate surface. A first resist is then spun on the substrate surface. This resist aggregates near the stacks of material. An isolation mask is generated that leaves exposed only those areas of the substrate that correspond to the area of overlap between the first polycrystalline area and the stacks of material, which also contain a layer of polycrystalline material.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: October 31, 1995
    Assignee: AT&T IPM Corp.
    Inventors: Tzu-Yin Chiu, Frank M. Erceg, Francis A. Krafty, Te-Yin M. Liu, William A. Possanza, Janmye Sung
  • Patent number: 5106783
    Abstract: A novel process is disclosed for fabricating semiconductor devices with self-aligned contacts. Characteristic of the resulting structure is a digitated electrode and a contiguous conductive region that contact first semiconductor regions and second semiconductor regions, respectively. The first semiconductor regions and the second semiconductor regions are formed in a semiconductor substrate, with each second semiconductor region underlying a finger of the digitated electrode. Advantageously, by forming a contiguous conductive region over the first semiconductor regions located between the fingers of the digitated electrode, it is not only possible to contact second semiconductor regions with a common electrode, but also to self-align the common electrode with the digitated electrode. Ohmic shorting between the digitated electrode and the contiguous conductive region is prevented by interposing an insulating region therebetween.
    Type: Grant
    Filed: November 9, 1990
    Date of Patent: April 21, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: Gen M. Chin, Tzu-Yin Chiu, Te-Yin M. Liu, Alexander M. Voshchenkov
  • Patent number: 4992848
    Abstract: A new self-aligned contact technology is afforded by semiconductor devices having a digitated electrode and a contiguous conductive region that contact first semiconductor regions and second semiconductor regions, respectively. The first semiconductor regions and the second semiconductor regions are formed in a semiconductor substrate, with each second semiconductor region underlying a finger of the digitated electrode. Advantageously, by forming a contiguous conductive region over the first semiconductor regions located between the fingers of the digitated electrode, it is not only possible to contact second semiconductor regions with a common electrode, but also to self-align the common electrode with the digitated electrode. Ohmic shorting between the digitated electrode and the contiguous conductive region is afforded by interposing an insulating region therebetween.
    Type: Grant
    Filed: February 20, 1990
    Date of Patent: February 12, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Gen M. Chin, Tzu-Yin Chiu, Te-Yin M. Liu, Alexander M. Voshchenkov
  • Patent number: 4980304
    Abstract: A novel fabrication method is disclosed for fabricating a bipolar transistor having a digitated emitter electrode and a contiguous polysilicon region acting as a self-aligned base contact. The process substantially reduces the parasitic capacitances as well as eliminates the need for the intrinsic base region to be exposed to multiple etching, which results in the fabrication of small and reproducible base widths.A first polysilicon layer is deposited over the surface of a semiconductor substrate and, then, implanted with base dopants, which are driven into the surface of the active region by a furnace process for forming an intrinsic base region. Emitter dopants are next implanted into the first polysilicon layer. Subsequently, a nitride layer is deposited and the digitated emitter fingers patterned by selective etching.
    Type: Grant
    Filed: February 20, 1990
    Date of Patent: December 25, 1990
    Assignee: AT&T Bell Laboratories
    Inventors: Gen M. Chin, Tzu-Yin Chiu, Te-Yin M. Liu, Alexander M. Voshchenkov
  • Patent number: 4824796
    Abstract: A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks.
    Type: Grant
    Filed: July 10, 1987
    Date of Patent: April 25, 1989
    Assignees: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Tzu-Yin Chiu, Gen M. Chin, Ronald C. Hanson, Maureen Y. Lau, Kwing F. Lee, Mark D. Morris, Alexander M. Voshchenkov, Avinoam Kornblit, Joseph Lebowitz, William T. Lynch
  • Patent number: 4784971
    Abstract: A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has a typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks.
    Type: Grant
    Filed: May 8, 1987
    Date of Patent: November 15, 1988
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Tzu-Yin Chiu, Gen M. Chin, Ronald. C. Hanson, Maureen Y. Lau, Kwing F. Lee, Mark D. Morris, Alexander M. Voschenkov