Abstract: A method for fabricating a semiconductor integrated circuit having a self-aligned structure, the method comprises the steps of: providing a semiconductor substrate; forming a gate dielectric layer, a first polysilicon layer, and a first capping layer on top of the semiconductor substrate; patterning the first capping layer, the first polysilicon layer and stopping on the gate dielectric layer to form a gate structure; forming and patterning a composite dielectric layer, a second polysilicon layer, and a second capping layer to form an interconnect structure; forming a composite spacer; removing the photo-resist layer; forming a third polysilicon layer; making blanket removal of the third polysilicon layer to leave a remain third polysilicon layer; removing the first and the second capping layer; forming a source and a drain; and forming a silicide layer overlying the gate structure, source, drain and the interconnect structure to form the self-aligned structure.

Abstract: A method of introducing dopants into a semiconductor wafer includes implanting the dopants into a region below a surface of the semiconductor wafer using an ion beam to form a first implanted layer. The dopants when activated causing a conductivity of the implanted layer to be either of N-type or P-type. The first implanted layer is characterized by a peak dopant concentration at a first depth below the surface of the semiconductor wafer. The method also includes removing a layer from the semiconductor wafer surface, wherein said layer includes a portion of said dopants.

Abstract: An integrated circuit structure has a substrate comprising a well region and a surface region, an isolation region within the well region, a gate insulating layer overlying the surface region, first and second source/drain regions within the well region of the substrate. The structure also has a channel region formed between the first and second source/drain regions and within a vicinity of the gate insulating layer, and a gate layer overlying the gate insulating layer and coupled to the channel region. The structure has sidewall spacers on edges of the gate layer to isolate the gate layer, a local interconnect layer overlying the surface region of the substrate and having an edge region extending within a vicinity of the first source/drain region. A contact layer on the first source/drain region in contact with the edge region and has a portion abutting a portion of the sidewall spacers.

Abstract: Various embodiments provide semiconductor structures and their fabrication methods. An SRAM memory cell can include at least one semiconductor structure, and an SRAM memory can include at least one SRAM memory cell. An exemplary semiconductor structure can include at least two adjacent transistors formed on a semiconductor substrate. An opening can be formed and surrounded by gates of the two adjacent transistors and a doped region formed between the gates of the two adjacent transistors. A conductive layer can be formed to at least partially cover a bottom and a sidewall of the opening to electrically connect a gate of one transistor with the doped region of the other transistor of the two adjacent transistors.

Abstract: An integrated circuit structure has a substrate comprising a well region and a surface region, an isolation region within the well region, a gate insulating layer overlying the surface region, first and second source/drain regions within the well region of the substrate. The structure also has a channel region formed between the first and second source/drain regions and within a vicinity of the gate insulating layer, and a gate layer overlying the gate insulating layer and coupled to the channel region. The structure has sidewall spacers on edges of the gate layer to isolate the gate layer, a local interconnect layer overlying the surface region of the substrate and having an edge region extending within a vicinity of the first source/drain region. A contact layer on the first source/drain region in contact with the edge region and has a portion abutting a portion of the sidewall spacers.

Abstract: A method for fabricating a semiconductor integrated circuit and resulting structure. The method includes providing a semiconductor substrate with an overlying dielectric layer and forming a polysilicon gate layer and an overlying capping layer. The gate layer is overlying the dielectric layer. The method also includes patterning the polysilicon gate layer to form a gate structure and a local interconnect structure. The gate structure and the local interconnect structure include a contact region defined therebetween. The gate structure also includes the overlying capping layer. The method includes forming sidewall spacers on the gate structure and the local interconnect structure and removing the sidewall spacer on the local interconnect structure. The method also includes forming contact polysilicon on the contact region and implanting a dopant impurity into the contact polysilicon.

Abstract: A two dimensional barcode containing encoded information can be embedded with an image with a high visual quality. The encoded information within the barcode is meaningful to machines, while the image is meaningful to humans. The two dimensional barcode embedded with the image is designed such that machines can decode the information encoded within the two dimensional barcode even with the distortion from the image. The subject application describes various systems, methods and devices that can facilitate embedding the image within the two dimensional barcode, detecting the two dimensional barcode embedded with the image within a practical environment, and decoding the encoded information from the two dimensional barcode even with the distortion from the image.

Abstract: A dual-purpose vacuum cleaner includes a self-walking carriage including three or more wheels, an accommodation chamber providing at least one bearing face, a roller brush, a dust guide, a passageway connected to the accommodation chamber and a plurality of first contacts disposed in the accommodation chamber, a hand-held vacuum cleaner detachably accommodated in the accommodation chamber and including at least one abutment face, a handle, a dust suction entrance attached to the passageway and a plurality of second contacts respectively physically kept in contact with the first contacts, and a cover covered on the self-walking carriage to conceal the hand-held vacuum cleaner in the self-walking carriage.

Abstract: A method of introducing dopants into a semiconductor wafer includes implanting the dopants into a region below a surface of the semiconductor wafer using an ion beam to form a first implanted layer. The dopants when activated causing a conductivity of the implanted layer to be either of N-type or P-type. The first implanted layer is characterized by a peak dopant concentration at a first depth below the surface of the semiconductor wafer. The method also includes removing a layer from the semiconductor wafer surface, wherein said layer includes a portion of said dopants.

Abstract: A mobile robotic vacuum cleaner with a detachable electrical fan is disclosed to include a housing having a fan chamber, an electrical fan detachably mounted in the fan chamber, and a cover plate detachably fastened to the housing to hold down the electrical fan in the fan chamber. Subject to the use of the detachable cover plate to hold down the electrical fan in the fan chamber, the electrical fan can be installed in the fan chamber conveniently without any fastening members, such as screws, or the use of any hand tool, such as screwdriver and, after removal of the cover plate, the electrical fan can be removed from the housing easily.

Abstract: A method of introducing an impurity into a wafer surface is provided. The method comprises the steps of: low energy implantation of impurity into a surface of the wafer to generate an implanted dopant layer; and simultaneously removing an implanted surface of the implanted dopant layer to generate a doping profile with controlled areal impurity dosage.

Abstract: An apparatus for patterning objects for the manufacture of semiconductor integrated circuits includes an optical source, multiple fiber cores coupled to the optical source, each of the fiber cores has an input end and an output end, and each of the input ends is coupled to the optical source. The apparatus further includes an array coupled to each of the fiber cores, the array is configured to allow each of the fiber ends to output toward a common plane, an object having a photosensitive material coupled to the common plane, and a pattern that is exposed onto the photosensitive material. The pattern is composed of a number beams corresponding to a number of fiber cores.

Abstract: A mobile robotic vacuum cleaner with a detachable electrical fan is disclosed to include a housing having a fan chamber, an electrical fan detachably mounted in the fan chamber, and a cover plate detachably fastened to the housing to hold down the electrical fan in the fan chamber. Subject to the use of the detachable cover plate to hold down the electrical fan in the fan chamber, the electrical fan can be installed in the fan chamber conveniently without any fastening members, such as screws, or the use of any hand tool, such as screwdriver and, after removal of the cover plate, the electrical fan can be removed from the housing easily.

Abstract: An apparatus for patterning objects for the manufacture of semiconductor integrated circuits includes an optical source, multiple fiber cores coupled to the optical source, each of the fiber cores has an input end and an output end, and each of the input ends is coupled to the optical source. The apparatus further includes an array coupled to each of the fiber cores, the array is configured to allow each of the fiber ends to output toward a common plane, an object having a photosensitive material coupled to the common plane, and a pattern that is exposed onto the photosensitive material. The pattern is composed of a number beams corresponding to a number of fiber cores.

Abstract: A method for patterning objects, e.g., semiconductor wafer, glass plate, composite, etc. The method includes providing an object, which has an overlying layer of photosensitive material. The method includes selectively applying light through one or more fiber cores from a plurality of fiber cores. Each of the fiber cores has an input end and an output end. Each of the input ends is coupled to the optical source. The plurality of fiber cores is numbered from 1 through N, where N is an integer greater than 1. Each of the output ends is also numbered from 1 through N, which corresponds respectively to each of the plurality of fiber cores numbered from 1 through N. The method exposes the photosensitive material from light emitted selectively through the one or more fiber cores. The one or more fiber cores out(s) light respectively through one or more output ends of the fiber cores. Each of the output ends numbered from 1 through N is associated with a pixel numbered respectively from 1 through N.

Abstract: A method for illuminating an object for selectively patterning a photosensitive material overlying the object using an array of mirror devices. The method includes applying electromagnetic radiation using a flood beam onto an array of mirror devices. Each of the mirror devices is associated with a pixel for a pattern to be exposed onto the photosensitive material. The method also includes selectively actuating one or more mirrors on the array to deflect corresponding portions of the beam onto corresponding portions of the photosensitive material to expose the portions of the photosensitive material on the object. The method maintains one or more other mirrors in a selected position(s) to maintain corresponding other portions of the photosensitive material free from exposure. Preferably, the combination of exposed and unexposed portions forms the pattern exposed onto the photosensitive material.

Abstract: A virtual wall system is composed of a mobile robotic device and at least one virtual wall generator. The mobile robotic device includes a steering unit for steering itself toward at least one direction, a steering control unit connected with the steering unit for controlling the steering of the steering unit, and at least one sonic receiver mounted to one side thereof for receiving sonic signals. The at least one virtual wall system generator is placed on a planar surface where the mobile robotic device moves, having a sonic emitter and a taper-shaped hole facing sidewards. The taper-shaped hole increasingly expands from inside out. The sonic emitter is to emit sonic signals that are directive subject to the taper-shaped hole. The at least one virtual wall system generator further includes a power module as power supply.

Abstract: A method for fabricating a semiconductor integrated circuit and resulting structure. The method includes providing a semiconductor substrate with an overlying dielectric layer and forming a polysilicon gate layer and an overlying capping layer. The gate layer is overlying the dielectric layer. The method also includes patterning the polysilicon gate layer to form a gate structure and a local interconnect structure. The gate structure and the local interconnect structure include a contact region defined therebetween. The gate structure also includes the overlying capping layer. The method includes forming sidewall spacers on the gate structure and the local interconnect structure and removing the sidewall spacer on the local interconnect structure. The method also includes forming contact polysilicon on the contact region and implanting a dopant impurity into the contact polysilicon.

Abstract: A method for patterning objects, e.g., semiconductor wafer, glass plate, composite, etc. The method includes providing an object, which has an overlying layer of photosensitive material. The method includes selectively applying light through one or more fiber cores from a plurality of fiber cores. Each of the fiber cores has an input end and an output end. Each of the input ends is coupled to the optical source. The plurality of fiber cores is numbered from 1 through N, where N is an integer greater than 1. Each of the output ends is also numbered from 1 through N, which corresponds respectively to each of the plurality of fiber cores numbered from 1 through N. The method exposes the photosensitive material from light emitted selectively through the one or more fiber cores. The one or more fiber cores out(s) light respectively through one or more output ends of the fiber cores. Each of the output ends numbered from 1 through N is associated with a pixel numbered respectively from 1 through N.

Abstract: A method for fabricating a semiconductor integrated circuit having a self-aligned structure, the method comprises the steps of: providing a semiconductor substrate; forming a gate dielectric layer, a first polysilicon layer, and a first capping layer on top of the semiconductor substrate; patterning the first capping layer, the first polysilicon layer and stopping on the gate dielectric layer to form a gate structure; forming and patterning a composite dielectric layer, a second polysilicon layer, and a second capping layer to form an interconnect structure; forming a composite spacer; removing the photo-resist layer; forming a third polysilicon layer; making blanket removal of the third polysilicon layer to leave a remain third polysilicon layer; removing the first and the second capping layer; forming a source and a drain; and forming a silicide layer overlying the gate structure, source, drain and the interconnect structure to form the self-aligned structure.