Abstract: A trench power MOSFET structure and fabrication method thereof is provided. The fabrication method comprises following process. First, form an isolating trench. Then, form at least two doped regions around the isolating trench. The doped regions are adjacent and the doping concentrations of two doped regions are different. Form an isolating structure in the isolating trench. Wherein, the junction profiles of the two doped regions are made by on implantation method for moderate the electric field distribution and decreasing the conduction loss.

Abstract: An electronic lock in which new passcodes can be added and/or deleted without specifying the user slot to which the new passcode should be assigned. A circuit in the electronic lock determines whether the new passcode to be added is unique compared to existing passcodes stored in memory. If so, the circuit searches for an available user slot for which no authorized passcodes are associated and associates the new passcode with an available user slot.

Abstract: A power transistor having a top-side drain and a forming method thereof are provided. Firstly, a body layer is formed. An epitaxial layer is subsequently formed on the body layer. Then a gate trench is formed in the body layer and the epitaxial layer. Afterward, a gate structure is formed in the gate trench. Then, a doped drain layer is formed within the epitaxial layer. Next, a source is formed in contact with the body layer. Lastly, a drain is formed in contact with the dope drain layer. The structure and forming method disclosed can through arranging the drain at the top of the power transistor integrate with the newly high performance packaging design structure. Accordingly, the efficiency of the power transistor can be greatly enhanced.

Abstract: A trenched power semiconductor device with enhanced breakdown voltage is provided. The trenched power semiconductor device has a first trench penetrating the body region located between two neighboring gate trenches. A polysilicon structure with a conductivity type identical to that of the body region is located in a lower portion of the first trench and spaced from the body region with a predetermined distance. A dielectric structure is located on the polysilicon structure and at least extended to the body region. Source regions are located in an upper portion of the body region. A heavily doped region located in the body region is extended to the bottom of the body region. A conductive structure is electrically connected to the heavily doped region and the source region.

Abstract: A method of transmitting a downlink radio signal from a distributed antenna system to a mobile device is provided. The distributed antenna system includes a plurality of transceivers and a control module. Each of the transceivers receives an uplink radio signal from the mobile device as a respective received signal. Each of the transceivers transmits the received signal to the control module. The control module provides to each of the transceivers the downlink radio signal with a respective intensity, which is determined by the control module according to an intensity of the received signal from the transceiver. Each of the transceivers transmits the downlink radio signal to the mobile device.

Abstract: A receiver with Inphase-Quadrature (I-Q) imbalance compensation and an I-Q imbalance compensation method thereof are provided. The receiver chooses a first receiving signal which includes a first data and a first noise, as well as a second receiving signal which includes a second data and a second noise from a plurality of receiving signals. The first data have a first positive frequency data and a first negative frequency data, while the second data have a second positive frequency data and a second negative frequency data. The receiver calculates an I-Q imbalance compensation parameter according to the first receiving signal and the second receiving signal, and compensates for a third receiving signal according to the I-Q imbalance compensation parameter. The I-Q imbalance compensation method is applied to the receiver to implement the aforesaid operations.

Abstract: An adaptive distributed antenna system comprises a control module coupled between multiple base stations, and multiple antenna groups, each of which includes multiple antenna devices each coupled to the control module via a transmission line, and operable to convert an external wireless signal and a transmitting signal from the transmission line respectively into a receiving signal and a signal to be radiated. The control module converts a downlink signal from any base station and the receiving signal from any transmission line respectively into the transmitting signal and an uplink signal. The control module is configured to establish a transmission link between one base station and one antenna device of the antenna groups.

Abstract: A power transistor having a top-side drain and a forming method thereof are provided. Firstly, a body layer is formed. An epitaxial layer is subsequently formed on the body layer. Then a gate trench is formed in the body layer and the epitaxial layer. Afterward, a gate structure is formed in the gate trench. Then, a doped drain layer is formed within the epitaxial layer. Next, a source is formed in contact with the body layer. Lastly, a drain is formed in contact with the dope drain layer. The structure and forming method disclosed can through arranging the drain at the top of the power transistor integrate with the newly high performance packaging design structure. Accordingly, the efficiency of the power transistor can be greatly enhanced.

Abstract: A trench power MOSFET structure and fabrication method thereof is provided. The fabrication method comprises following process. First, form an isolating trench. Then, form at least two doped regions around the isolating trench. The doped regions are adjacent and the doping concentrations of two doped regions are different. Form an isolating structure in the isolating trench. Wherein, the junction profiles of the two doped regions are made by on implantation method for moderate the electric field distribution and decreasing the conduction loss.

Abstract: A trench power MOSFET structure and fabrication method thereof is provided. The fabrication method comprises following process. First, form an isolating trench. Then, form at least two doped regions around the isolating trench. The doped regions are adjacent and the doping concentrations of two doped regions are different. Form an isolating structure in the isolating trench. Wherein, the junction profiles of the two doped regions are made by ion implantation method for moderate the electric field distribution and decreasing the conduction loss.

Abstract: An exemplary embodiment of the present disclosure illustrates a trench power MOSFET which includes a base, a plurality of first trenches, and a plurality of second trenches. The base has an active region and a termination region, wherein the termination region surrounds the active region. The plurality of first trenches is disposed in the active region. The plurality of second trenches is disposed in the termination region, wherein the second trenches extend outward from the active region side. The second trenches have isolation layers and conductive material deposited inside, in which the isolation layers are respectively disposed in the inner surface of the second trenches. The disclosed trench power MOSFET having the second trenches disposed in the termination region can increase the breakdown voltage thereof while minimize the termination region area thereby reduce the associated manufacturing cost.

Abstract: A receiver with Inphase-Quadrature (I-Q) imbalance compensation and an I-Q imbalance compensation method thereof are provided. The receiver chooses a first receiving signal which includes a first data and a first noise, as well as a second receiving signal which includes a second data and a second noise from a plurality of receiving signals. The first data have a first positive frequency data and a first negative frequency data, while the second data have a second positive frequency data and a second negative frequency data. The receiver calculates an I-Q imbalance compensation parameter according to the first receiving signal and the second receiving signal, and compensates for a third receiving signal according to the I-Q imbalance compensation parameter. The I-Q imbalance compensation method is applied to the receiver to implement the aforesaid operations.

Abstract: A fabrication method of a trenched power semiconductor device with source trench is provided. Firstly, at least two gate trenches are formed in a base. Then, a dielectric layer and a polysilicon structure are sequentially formed in the gate trench. Afterward, at least a source trench is formed between the neighboring gate trenches. Next, the dielectric layer and a second polysilicon structure are sequentially formed in the source trench. The second polysilicon structure is located in a lower portion of the source trench. Then, the exposed portion of the dielectric layer in the source trench is removed to expose a source region and a body region. Finally, a conductive structure is filled into the source trench to electrically connect the second polysilicon structure, the body region, and the source region.

Abstract: A computing device for performing functions of multi-touch finger gesture is disclosed. The computing device includes a receiver to receive at least one of a first input from a first object or a second input from at least two second objects, a look-up-table (LUT) module to store a second set of functions associated with the at least two second objects, and a mapping module to map one type of the first input from the first object to a corresponding one of the second set of functions. The computing device is configured to perform a corresponding one of the second set of functions based on the type of the first input.

Abstract: A receiver having Inphase-Quadrature (I-Q) imbalance compensation and an I-Q imbalance compensation method are provided. The receiver calculates a cross-ratio parameter according to a first ideal receiving value and a first ideal conjugate receiving mirror of a first receiving signal and a second ideal receiving value and a second ideal conjugate receiving mirror of a second receiving signal. The receiver calculates an I-Q imbalance compensation parameter according to the cross-ratio parameter, the first ideal receiving value, the first ideal conjugate receiving mirror, the second ideal receiving value, the second ideal conjugate receiving mirror, the first receiving signal and the second receiving signal. The receiver compensates a third receiving signal according to the I-Q imbalance compensation parameter.

Abstract: A trenched power semiconductor device with enhanced breakdown voltage is provided. The trenched power semiconductor device has a first trench penetrating the body region located between two neighboring gate trenches. A polysilicon structure with a conductivity type identical to that of the body region is located in a lower portion of the first trench and spaced from the body region with a predetermined distance. A dielectric structure is located on the polysilicon structure and at least extended to the body region. Source regions are located in an upper portion of the body region. A heavily doped region located in the body region is extended to the bottom of the body region. A conductive structure is electrically connected to the heavily doped region and the source region.

Abstract: A trenched power semiconductor device with enhanced breakdown voltage is provided. The trenched power semiconductor device has a first trench penetrating the body region located between two neighboring gate trenches. A polysilicon structure with a conductivity type identical to that of the body region is located in a lower portion of the first trench and spaced from the body region with a predetermined distance. A dielectric structure is located on the polysilicon structure and at least extended to the body region. Source regions are located in an upper portion of the body region. A heavily doped region located in the body region is extended to the bottom of the body region. A conductive structure is electrically connected to the heavily doped region and the source region.

Abstract: An exemplary embodiment of the present disclosure illustrates a trench power MOSFET which includes a base, a plurality of first trenches, and a plurality of second trenches. The base has an active region and a termination region, wherein the termination region surrounds the active region. The plurality of first trenches is disposed in the active region. The plurality of second trenches is disposed in the termination region, wherein the second trenches extend outward from the active region side. The second trenches have isolation layers and conductive material deposited inside, in which the isolation layers are respectively disposed in the inner surface of the second trenches. The disclosed trench power MOSFET having the second trenches disposed in the termination region can increase the breakdown voltage thereof while minimize the termination region area thereby reduce the associated manufacturing cost.

Abstract: A power semiconductor structure with schottky diode is provided. In the step of forming the gate structure, a separated first polysilicon structure is also formed on the silicon substrate. Then, the silicon substrate is implanted with dopants by using the first polysilicon structure as a mask to form a body and a source region. Afterward, a dielectric layer is deposited on the silicon substrate and an open penetrating the dielectric layer and the first polysilicon structure is formed so as to expose the source region and the drain region below the body. The depth of the open is smaller than the greatest depth of the body. Then, a metal layer is filled into the open to electrically connect to the source region and the drain region.

Abstract: A receiver having Inphase-Quadrature (I-Q) imbalance compensation and an I-Q imbalance compensation method thereof are provided. The receiver calculates a cross-ratio parameter according to a first ideal receiving value and a first ideal conjugate receiving mirror of a first receiving signal and a second ideal receiving value and a second ideal conjugate receiving mirror of a second receiving signal. The receiver calculates an I-Q imbalance compensation parameter according to the cross-ratio parameter, the first ideal receiving value, the first ideal conjugate receiving mirror, the second ideal receiving value, the second ideal conjugate receiving mirror, the first receiving signal and the second receiving signal. The receiver compensates a third receiving signal according to the I-Q imbalance compensation parameter.