Abstract: A gate driving apparatus for a liquid crystal display panel with liquid crystal cells, thin film transistors, gate lines, and data lines includes a plurality of shift registers on the liquid crystal display panel to apply scanning signals to the gate lines, and a gate driving integrated circuit connected to the liquid crystal display panel to generate a plurality of control signals for controlling the shift registers.

Abstract: A display device and driving method are provided. A display device includes a display area that includes a plurality of pixel cells in respective pixel regions defined by a plurality of gate and data lines crossing each other. A data driver is operable to supply data signals to the pixel cells. The pixel cells are connected with the first data line and are divided into a plurality of pixel-cell groups. The data driver is operable to supply the data signal of first polarity to the pixel cells included in the odd-numbered pixel-cell groups, and to supply the data signal of second polarity to the pixel cells included in the even-numbered pixel-cell groups. The first polarity is opposite to the second polarity. A shift register that is operable to drive the gate lines to supply the scan pulses of different amplitudes to neighboring pixel cells included in the different pixel-cell groups.

Abstract: The present invention relates to an instrument connection type unit pack combined cell cartridge assembled into a compound cell interconnection mesh, and to a combined cartridge electricity storage device assembled into a compound unit interconnection mesh in which a plurality of cell cartridges are electrically interconnected. The unit pack combined cell cartridge of the present invention is configured such that a plurality of cells are interconnected into a unit pack using a suitable device (bus bar), and a plurality of unit packs are interconnected into a unitary cartridge using a suitable device (intermediate conductor plate). The combined cartridge electricity storage device of the present invention is configured such that a plurality of unit pack combined cartridges are accommodated in an outer case and interconnected into a serial or parallel compound interconnection structure to form a unitary system.

Abstract: A liquid crystal display device and a driving method thereof is presented in which a first liquid crystal cell is provided at one side of the data line, and a second liquid crystal cell is provided at the other side thereof. A first switching part is provided for each first liquid crystal cell positioned at an ith horizontal line (wherein i is an integer) to be controlled by the (i?1)th gate line and the ith gate line. A second switching part is provided for each second liquid crystal cell positioned at an ith horizontal line to be controlled by the ith gate line.

Abstract: A display device and driving method are provided. A display device includes a display area that includes a plurality of pixel cells in respective pixel regions defined by a plurality of gate and data lines crossing each other. A data driver is operable to supply data signals to the pixel cells. The pixel cells are connected with the first data line and are divided into a plurality of pixel-cell groups. The data driver is operable to supply the data signal of first polarity to the pixel cells included in the odd-numbered pixel-cell groups, and to supply the data signal of second polarity to the pixel cells included in the even-numbered pixel-cell groups. The first polarity is opposite to the second polarity. A shift register that is operable to drive the gate lines to supply the scan pulses of different amplitudes to neighboring pixel cells included in the different pixel-cell groups.

Abstract: A shift register includes a plurality of first to n-numbered stages, where n is a positive integer. Each stage includes a node controller controlling respective voltages of a first node and a second node in accordance with an output signal from the (i?j1)-numbered stage and an output signal from the (i+j2)-numbered stage, wherein i is a positive integer from 1 to n, j1 is a positive integer greater than or equal to 2, and j2 is a positive integer equal to or different from j1; and an output unit outputting one of a plurality of clock signals in accordance with the respective voltages of the first and second nodes.

Abstract: A driving circuit for a flat panel display device includes a generation unit for generating n-phase form generation clocks; and a plurality of shift register stages for sequentially generating a plurality gate signals to a plurality of gate lines using the n-phase form generation clocks, one of the shift register stage including first and second output terminals for outputting first and second switching signals, respectively, using an output signal of one of the preceding shift register stages and an output signal of one of the subsequent shift register stages; a first transistor connected to the first output terminal for receiving one of the n-phase form generation clocks; and a second transistor connected to the second output terminal and the first transistor, wherein each gate line is connected to a node between the first and second transistors.

Abstract: Disclosed herein is a liquid crystal display device which is capable of reducing the number of data drive integrated circuits (ICs) to curtail a production cost. The liquid crystal display device includes a plurality of pixel cells formed respectively in areas defined by a plurality of gate lines and a plurality of data lines, a first unit pixel including at least three of the pixel cells, the at least three pixel cells being connected to different ones of the data lines, and a second unit pixel including at least three of the pixel cells other than the at least three pixel cells of the first unit pixel, the at least three pixel cells of the second unit pixel being connected respectively to the different data lines to which the at least three pixel cells of the first unit pixel are connected, wherein the first and second unit pixels are arranged in a direction of the data lines and connected to different ones of the gate lines.

Abstract: A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.

Abstract: A liquid crystal display (LCD) device comprises a liquid crystal panel having a plurality of pixel regions defined by a plurality of gate lines and data lines, each pixel region associated with a thin film transistor, a gate driving unit having an amorphous semiconductor and integrally formed with the liquid crystal panel capable of sending a scan signal to the gate lines having a pulse width longer than a turned on time of the thin film transistor located within the pixel region, and a data driving unit connected to the data lines capable of sending an image signal to the data lines.

Abstract: A shift register includes a plurality of first to n-numbered stages, where n is a positive integer. Each stage includes a node controller controlling respective voltages of a first node and a second node in accordance with an output signal from the (i?j1)-numbered stage and an output signal from the (i+j2)-numbered stage, wherein i is a positive integer from 1 to n, j1 is a positive integer greater than or equal to 2, and j2 is a positive integer equal to or different from j1; and an output unit outputting one of a plurality of clock signals in accordance with the respective voltages of the first and second nodes.

Abstract: A driving circuit for a flat panel display device includes a generation unit for generating n-phase form generation clocks; and a plurality of shift register stages for sequentially generating a plurality gate signals to a plurality of gate lines using the n-phase form generation clocks, one of the shift register stage including first and second output terminals for outputting first and second switching signals, respectively, using an output signal of one of the preceding shift register stages and an output signal of one of the subsequent shift register stages; a first transistor connected to the first output terminal for receiving one of the n-phase form generation clocks; and a second transistor connected to the second output terminal and the first transistor, wherein each gate line is connected to a node between the first and second transistors.

Abstract: A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.

Abstract: An active matrix type display device is disclosed, to reduce a fabrication cost, which comprises first to third gate lines arranged at one direction; first and second data lines arranged orthogonally to the first to third gate lines; a first pixel cell connected to the first gate line and the first data line; a second pixel cell connected to the first gate line and the second data line; a third pixel cell connected to the second gate line and the first data line; a fourth pixel cell connected to the second gate line and the second data line; a fifth pixel cell connected to the third gate line and the first data line; and a sixth pixel cell connected to the third gate line and the second data line, wherein the three predetermined pixel cells of displaying the different colors among the first to sixth pixel cells constitute a first unit pixel for displaying a first unit image; and the three other pixel cells except the pixel cells included in the first unit pixel constitute a second unit pixel for displaying a

Abstract: An LCD device is disclosed, to minimize the signal distortion by decreasing the instability of voltage in a-Si:H TFT of a gate driving signal output unit, which includes a signal controller for outputting first and second control signals Q and /Q; a pull-up transistor between a clock signal terminal CLK and a gate driving signal output terminal for receiving the first control signal Q, the pull-up transistor having a first gate electrode, a first source electrode and a first drain electrode, wherein the pull-up transistor has an asymmetric structure in a first area of the first source electrode overlapped with the first gate electrode and a second area of the first drain electrode overlapped with the first gate electrode; and a pull-down transistor connected between the gate driving signal output terminal and a ground voltage terminal, wherein the pull-down transistor receives the second control signal.

Abstract: A display apparatus is disclosed. The display apparatus includes: a plurality of scan signal lines and a plurality of data signal lines that cross each other; a plurality of pixels formed at each crossing of the scan signal lines and the data signal lines, wherein each of the pixels includes sub-pixels that display red color, green color, blue color and white color in response to a scan signal from the scan signal lines and a data signal from the data signal lines, wherein the sub-pixels are arranged in a 2×2 matrix; a scan signal driving circuit including a plurality of stages that supplies the scan signal to the scan signal lines; and a data signal driving circuit that supplies the data signal to the data signal lines, wherein the scan signal driving circuit, the pixels, the scan signal lines and the data signal lines are formed on a same substrate.

Abstract: An LCD device is disclosed, to minimize the signal distortion by decreasing the instability of voltage in a—Si:H TFT of a gate driving signal output unit, which includes a signal controller for outputting first and second control signals Q and /Q; a pull-up transistor between a clock signal terminal CLK and a gate driving signal output terminal for receiving the first control signal Q, the pull-up transistor having a first gate electrode, a first source electrode and a first drain electrode, wherein the pull-up transistor has an asymmetric structure in a first area of the first source electrode overlapped with the first gate electrode and a second area of the first drain electrode overlapped with the first gate electrode; and a pull-down transistor connected between the gate driving signal output terminal and a ground voltage terminal, wherein the pull-down transistor receives the second control signal.

Abstract: A display apparatus is disclosed. The display apparatus includes: a plurality of scan signal lines and a plurality of data signal lines that cross each other; a plurality of pixels formed at each crossing of the scan signal lines and the data signal lines, wherein each of the pixels includes a sub-pixels that display red color, green color, blue color and white color in response to a scan signal from the scan signal lines and a data signal from the data signal lines, wherein the sub-pixels are arranged in a 2×2 matrix; a scan signal driving circuit including a plurality of stages that supplies the scan signal to the scan signal lines; and a data signal driving circuit that supplies the data signal to the data signal lines, wherein the scan signal driving circuit, the pixels, the scan signal lines and the data signal lines are formed on a same substrate.

Abstract: A driving circuit of a display device and a method for driving the display device are disclosed which are capable of reducing distortion of scan pulses supplied to gate lines of a liquid crystal panel. The driving circuit includes a first shift register for sequentially supplying first scan pulses to one-side ends of gate lines included in a display, respectively, to sequentially drive the gate lines, the first shift register simultaneously driving at least two adjacent ones of the gate lines for a predetermined period of time, and a second shift register for sequentially supplying second scan pulses to the other-side ends of the gate lines, respectively, to sequentially drive the gate lines, the second shift register simultaneously driving at least two adjacent ones of the gate lines for a predetermined period of time.

Abstract: A gate driver includes a plurality of stage groups, a gate driving circuit, and an output controller. The gate driving circuit supplies the plurality of stage groups with a plurality of clock pulses. The plurality of stage groups supply the input clock pulses to associated gate lines of a liquid crystal panel. The output controller generates a plurality of control voltage signals that control which of the plurality of stage groups generate an output signal.