Patents by Inventor Yong-Hoon An

Yong-Hoon An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8388212
    Abstract: A display apparatus includes a display panel, at least one light emitting diode package, and at least one light guide plate. The light emitting diode package includes a frame extending in a first direction, a plurality of branches branched from the frame in a second direction, and at least two light emitting diode chips inserted between and coupled with two adjacent branches.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: March 5, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung Hwan Baek, Young-keun Lee, Dongmin Yeo, Eui Jeong Kang, Yong-Hoon Kwon
  • Patent number: 8385935
    Abstract: A method for measuring a self-interference (SI) which occurs in a relay and controlling radio resources of a base station based on the measured SI, and a mobile telecommunication system using the same. The mobile telecommunication system includes a relay which calculates intensity of SI; and a base station which performs radio resource management based on the calculated SI intensity. The method for measuring SI includes calculating intensity of SI using a relay; and performing radio resource management at a base station based on the calculated SI intensity.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: February 26, 2013
    Assignee: LG-Ericsson Co., Ltd.
    Inventors: Hong Sup Shin, Yong Hoon Lim
  • Publication number: 20130043584
    Abstract: A package stack structure may an upper package include an upper package substrate having a first edge and a second edge opposite to the first edge. The upper package substrate has a first region arranged near the first edge and a second region arranged near the second edge. A first upper semiconductor device is mounted on the upper package substrate. The package stack structure may also include a lower package having a lower package substrate and a lower semiconductor device. The lower package is connected to the upper package through a plurality of inter-package connectors. The plurality of the inter-package connectors may include first inter-package connectors configured to transmit data signals; second inter-package connectors configured to transmit address/control signals; third inter-package connectors configured to provide a supply voltage for an address/control circuit; and fourth inter-package connectors configured to provide a supply voltage for a data circuit.
    Type: Application
    Filed: February 17, 2012
    Publication date: February 21, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: HEUNG-KYU KWON, SEONG-HO SHIN, YUN-SEOK CHOI, YONG-HOON KIM
  • Patent number: 8372961
    Abstract: Disclosed are concatameric proteins comprising two soluble domains, in which the C-terminus of a soluble domain of a biologically active protein is linked to the N-terminus of an identical soluble domain or a distinct soluble domain of a biologically active protein. Also, the present invention discloses dimeric proteins formed by formation of intermolecular disulfide bonds at the hinge region of two monomeric proteins formed by linkage of a concatamer of two identical soluble extracellular regions of proteins involving immune response to an Fc fragment of an immunoglobulin molecule, their glycosylated proteins, DNA constructs encoding the monomeric proteins, recombinant expression plasmids containing the DNA construct, host cells transformed or transfected with the recombinant expression plasmids, and a method of preparing the dimeric proteins by culturing the host cells. Further, the present invention discloses pharmaceutical or diagnostic compositions comprising the dimeric protein or its glycosylated form.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: February 12, 2013
    Assignee: Medexgen Co., Ltd.
    Inventors: Yong-Hoon Chung, Ji-Woong Han, Hye-Ja Lee, Eun-Yong Choi, Jin-Mi Kim
  • Patent number: 8373645
    Abstract: A light source driving device includes a resolution analyzing part, a dimming block adjusting part, a local dimming part and a light source unit. The resolution analyzing part obtains an image resolution. The dimming block adjusting part adjusts the size or the number of dimming blocks generating light in a local dimming method in response to the resolution. The local dimming part generates a local dimming signal for individually driving the dimming blocks in response to the image data and the size or the number of dimming blocks. The light source unit is driven by the local dimming signal to generate light. The size or the number of the dimming blocks is adjusted to be optimized for the obtained image resolution, so that regardless of the image resolution, a local dimming signal corresponding to the size and the number of the dimming blocks may be generated.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: February 12, 2013
    Assignee: Samsung Display Co., Ltd
    Inventors: Hee-Kwang Song, Gi-Cherl Kim, Dong-Min Yeo, Sang-Il Park, Yong-Hoon Kwon
  • Patent number: 8373165
    Abstract: A method of fabricating a semiconductor integrated circuit includes forming a first dielectric layer on a semiconductor substrate, patterning the first dielectric layer to form a first patterned dielectric layer, forming a non-single crystal seed layer on the first patterned dielectric layer, removing a portion of the seed layer to form a patterned seed layer, forming a second dielectric layer on the first patterned dielectric layer and the patterned seed layer, removing portions of the second dielectric layer to form a second patterned dielectric layer, irradiating the patterned seed layer to single-crystallize the patterned seed layer, removing portions of the first patterned dielectric layer and the second patterned dielectric layer such that the single-crystallized seed layer protrudes in the vertical direction with respect to the first and/or the second patterned dielectric layer, and forming a gate electrode in contact with the single-crystal active pattern.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: February 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-hoon Son, Si-young Choi, Jong-wook Lee
  • Patent number: 8367491
    Abstract: In a vertical-type semiconductor device, a method of manufacturing the same and a method of operating the same, the vertical-type semiconductor device includes a single-crystalline semiconductor pattern having a pillar shape provided on a substrate, a gate surrounding sidewalls of the single-crystalline semiconductor pattern and having an upper surface lower than an upper surface of the single-crystalline semiconductor pattern, a mask pattern formed on the upper surface of the gate, the mask pattern having an upper surface coplanar with the upper surface of the single-crystalline semiconductor pattern, a first impurity region in the substrate under the single-crystalline semiconductor pattern, and a second impurity region under the upper surface of the single-crystalline semiconductor pattern. The vertical-type pillar transistor formed in the single-crystalline semiconductor pattern may provide excellent electrical properties.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: February 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Hoon Son, Jong-Wook Lee, Jong-Hyuk Kang
  • Patent number: 8369931
    Abstract: The present invention relates to a method of determining the position of a deep brain stimulation (DBS) electrode which finds the position of the DBS electrode with respect to a deep brain target region, by using a first volume data set containing information on the deep brain target region and a second volume data set containing information on the DBS electrode implanted toward the deep brain target region, and which includes: a first step of generating a subvolume of the deep brain target region from the first volume data set, and also generating a subvolume of the DBS electrode from the second volume data set; and a second step of overlapping and displaying the subvolume of the deep brain target region and the subvolume of the DBS electrode.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: February 5, 2013
    Assignees: Cybermed, Inc., Seoul National University Industry Foundation
    Inventors: Sun Ha Paek, Yong Hoon Lim, Hyun Jae Kang, Se Ho Shin, Eun Ju Choi, Cheol Young Kim
  • Publication number: 20130027653
    Abstract: A liquid crystal display apparatus includes a liquid crystal display panel which displays an image, a light guide plate, a backlight unit including a light source part which generates and supplies light, and a panel temperature adjusting member on a surface of the liquid crystal display panel. The panel temperature adjusting member includes a transparent resistor, and a power supply which supplies power to the transparent resistor. The transparent resistor emits a larger amount of heat to a region of the liquid crystal display panel, which is distant from the light source part, than to a region close to the light source part, such that the liquid crystal display panel has uniform temperature distribution.
    Type: Application
    Filed: July 11, 2012
    Publication date: January 31, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong-Hoon KWON, Byoung Dae YE, JoongHyun KIM, Hyeeun PARK, SungKu BAEK, Young-Jun SEO
  • Publication number: 20130029135
    Abstract: The present invention relates to an adhesive film for a touch panel, and to a touch panel. The adhesive film has superior heat resistance, optical characteristics, wettability, cuttability, anti-warpage characteristics and chemical resistance, and exhibits superior durability when applied to a touch panel.
    Type: Application
    Filed: April 5, 2011
    Publication date: January 31, 2013
    Applicant: LG HAUSYS, LTD.
    Inventors: Jang-Soon Kim, Min-Seok Song, Yong-Hoon Lee, Eok-Hyung Lee, Won-Gu Choi, Hak-Rhim Han
  • Publication number: 20130017009
    Abstract: A cosmetic device for applying mascara and curling eyelashes simultaneously utilizing a heating means is disclosed. The cosmetic device comprises a battery housing, a brushing unit, a mascara container and a printed circuit board. The battery housing stores a battery and includes a battery cap, an over cap, a switch knob and an indicator. The brushing unit is designed for applying the mascara and curling the eyelashes simultaneously. The brushing unit includes a rod, a heating bar having a mascara brush and a comb brush and a heating means located inside the heating bar. The switch knob is designed to on/off the cosmetic device and the indicator indicates whether the switch knob is on/off. The heating means is adaptable to efficiently heat the brushing unit to make the mascara more liquid thereby allowing mascara application easily and evenly on the eyelashes of a user.
    Type: Application
    Filed: July 15, 2011
    Publication date: January 17, 2013
    Inventor: YONG HOON CHO
  • Publication number: 20130015909
    Abstract: The present invention relates to an adhesive composition for a touch panel, to an adhesive film, and to a touch panel. The adhesive composition according to the present invention provides an adhesive for a touch panel that has superior chemical resistance, superior durability under high-temperature or high-humidity conditions, and superior wettability or adhesion to a variety of adherends. In addition, the adhesive composition according to the present invention provides an adhesive which maintains superior resistant performance of a conductive layer and effectively prevents the corrosion of electrodes or the like when applied to a touch panel.
    Type: Application
    Filed: April 5, 2011
    Publication date: January 17, 2013
    Applicant: LG HAUSYS, LTD.
    Inventors: Jang-Soon Kim, Min-Seok Song, Eok-Hyung Lee, Hak-Rhim Han, Won-Gu Choi, Yong-Hoon Lee
  • Patent number: 8351531
    Abstract: An apparatus and a method for canceling interference using a space-frequency block coding in a multi-antenna system. The method includes confirming a code for coding to minimize a Pairwise Error Probability (PEP) of a transmit signal of which the PEP is maximized according to a time variation; and coding the transmit signal with the code and transmitting the coded signal via at least two antennas. Accordingly, the interference cancellation can be accomplished while lowering the complexity of the receiver without degrading the spectral efficiency.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: January 8, 2013
    Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Tak-Ki Yu, Yung-Soo Kim, Myeon-Kyun Cho, Jae-Yeun Yun, Yong-Hoon Lee, Jin-Gon Joung, Won-Yong Shin
  • Patent number: 8351284
    Abstract: A delay locked loop includes a closed loop circuit configured to generate preliminary delay information, a control unit configured to update the preliminary delay information into delay information in response to a control signal, and a first delay unit configured to delay an input clock signal by a first delay value determined by the delay information and generate an output clock signal.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: January 8, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yong-Hoon Kim, Hyun-Woo Lee
  • Patent number: 8350336
    Abstract: In a semiconductor device and a method of manufacturing the same, a first insulation layer is removed from a cell area of a substrate and a first active pattern is formed on the first area by a laser-induced epitaxial growth (LEG) process. Residuals of the first insulation layer are passively formed into a first device isolation pattern on the first area. The first insulation layer is removed from the second area of the substrate and a semiconductor layer is formed on the second area of the substrate by a SEG process. The semiconductor layer on the second area is patterned into a second active pattern including a recessed portion and a second insulation pattern in the recessed portion is formed into a second device isolation pattern on the second area. Accordingly, grain defects in the LEG process and lattice defects in the SEG process are mitigated or eliminated.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: January 8, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Hoon Son, Jong-Wook Lee
  • Publication number: 20130004695
    Abstract: The present invention relates to an adhesive composition, to an adhesive sheet, and to a touch panel. The present invention provides an adhesive composition, particularly an adhesive composition for a touch panel, which is prepared without using a low molecular weight polymer as an additive. The adhesive composition, the adhesive sheet, and the touch panel of the present invention exhibit superior heat resistance in a hardening process, a printed circuit board assembly process, or the like, and have superior physical properties such as optical characteristics, wettability, cuttability, workability, anti-curling properties, and durability.
    Type: Application
    Filed: April 5, 2011
    Publication date: January 3, 2013
    Applicant: LG HAUSYS, LTD.
    Inventors: Jang-Soon Kim, Yong-Hoon Lee, Eok-Hyung Lee, Hak-Rhim Han, Won-Gu Choi, Min-Seok Song
  • Publication number: 20120330020
    Abstract: According to the present invention, a method for preparing tetrazole methanesulfonic acid salts comprises an acylation reaction using a novel 4-iodine-4H-chromene-2-carbothionic acid S-benzothiazole-2-yl ester. The method of the present invention can shorten a reaction time and improve safety as compared to conventional methods, and can prepare high-purity tetrazole methanesulfonic acid salts at a high yield rate without using a column chromatography method.
    Type: Application
    Filed: January 14, 2011
    Publication date: December 27, 2012
    Applicant: HANMI SCIENCE CO., LTD
    Inventors: Keuk Chan Bang, Bum Woo Park, Jong Won Choi, Jae Chul Lee, Yong Hoon An, Young Gil Ahn, Maeng Sup Kim
  • Patent number: 8338873
    Abstract: Provided are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device may include a plurality of active pillars projecting from a semiconductor substrate, a gate pattern disposed on at least a portion of each of the active pillars with a gate insulator interposed therebetween, and a conductive line disposed on each of the active pillars and below the corresponding gate pattern, the conductive line may be insulated from the semiconductor substrate and the gate pattern, wherein each of the active pillars may include a drain region above the corresponding gate pattern, a body region adjacent to the corresponding gate pattern, and a source region that is in contact with the conductive line below the gate pattern.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: December 25, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Hoon Son, Jongwook Lee, Jung Ho Kim, SungWoo Hyun
  • Publication number: 20120319782
    Abstract: The present invention includes a class-E power amplifier, comprising a driver stage (DS) including a first power amplifier with transistors, to which an input signal is inputted; a main stage (MS), including a second power amplifier with transistors, whose input is connected to the output of the DS; and a first LC resonator whose one end is connected to the output of the DS and the other end to the ground as an AC equivalent circuit and a second LC resonator whose one end is connected to the input of the MS and the other end to the ground as an AC equivalent circuit. In accordance with the present invention, as the voltage stress is reduced on the CMOS class-E power amplifier, the application of the high power supply voltage may be allowed and therefore the load impedance may be high while the same efficiency is maintained.
    Type: Application
    Filed: December 15, 2010
    Publication date: December 20, 2012
    Applicant: SNU R&DB FOUNDATION
    Inventors: Sang Wook Nam, Yong Hoon Song, Sung Ho Lee, Jae Jun Lee, Eun Il Cho
  • Publication number: 20120319601
    Abstract: A light source module includes a LED array, a switch and a control part. The LED array includes a plurality of LED rows and a bridge light emitting part connecting the LED rows with each other. Each of the LED rows has a first direction light emitting part and a second direction light emitting part which are alternately disposed with each other. The switch adjusts an intensity of a current applied to the LED array. The control part determines an output status of the LED array and provides a control signal to the switch.
    Type: Application
    Filed: March 1, 2012
    Publication date: December 20, 2012
    Inventors: Byoung-Dae YE, Yong-Hoon Kwon, Hyung-Jin Kim