Abstract: Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.

Abstract: Disclosed herein is a mass production system and method of synthesized carbon nanotubes. The system is configured to completely open the reaction chamber to an outside during synthesis of the carbon nanotubes in the reaction chamber while allowing a specific gas to occupy a predetermined region within the reaction chamber, thereby blocking introduction of external air into the reaction chamber which is opened to external air.

Abstract: Provided is an apparatus and method for transmitting and receiving broadcasting data and supplementary data. The method includes: generating broadcasting data and supplementary data for a plurality of predetermined 3D broadcasting services to be provided to users; multiplexing the generated broadcasting data for broadcasting channels respectively allocated to the plurality of predetermined 3D broadcasting services, and multiplexing the generated supplementary data for one commonly broadcasting channel commonly allocated to the plurality of predetermined 3D broadcasting services; encoding the multiplexed supplementary data corresponding to a conditional access system; and transmitting the encoded supplementary data to the one common broadcasting channel, and transmitting the multiplexed broadcasting data to the allocated broadcasting channels.

Abstract: Provided is a semiconductor package including a de-coupling capacitor. The semiconductor package includes a substrate, on an upper surface of which a semiconductor chip is mounted; a plurality of first conductive bumps that are disposed on a lower surface of the substrate and that electrically connect the substrate to an external device; and a de-coupling capacitor that is disposed on the lower surface of the substrate and includes an electrode portion and at least one dielectric layer, wherein the electrode portion of the de-coupling capacitor includes second conductive bumps that electrically connect the substrate to an external device.

Abstract: Semiconductor devices and methods of forming the same may be provided. The semiconductor devices may include gate patterns and insulation patterns repeatedly and alternatingly stacked on a substrate. The semiconductor devices may also include a through region penetrating the gate patterns and the insulation patterns. The semiconductor devices may further include a channel structure extending from the substrate through the through region. The channel structure may include a first channel pattern having a first shape. The first channel pattern may include a first semiconductor region on a sidewall of a portion of the through region, and a buried pattern dividing the first semiconductor region. The channel structure may also include a second channel pattern having a second shape. The second channel pattern may include a second semiconductor region in the through region. A grain size of the second semiconductor region may be larger than that of the first semiconductor region.

Abstract: An embedded chip-on-chip package comprises a printed circuit board having a recessed semiconductor chip mounting unit, a first semiconductor chip embedded in the recessed semiconductor chip mounting unit, and a second semiconductor chip mounted on the first semiconductor chip and the printed circuit board.

Abstract: Methods and apparatuses for encoding and decoding data. The method for encoding data includes: receiving data; determining one quantizer from among a plurality of quantizers having a same quantization step size and different offset values; and transmitting an indicator and a quantized coefficient related to the determined quantizer. The method for decoding data includes: receiving an indicator and a quantized coefficient related to a quantizer; determining one de-quantizer from among a plurality of de-quantizers by using the indicator; and acquiring reconstructed data by de-quantizing the quantized coefficient by using the determined de-quantizer.

Abstract: A semiconductor package includes a substrate in which a plurality of wires are formed; at least one semiconductor chip electrically connected to portions of the plurality of wires; and a shielding can mounted on the substrate, surrounding the at least one semiconductor chip, electrically connected to at least one wire of the plurality of wires and including a soft magnetic material. The semiconductor package can prevent or substantially reduce electromagnetic interference (EMI).

Abstract: An image sensor chip, a camera module, and devices incorporating the image sensor chip and camera module include a light receiving unit on which light is incident, a logic unit provided to surround the light receiving unit, and an electromagnetic wave shielding layer formed on the logic unit and not formed on the light receiving unit.

Abstract: A semiconductor device includes an inorganic insulating layer on a semiconductor substrate, a contact plug that extends through the inorganic insulating layer to contact the semiconductor substrate and a stress buffer spacer disposed between the node contact plug and the inorganic insulating layer. The device further includes a thin-film transistor (TFT) disposed on the inorganic insulating layer and having a source/drain region extending along the inorganic insulating layer to contact the contact plug. The device may further include an etch stop layer interposed between the inorganic insulating layer and the semiconductor substrate.

Abstract: Provided are a three-dimensional semiconductor memory device and manufacturing method of the three-dimensional semiconductor memory device. The three-dimensional semiconductor memory device may include a gate structure on a substrate with the gate structure including a plurality of gate electrodes. Conductive lines are disposed between the gate structure and the substrate. A horizontal semiconductor pattern is disposed between the gate structure and the conductive line. And a vertical semiconductor pattern penetrating the gate structure is connected to the horizontal semiconductor pattern.

Abstract: A vertical pillar semiconductor device may include a substrate, a group of channel patterns, a gate insulation layer pattern and a gate electrode. The substrate may be divided into an active region and an isolation layer. A first impurity region may be formed in the substrate corresponding to the active region. The group of channel patterns may protrude from a surface of the active region and may be arranged parallel to each other. A second impurity region may be formed on an upper portion of the group of channel patterns. The gate insulation layer pattern may be formed on the substrate and a sidewall of the group of channel patterns. The gate insulation layer pattern may be spaced apart from an upper face of the group of channel patterns. The gate electrode may contact the gate insulation layer and may enclose a sidewall of the group of channel patterns.

Abstract: In a vertical-type memory device and a method of manufacturing the vertical-type memory device, the vertical memory device includes an insulation layer pattern of a linear shape provided on a substrate, pillar-shaped single-crystalline semiconductor patterns provided on both sidewalls of the insulation layer pattern and transistors provided on a sidewall of each of the single-crystalline semiconductor patterns. The transistors are arranged in a vertical direction of the single-crystalline semiconductor pattern, and thus the memory device may be highly integrated.

Abstract: A semiconductor memory device comprises a memory cell array comprising a plurality of memory cells, and a filling command determiner that receives a command signal and an address signal and determines whether the command signal corresponds to a filling command. Upon determining that the command signal corresponds to a filling command, the filling command determiner connects a first source voltage to a bitline and connects a second source voltage to a complementary bitline corresponding to the bitline. The bitline is connected to a selected memory cell corresponding to the address signal.

Abstract: A display apparatus includes a display panel, at least one light emitting diode package, and at least one light guide plate. The light emitting diode package includes a frame extending in a first direction, a plurality of branches branched from the frame in a second direction, and at least two light emitting diode chips inserted between and coupled with two adjacent branches.

Abstract: A method for authenticating an interactive optical disk, wherein first content is stored on the interactive optical disk for reproduction by a reproducing system, the method comprising: transmitting a first request to a content server to access second content from the content server based on enhanced navigation data recorded on the interactive optical disk; and authenticating identity of the interactive optical disk with the content server based on authentication data provided by the reproducing system, when the first request indicates that authentication is required.

Abstract: Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.

Abstract: Methods for manufacturing a semiconductor device include forming a seed layer containing a silicon material on a substrate. An amorphous silicon layer containing amorphous silicon material is formed on the seed layer. The amorphous silicon layer is doped with an impurity. A laser beam is irradiated onto the amorphous silicon layer to produce a phase change of the amorphous silicon layer and change the amorphous silicon layer into a single-crystal silicon layer based on the seed layer.

Abstract: Methods of fabricating metal-oxide-semiconductor (MOS) transistors having elevated source/drain regions are provided. The MOS transistors formed by these methods may include a gate pattern formed to cross over a predetermined region of a substrate. Recessed regions are provided in the substrate adjacent to the gate pattern. Epitaxial layers are provided on bottom surfaces of the recessed regions. High concentration impurity regions are provided in the epitaxial layers. The recessed regions may be formed using a chemical dry etching techniques.