Abstract: A corrosion-inhibiting cleaning composition for semiconductor wafer processing includes hydrogen peroxide at a concentration in a range from about 0.5 wt % to about 5 wt %, sulfuric acid at a concentration in a range from about 1 wt % to about 10 wt %, hydrogen fluoride at a concentration in a range from about 0.01 wt % to about 1 wt %; an azole at a concentration in a range from about 0.1 wt % to about 5 wt % and deionized water. The azole operates to inhibit corrosion of a metal layer being cleaned by chelating with a surface of the metal layer during a cleaning process.

Abstract: Methods of forming non-volatile memory devices include the steps of forming a semiconductor substrate having first and second floating gate electrodes thereon and an electrically insulating region extending between the first and second floating gate electrodes. A step is then performed to etch back the electrically insulating region to expose upper corners of the first and second floating gate electrodes. Another etching step is then performed. This etching step includes exposing upper surfaces and the exposed upper corners of the first and second floating gate electrodes to an etchant that rounds the exposed upper corners of the first and second floating gate electrodes. The step of etching back the electrically insulating region includes etching back the electrically insulating region to expose sidewalls of the first and second floating gate electrodes having heights ranging from about 30 ? to about 200 ?.

Abstract: A wafer guide includes a horizontal support panel and at least three vertical panels attached on one surface of the support panel. Each of the vertical panels has a vertical body panel and a plurality of protrusions upwardly extended from a top surface of the vertical body panel. Gap regions between the protrusions act as slots for holding wafers. Sidewalls of the slots have a convex shaped profile when viewed from a top view, and bottom surfaces of the slots also have a convex shaped profile when viewed from a cross sectional view that crosses the vertical panels.

Abstract: Cleaning solutions for integrated circuit devices and methods of cleaning integrated circuit devices using the same are disclosed. The cleaning solution includes about 30% aqueous ammonia solution, acetic acid by a volume percent higher then a volume percent of the aqueous ammonia solution, and deionized water by a volume percent higher then the volume percent of the acetic acid. Additionally, disclosed are methods wherein the cleaning solution is formed on integrated circuit substrates having an exposed metal pattern formed thereon, and further providing mega-sonic energy to the film of the cleaning solution.

Abstract: An apparatus for collecting impurities on a semiconductor wafer includes an airtight process chamber, a rotary chuck disposed in the process chamber for rotating and horizontally supporting the semiconductor wafer, a first scanning unit for forming a droplet of a first scanning solution and for scanning an upper surface of the semiconductor wafer rotated by the rotary chuck with the droplet to collect first impurities, a driving unit for tilting the rotary chuck and the semiconductor wafer supported on the rotary chuck, and a second scanning unit for receiving a second scanning solution for collecting second impurities from an edge portion of the semiconductor wafer, the second scanning solution being in contact with the edge portion of the semiconductor wafer tilted by the driving unit and rotated by the rotary chuck so that the second scanning solution scans the edge portion of the semiconductor wafer.

Abstract: A corrosion-inhibiting cleaning composition for semiconductor wafer processing includes an aqueous admixture of at least water, a surfactant and a corrosion-inhibiting compound selected from a group consisting of amino phosphonates, polyamines and polycarboxylic acids. The quantity of the corrosion-inhibiting compound in the admixture is preferably in a range from about 0.0001 wt % to about 0.1 wt % and the quantity of the surfactant is preferably in a range from about 0.001 wt % to about 1.0 wt %. The aqueous admixture may also include sulfuric acid and a fluoride, which act as oxide etchants, and a peroxide, which acts as a metal etchant.

Abstract: A method for forming a capacitor for use in a semiconductor device having electrode plugs surrounded by an insulating film and connected to underlying contact pads, includes sequentially forming an etch stop film and a mold oxide film on the insulating film and the electrode plugs, forming recesses in portions of the mold oxide film and the etching stopper film, the recesses exposing the electrode plugs, forming storage node electrodes in the recesses, filling the recesses in which the storage node electrodes are formed with an artificial oxide film, planarizing the storage node electrodes and the artificial oxide film so that the storage node electrodes are separated from one another, and selectively removing the mold oxide film and the artificial oxide film using a diluted hydrofluoric acid solution containing substantially no ammonium bifluoride.

Abstract: In a cleaning solution and a method of cleaning a semiconductor substrate, the cleaning solution includes about 1 to about 10 percent by weight of sulfuric acid, about 0.5 to about 5 percent by weight of aqueous hydrogen peroxide solution, and about 85 to about 98.5 percent by weight of hydrogen fluoric acid solution. Various polymers attached to a metal wiring formed on a substrate are removed by immersing the substrate into the cleaning solution. The substrate is rinsed to remove the cleaning solution remaining on the substrate. Thus, the polymers can be completely removed without damage to the metal wiring and an underlying oxide film.

Abstract: An apparatus includes a chamber for containing a fluid, a guide seated in the chamber, and a transfer robot for loading and/or unloading a plurality of wafers to and/or from the guide. The wafers are located on the guide. The guide has a supporting member for supporting a wafer and a stopper member for preventing the wafer from being inclined over a predetermined range. The stopper member is in contact with a wafer edge disposed at a higher position than a wafer edge supported by the supporting member. A wafer guide has a stopper member to prevent adjacent wafers from being inclined and coming in contact with each other. Therefore, it is possible to suppress a poor drying such as water spots (or watermarks) produced when wafers are adhered to each other in a drying process.

Abstract: An instantaneous pressure reducing heating and drying apparatus for an object, such as a wafer, includes a pressure reducing chamber; a vacuum pump for reducing a pressure in the pressure reducing chamber to below atmospheric pressure; a drying chamber installed within the pressure reducing chamber for drying the object that is loaded in the drying chamber; a pressure regulating valve installed in a wall of the drying chamber, wherein when the pressure regulating valve is opened a pressure in the drying chamber is instantaneously reduced to the pressure of the pressure reducing chamber; and a heating means for heating the drying chamber. In operation, the vacuum pump reduces a pressure of the pressure reducing chamber to below atmospheric pressure, and the pressure regulating valve installed in a wall of the drying chamber opens thereby instantaneously reducing the pressure the drying chamber to the reduced pressure of the pressure reducing chamber.

Abstract: An apparatus for drying a substrate using an isopropyl alcohol vapor includes a container for receiving an isopropyl alcohol vapor to dry a plurality of substrates wherein an opening is vertically formed through an upper portion of the container to permit the loading and unloading of the substrates; a supporting member for supporting the plurality of substrates in the container in a vertical direction and for supporting the substrates side by side in a horizontal direction, wherein the supporting member extends through the container and through the opening; and a cover for obstructing a flow of clean air from flowing directly from an air cleaner disposed over the container into the container through the opening. In addition, the apparatus may include an inert gas supplying member to supply an inert gas onto the substrates to prevent native oxide films from forming on the substrates.

Abstract: An exemplary etching composition includes about 0.1 to 8% by weight of hydrogen fluoride, about 10 to 25% by weight of ammonium fluoride, about 0.0001 to 3% by weight of a non-ionic polymer surfactant, and water. Using the composition in a wet etching process, an oxide layer may be selectively removed while a pattern or storage electrode including polysilicon may be effectively passivated. The oxide layer may be removed with a high etching selectivity, while at the same time minimizing damage to the polysilicon layer.

Abstract: A method of forming a recess channel trench pattern for forming a recess channel transistor is provided. A mask layer is formed on a semiconductor substrate, which is then patterned to expose an active region and a portion of an adjacent device isolating layer with an isolated hole type pattern. Using this mask layer the semiconductor substrate and the device isolating layer portion are selectively and anisotropically etched, thereby forming a recess channel trench with an isolated hole type pattern. The mask layer may be patterned to be a curved line type. In this case, the once linear portion is curved to allow the device isolating layer portion exposed by the patterned mask layer to be spaced apart from an adjacent active region. The semiconductor substrate and the device isolating layer portion are then etched, thereby forming a recess channel trench with a curved line type pattern.

Abstract: For planarizing an IC (integrate circuit) material, a first slurry is dispensed for a first planarization of the IC material using the first slurry, and a second slurry is dispensed for a second planarization of the IC material using the second slurry. The first and second slurries are different. For example, the first slurry is silica based for faster planarization during the first planarization. Thereafter, the second planarization is performed with the second slurry that is ceria based with higher planarity for attaining sufficient planarization of the IC material.

Abstract: In a cleaning solution and a method of cleaning a semiconductor substrate, the cleaning solution includes about 1 to about 10 percent by weight of sulfuric acid, about 0.5 to about 5 percent by weight of aqueous hydrogen peroxide solution, and about 85 to about 98.5 percent by weight of hydrogen fluoric acid solution. Various polymers attached to a metal wiring formed on a substrate are removed by immersing the substrate into the cleaning solution. The substrate is rinsed to remove the cleaning solution remaining on the substrate. Thus, the polymers can be completely removed without damage to the metal wiring and an underlying oxide film.

Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. The dielectric layer is etched with a chemical solution such as LAL. Prior to etching, the protruding portion of the electrode is removed or reduced to prevent any bubbles included in the chemical solution from adhering to the electrode. Thus, the chemical solution can etch the dielectric layers without being blocked by any bubbles included in a chemical solution.

Abstract: The chemical mechanical polishing (CMP) apparatus includes an insert pad that forms a local step on an upper surface of a polishing pad assembly. The insert pad is interposed between a rotatable platen and the polishing pad assembly.

Abstract: Provided is a method of fabricating a shallow trench isolation (STI) structure having a high aspect ratio and improved insulating properties. The exemplary method includes filling a shallow trench isolation region opening with an undoped polysilicon layer, removing an upper portion of the undoped polysilicon layer to form a second opening having a reduced aspect ratio relative to the original opening and filling the second opening with an insulating material to complete the STI structure. Additional protective layers including silicon oxide, silicon nitride and/or a capping layer may be provided on the sidewalls of the opening before depositing the undoped polysilicon.

Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. An etchant or chemical solution is applied to the dielectric layer and bubbles in the etchant are prevented from adhering to the electrode. In one embodiment, prior to etching, the protruding portion is covered with a buffer layer to prevent bubbles in the etchant from adhering to the electrode. Thus, the etchant can etch the dielectric layers without being blocked by bubbles included therein.

Abstract: A method of forming a contact hole of a semiconductor device that is able to prevent excessive etching of an interlayer dielectric pattern includes forming a gate pattern including a first insulation layer pattern, a conductive layer pattern, a capping insulation layer pattern, and a second insulation layer pattern on a substrate; forming a spacer using an insulating material on a sidewall of the gate pattern; forming an interlayer dielectric on the substrate on which the gate pattern and the spacer are formed; forming a contact hole and an interlayer dielectric pattern for exposing the substrate by etching the interlayer dielectric; forming a liner spacer on a sidewall of the spacer and the interlayer dielectric pattern; and cleaning the resultant structure using a cleaning solution. The cleaning solution preferably includes includes ozone water and hydrogen fluoride (HF).