Patents by Inventor Yong Lim

Yong Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6506676
    Abstract: A method of manufacturing semiconductor devices forms a surface channel CMOSFET in the process of manufacturing a metal gate. The method forms a (TixAly)1-zNz film (where z ranges from about 0.0 to about 0.2) having a work function value ranging from about 4.2 to about 4.3 eV on a gate insulating film in a nMOS region, a (TixAly)1-zNz film (where z ranges from about 0.3 to about 0.6) having a work function value ranging from about 4.8 to about 5.0 eV on the gate insulating film in a pMOS region, thus implementing a surface channel CMOS device both in the nMOS region and the pMOS region. Therefore, the threshold voltage is reduced.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: January 14, 2003
    Assignee: Hynix Semiconductor Inc
    Inventors: Dae Gyu Park, Tae Ho Cha, Se Aug Jang, Heung Jae Cho, Tae Kyun Kim, Kwan Yong Lim, In Seok Yeo, Jin Won Park
  • Patent number: 6501238
    Abstract: The present invention relates to a deflection yoke, and in particular, to an apparatus for correcting a mis-convergence and geometric distortion in a deflection yoke using a variable resistance, proving a more convenient way to adjust VCR by adjusting the current flowing in a comma-free coil using a variable resistance, instead of attaching a magnetic member as in the conventional method for the products associated with VCR (Vertial Green) properties.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: December 31, 2002
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sung Yong Lim, Hwan Seok Choe, Jin Young Park
  • Patent number: 6448166
    Abstract: The present invention discloses a method for forming a gate for semiconductor devices by depositing a TaOxNy film as a gate oxide film. The method includes the steps of providing a semiconductor substrate where a device isolation film has been formed, growing an SiO2 or SiON film on the semiconductor substrate, depositing an amorphous TaOxNy film on the SiO2 or SiON film, performing a low temperature annealing process to improve quality of the amorphous TaOxNy film, performing a high temperature annealing process ex-situ to remove organic substances and nitrogen in the amorphous TaOxNy film, and crystallize the amorphous TaOxNy film, and depositing a metal barrier film on the crystallized TaOxNy film, and depositing a polysilicon film or metal film for a gate electrode on the metal barrier film.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: September 10, 2002
    Assignee: Hynix Semiconductor Inc.
    Inventors: Heung Jae Cho, Dae Gyu Park, Kwan Yong Lim
  • Publication number: 20020086507
    Abstract: A method for forming a metal gate capable of preventing degradation in a characteristic of a gate insulating film upon formation of the metal gate. The method of forming the metal gate comprises the steps of providing a silicon substrate having device isolation films of a trench shape for defining an active region; forming a gate insulating film on the surface of the silicon substrate by means of a thermal oxidization process; sequentially forming a barrier metal film and a metal film for the gate on the gate insulating film; and patterning the metal film for the gate, the barrier metal film and the gate insulating film, wherein deposition of the barrier metal film and the metal film for the gate is performed by means of an atomic layer deposition (ALD) process or remote plasma chemical vapor deposition (CVD) process.
    Type: Application
    Filed: December 26, 2001
    Publication date: July 4, 2002
    Inventors: Dae Gyu Park, Heung Jae Cho, Kwan Yong lim
  • Publication number: 20020086504
    Abstract: A method of manufacturing semiconductor devices forms a surface channel CMOSFET in the process of manufacturing a metal gate. The method forms a (TixAly)1-zNz film (where z ranges from about 0.0 to about 0.2) having a work function value ranging from about 4.2 to about 4.3 eV on a gate insulating film in a NMOS region, a (TixAly)1-zNz film (where z ranges from about 0.3 to about 0.6) having a work function value ranging from about 4.8 to about 5.0 eV on the gate insulating film in a pMOS region, thus implementing a surface channel CMOS device both in the nMOS region and the pMOS region. Therefore, the threshold voltage is reduced.
    Type: Application
    Filed: December 27, 2001
    Publication date: July 4, 2002
    Inventors: Dae Gyu Park, Tae Ho Cha, Se Aug Jang, Heung Jae Cho, Tae Kyun Kim, Kwan Yong Lim, In Seok Yeo, Jin Won Park
  • Publication number: 20020063539
    Abstract: A ripple suppressor/compensator useful in the general area of motion control and applicable to a wide range of servomechanisms exhibiting a force ripple characteristics, including the permanent magnet linear motors. An adaptive feed-forward control signal is generated which compensates for the ripple force, thus allowing for more precise tracking performance to be achieved.
    Type: Application
    Filed: April 24, 2001
    Publication date: May 30, 2002
    Inventors: Kok Kiong Tan, Tong Heng Lee, Huifang Dou, Ser Yong Lim
  • Publication number: 20020001932
    Abstract: The present invention discloses a method for forming a gate for semiconductor devices by depositing a TaOxNy film as a gate oxide film. The method includes the steps of providing a semiconductor substrate where a device isolation film has been formed, growing an SiO2 or SiON film on the semiconductor substrate, depositing an amorphous TaOxNy film on the SiO2 or SiON film, performing a low temperature annealing process to improve quality of the amorphous TaOxNy film, performing a high temperature annealing process ex-situ to remove organic substances and nitrogen in the amorphous TaOxNy film, and crystallize the amorphous TaOxNy film, and depositing a metal barrier film on the crystallized TaOxNy film, and depositing a polysilicon film or metal film for a gate electrode on the metal barrier film.
    Type: Application
    Filed: July 2, 2001
    Publication date: January 3, 2002
    Applicant: Hynix Semiconductor, Inc.
    Inventors: Heung Jae Cho, Dae Gyu Park, Kwan Yong Lim
  • Patent number: 6293309
    Abstract: The invention relates to a control valve apparatus (1) providing reciprocal motion, comprising a spool (2) and sleeve (3), a passage (4) for fluid, which is hydraulic fluid in the embodiment, the passage (4) being openable and closable by the spool (2) and sleeve (3), ports (A, B, C) for fluid, and at least one seal (5, 6), the arrangement being such that a seat of one seal (5) reacts with a seat of another (6) whereby to open the another seal (6).
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: September 25, 2001
    Assignee: Twinwood Engineering Ltd
    Inventor: Kok Yong Lim
  • Patent number: 6182087
    Abstract: The present invention provides a method for modifying the Home Location Register (HLR) system database for digital wireless mobile communication. The method modifies or revises the database of the HLR system that is used to manage mobile subscribers by maintaining all the wireless communication system subscribers' information such as electronic serial number, directory number, international mobile station identification, user profile and current location, etc. The method includes extracting subscriber information from the database which resides in a main memory device and is being used at the present time; migrating the extracted information to a new database; and saving the migrated information onto a disk. In addition, the present method automatically generates the structure and contents of the database to be modified, regardless of each database version and structure, and without requiring the modification and testing of the source code by an operator.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: January 30, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae Yong Lim
  • Patent number: 5991213
    Abstract: A short disturb test algorithm for built-in self-test is provided. The short disturb test (108) initially writes a background pattern to all cells in a memory array (24). After verifying the background pattern was written, the opposite of the background pattern is written to a single row of the memory array for a fixed time. After that fixed time has elapsed, the original background pattern is written to the row. The memory array is then refreshed and the next row is written to. After all rows have been written to, the memory array (24) is checked for failures.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: November 23, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Danny R. Cline, Kuong Hua Hii, James M. Garnett, Siak Kian Lee, Tek Yong Lim, Keat Peng Lee