Patents by Inventor Yong Lim

Yong Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080224222
    Abstract: A fin transistor includes fin active region, an isolation layer covering both sidewalls of a lower portion of the fin active region, a gate insulation layer disposed over a surface of the fin active region, and a gate electrode disposed over the gate insulation layer and the isolation layer, and having a work function ranging from approximately 4.4 eV to approximately 4.8 eV.
    Type: Application
    Filed: December 27, 2007
    Publication date: September 18, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Se-Aug JANG, Heung-Jae CHO, Kwan-Yong LIM, Tae-Yoon KIM
  • Publication number: 20080218209
    Abstract: The present invention relates to a device for controlling a state of a terminal with respect to mobility management, and a method thereof. The state of the terminal includes a disconnected state and a connected state, the connected state includes an active state and an idle state, and the active state includes an active sub-state and a standby sub-state. The terminal in the active state updates location information for each cell, and the terminal in the idle state updates the location information for each radio access network registration area including a plurality of cells. The terminal in the active sub-state performs a handover when leaving a current cell. The terminal in the standby sub-state determines a quality of service (QoS) of packet data, and performs the handover or is set to be in the idle state according to the determined QoS.
    Type: Application
    Filed: August 23, 2006
    Publication date: September 11, 2008
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kyoung-Seok Lee, Soo-Jung Jung, Kang-Hee Kim, Soon-Yong Lim, Byung-Han Ryu, Jae-Heung Kim, Jeong-Im Kim, Geon-Min Yeo
  • Publication number: 20080180298
    Abstract: A single slope ADC using a hysteresis property includes a first comparator, a second comparator, and a code generating unit. The first comparator outputs a compared signal by receiving and comparing an input signal having a constant level with a ramp signal, the second comparator has a hysteresis property having an input terminal connected to an output terminal of the first comparator, and the code generating unit is connected to the second comparator and outputs a digital code corresponding to a time-point of a state transition of an output signal of the second comparator. The second comparator can be embodied as a Schmidt trigger or a Schmidt-trigger inverter. The single slope ADC further includes a controller that controls at least one of a rising threshold or a failing threshold of the Schmidt trigger or of the Schmidt-trigger inverter.
    Type: Application
    Filed: July 31, 2007
    Publication date: July 31, 2008
    Inventor: Yong Lim
  • Publication number: 20080157383
    Abstract: A semiconductor device includes a first conductive layer, a first intermediate structure over the first conductive layer, a second intermediate structure over the first intermediate structure, and a second conductive layer over the second intermediate structure. The first intermediate structure includes a metal silicide layer and a nitrogen containing metal layer. The second intermediate structure includes at least a nitrogen containing metal silicide layer.
    Type: Application
    Filed: September 26, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong LIM, Hong-Seon Yang, Heung-Jae Cho, Tae-Kyung Kim, Yong-Soo Kim, Min-Gyu Sung
  • Publication number: 20080160746
    Abstract: A method for fabricating a semiconductor device includes forming a first conductive layer over a substrate, forming an intermediate structure over the first conductive layer, the intermediate structure formed in a stack structure comprising at least a first metal layer and a nitrogen containing metal silicide layer, and forming a second conductive layer over the intermediate structure.
    Type: Application
    Filed: December 7, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong Lim, Hong-Seon Yang, Heung-Jae Cho, Tae-Kyung Kim, Yong-Soo Kim, Min-Gyu Sung
  • Publication number: 20080157205
    Abstract: A gate structure of a semiconductor device includes an intermediate structure, wherein the intermediate structure includes a titanium layer and a tungsten silicide layer. A method for forming a gate structure of a semiconductor device includes forming a polysilicon-based electrode. An intermediate structure, which includes a titanium layer and a tungsten silicide layer, is formed over the polysilicon-based electrode. A metal electrode is formed over the intermediate structure.
    Type: Application
    Filed: June 20, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Min-Gyu SUNG, Hong-Seon Yang, Heung-Jae Cho, Yong-Soo Kim, Kwan-Yong Lim
  • Publication number: 20080139668
    Abstract: Disclosed herein is a pharmaceutical composition for the prevention and treatment of restenosis following a blood vessel injury procedure, comprising obovatol as an active ingredient.
    Type: Application
    Filed: December 6, 2007
    Publication date: June 12, 2008
    Applicants: Korea Research Institute of Bioscience and Biotechnology, Chungbuk National University Industry-Academic Cooperation Foundation
    Inventors: Byoung Mog Kwon, Yeo-Pyo Yun, Yong Lim, Dong-Woon Kim, Jin-Sook Kwon, Seung-ho Lee, Jin-Tae Hong
  • Publication number: 20080079093
    Abstract: A method for fabricating a transistor including a bulb-type recess channel includes forming a bulb-type recess pattern in a substrate, forming a gate insulating layer over the substrate and the bulb-type recess pattern, forming a first gate conductive layer over the gate insulating layer, forming a void movement blocking layer over the first gate conductive layer in the bulb-type recess pattern, and forming a second gate conductive layer over the void movement blocking layer and the first gate conductive layer.
    Type: Application
    Filed: June 29, 2007
    Publication date: April 3, 2008
    Inventors: Kwan-Yong Lim, Hong-Seon Yang, Dong-Sun Sheen, Se-Aug Jang, Heung-Jae Cho, Yong-Soo Kim, Min-Gyu Sung, Tae-Yoon Kim
  • Publication number: 20080081452
    Abstract: A tungsten polymetal gate is made by forming a gate insulation layer and a polysilicon layer on a semiconductor substrate; depositing a barrier layer on the polysilicon layer; depositing a tungsten nucleation layer on the barrier layer through an ALD process; depositing a tungsten layer on the tungsten nucleation layer through a CVD process; depositing a hard mask layer on the tungsten layer; and etching the hard mask layer, the tungsten layer, the tungsten nucleation layer, the barrier layer, the polysilicon layer, and the gate insulation layer.
    Type: Application
    Filed: March 29, 2007
    Publication date: April 3, 2008
    Inventors: Soo Hyun KIM, Noh Jung KWAK, Baek Mann KIM, Young Jin LEE, Sun Woo HWANG, Kwan Yong LIM
  • Publication number: 20080081421
    Abstract: A dual polysilicon gate of a semiconductor device includes a substrate having a first region, a second region, and a third region, a channel region with a recessed structure formed in the first region of the substrate, a gate insulating layer formed over the substrate, a first polysilicon layer filled into the channel region, and formed over the gate insulating layer of the first and second regions, a second polysilicon layer formed over the gate insulating layer of the third region, and an insulating layer doped with an impurity, and disposed inside the first polysilicon layer in the channel region.
    Type: Application
    Filed: December 30, 2006
    Publication date: April 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong Lim, Heung-Jae Cho, Min-Gyu Sung
  • Publication number: 20080079048
    Abstract: A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong-Soo Kim, Hong-Seon Yang, Se-Aug Jang, Seung-Ho Pyi, Kwon Hong, Heung-Jae Cho, Kwan-Yong Lim, Min-Gyu Sung, Seung-Ryong Lee, Tae-Yoon Kim
  • Publication number: 20080043656
    Abstract: Disclosed is a power saving mode control system (200) and method in a wireless portable Internet system. Stations in the sleep mode are grouped by aligning listening intervals of the stations which enter the sleep mode in the power saving management system wherein the sleep interval for receiving no traffic data is exponentially increased. Therefore, the sleep mode of the grouped subscriber stations are easily managed, and power saving efficiency is enhanced and system complexity is lowered by easily and quickly detecting data states provided to the corresponding stations.
    Type: Application
    Filed: July 16, 2004
    Publication date: February 21, 2008
    Inventors: Chul-Sik Yoon, Soon-Yong Lim, Jae-Heung Kim, Kun-Min Yeo, Byung-Han Ryu, Seung-Ku Hwang
  • Publication number: 20080001145
    Abstract: A handler for testing packaged semiconductor chips includes a tray-transferring apparatus. Transferring members in the form of rods with external screw threads hold sides of the tray. The rods are rotated together to move the trays in a longitudinal direction. A driving unit rotates the rods together. The tray-transferring apparatus does not apply vibration to the tray during transit. Thus, it is possible to minimize the likelihood that chips contained in the tray are ejected due to vibration generated during transfer of the tray.
    Type: Application
    Filed: May 18, 2007
    Publication date: January 3, 2008
    Inventors: Sung Chu, Sung Park, Yong Lim
  • Publication number: 20070288824
    Abstract: The present invention relates to a method for retransmitting a packet in a mobile communication system. A waiting time for retransmission is established when a packet transmitted from a transmission unit to a receipt unit has no ACK message. A maximum number of times for retransmitting the packet is established when an NACK message is received. The ARQ transmitter moves to a discard state when the maximum management time of the ARQ block expires or the number of times of retransmissions exceeds the maximum number of times of retransmissions, and checks the ACK message receipt. The packet in the transmission buffer is discarded regardless of whether the distant message is transmitted or the discard message is transmitted or the discard message is checked when the ACK message is received.
    Type: Application
    Filed: December 29, 2004
    Publication date: December 13, 2007
    Inventors: Kun-Min Yeo, Chul-Sik Yoon, Jae-Heung Kim, Soon-Yong Lim, Byung-Han Ryu
  • Publication number: 20070281410
    Abstract: A first example embodiment provides a method of removing first spacers from gates and incorporating a low-k material into the ILD layer to increase device performance. A second example embodiment comprises replacing the first spacers after silicidation with low-k spacers. This serves to reduce the parasitic capacitances. Also, by implementing the low-k spacers only after silicidation, the embodiments' low-k spacers are not compromised by multiple high dose ion implantations and resist strip steps. The example embodiments can improve device performance, such as the performance of a rim oscillator.
    Type: Application
    Filed: June 5, 2006
    Publication date: December 6, 2007
    Inventors: Yong Meng Lee, Young Way Teh, Chung Woh Lai, Wenhe Lin, Khee Yong Lim, Wee Leng Tan, Hui Peng Koh, John Sudijono, Liang Choo Hsia
  • Publication number: 20070277074
    Abstract: A method for generating a feedback message for ARQ, the method including: a) recording an ACK type in a first field; b) estimating the last block sequence number of successively ACKed blocks and recording the estimated last block sequence number in a second field; c) recording the number of groups of successively ACKed blocks after the block sequence number estimated in b) as the number of ACK MAPs startblock sequence number of the respective ACK MAPs in a fourth field; e) recording the lengths of the respective ACK MAPs in a fifth field corresponding to the start block sequence number in d); and f) sending a feedback message including information on the first to the fifth fields.
    Type: Application
    Filed: December 29, 2004
    Publication date: November 29, 2007
    Inventors: Kun-Min Yeo, Chul-Sik Yoon, Jae-Heung Kim, Soon-Yong Lim, Byung-Han Ryu
  • Publication number: 20070274244
    Abstract: Disclosed is a method and device for controlling a power saving mode for applying the sleep mode for saving power consumption to the mobility of subscriber stations in a mobile communication network and a wireless Internet system. Subscriber stations entering the sleep mode are constantly grouped, listening intervals of the subscriber stations for each group are not superimposed, the existence state of traffic in the subscriber stations is independently notified for each group, and the overhead of signaling messages is minimized when the traffic is notified to the subscriber station in the sleep mode.
    Type: Application
    Filed: December 24, 2004
    Publication date: November 29, 2007
    Inventors: Chul-Sik Yoon, Jae-Heung Kim, Kun-Min Yeo, Soon-Yong Lim, Byung-Han Ryu
  • Patent number: 7301584
    Abstract: In a local oscillator for a tuning arrangement for both TV and FM signals there is substantial risk of parasitic oscillation. A special provision is disclosed for effectively reducing this risk. The special provision is a connection of a damping resistor (R1a) for suppressing parsitic oscillations between ground and a junction (J2) of a parallel LC resonator of the local oscillator.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: November 27, 2007
    Assignee: NXP B.V.
    Inventors: Alan Chin Leong Yeo, Kui Yong Lim
  • Publication number: 20070254595
    Abstract: A method for requesting and reporting channel quality information (CQI) in a wireless portable Internet system is disclosed. Timing of a channel quality information request by a base station is determined, existence of an automatic repeat request acknowledgment (ARQ_ACK) message of downlink data is determined on requesting the channel quality information from the subscriber station, the automatic repeat request acknowledgment message and the radio resource for the channel quality report to the subscriber station is allocated, the automatic repeat request acknowledgment message and the channel quality report information is received, and a modulating and coding level of downlink data is determined by extracting the channel quality report information from the automatic repeat request acknowledgment message.
    Type: Application
    Filed: February 2, 2005
    Publication date: November 1, 2007
    Inventors: Chul-Sik Yoon, Jae-Heung Kim, Kun-Min Yeo, Soon-Yong Lim, Byung-Han Ryu
  • Patent number: 7271066
    Abstract: Disclosed are a semiconductor devices and method of fabricating the same. Anti-etch films are formed in the top corners of the device isolation film using a material that has a different etch selectivity ratio from nitride or oxide and is not etched in an oxide gate pre-cleaning process. It is thus possible to prevent formation of a moat at the top corners of the device isolation film and the gate oxide film from being thinly formed, thereby improving reliability and electrical characteristics of the device.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: September 18, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwan Yong Lim, Heung Jae Cho, Jung Ho Lee