Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.

Abstract: MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

Abstract: An umbrella shape table lamp has a metal tube; an upper end of the metal tube and a plurality of bones. An upper end of the metal tube is installed with a lighting device at a middle position of the umbrella shape lampshade. The lighting device includes two lamp seats. Each of the lamp seats is formed by an upper half lamp seats and a lower half lamp seat. A positioning seat serves to connect the two lamp seats. Each lamp seat has a lampshade body which is divided into two parts. Each lamp seat has a bulb assembling cover for assembling a light reflecting cover, a bulb and an auxiliary conductive piece. Thus the umbrella shape table lamp has a beautiful outlook and has two bulbs so that the illumination coverage is wider that those of prior art.

Abstract: A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

Abstract: MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.

Abstract: A technique to read a stored state in a magnetoresistive random access memory (MRAM) device, such as a giant magneto-resistance (GMR) MRAM device or a tunneling magneto-resistance (TMR) device uses a bit line in an MRAM device that is segmented into a first portion and a second portion. An interface circuit compares the resistance of a first portion and a second portion of a first bit line to the resistance of a first portion and a second portion of a second bit line to determine the logical state of a cell in the first bit line. The interface circuit includes a reset circuit that selectively couples the outputs of the interface circuit together. A subsequent decoupling of the outputs allows cross-coupling within the interface circuit to latch the outputs to a logical state corresponding to the stored magnetic site, thereby allowing the stored state of a cell to be read.

Abstract: A technique to read a stored state in a magnetoresistive random access memory (MRAM) device, such as a giant magneto-resistance (GMR) MRAM device or a tunneling magneto-resistance (TMR) device uses a bit line in an MRAM device that is segmented into a first portion and a second portion. An interface circuit compares the resistance of a first portion and a second portion of a first bit line to the resistance of a first portion and a second portion of a second bit line to determine the logical state of a cell in the first bit line. The interface circuit includes a reset circuit that selectively couples the outputs of the interface circuit together. A subsequent decoupling of the outputs allows cross-coupling within the interface circuit to latch the outputs to a logical state corresponding to the stored magnetic state, thereby allowing the stored state of a cell to be read.

Abstract: In one aspect, the invention provides a catalyst for the production of synthesis gas, the catalyst comprising a) from about 0.1 to about 1.3% by weight of nickel that is supported on modified support, and b) a promoting agent. The catalyst can also comprise a dispersing agent. In another aspect, the invention provides a process for preparing the catalyst above, and a process for the catalytic partial oxidation of methane using the same catalyst.

Abstract: Disclosed are methods and apparatus for guaranteeing restoration of traffic between one or more cable modems and a backup cable modem termination system upon failure of an active cable modem termination system are disclosed. Subscriber information associated with one or more cable modems are received from an active cable modem termination system. The subscriber information includes one or more subscriber identifiers. For instance, the subscriber information may include a primary subscriber identifier that identifies a particular cable modem as well as a secondary subscriber identifier that is assigned to high priority traffic such as that being transmitted in real-time. In addition, the subscriber information may also include a scheduling type that is further used to categorize the real-time traffic, such as into voice or video traffic.

Abstract: A process that advantageously forms MRAM cells without the application of ion beam milling processes. Unlike conventional processes that rely on ion beam milling processes to remove materials from a magnetoresistive sandwich from areas other than areas that will later form MRAM cell bodies, this process forms a layer of photoresist over areas other than those areas that correspond to MRAM cell bodies. The photoresist is lifted off after the deposition of a magnetoresistive sandwich that forms the MRAM cell bodies, thereby safely removing the magnetoresistive sandwich from undesired areas while maintaining the magnetoresistive sandwich in the areas corresponding to MRAM cell bodies.

Abstract: MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

Abstract: A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.

Abstract: The nucleotide sequence and deduced amino acid sequences of the complete genome of a simian immunodeficiency virus isolate from a red-capped mangabey are disclosed. The invention relates to the nucleic acids and peptides encoded by and/or derived from these sequences and their use in diagnostic methods and as immunogens.

Abstract: A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.

Abstract: A magneto-resistive memory is disclosed that includes a high-speed sense amplifier, that can reliably operate at low signal levels. The sense amplifier includes offset cancellation to reduce or eliminate the internal offsets of the amplifier. The offset cancellation is controlled by one or more switches, which during operation, selectively enable the offset cancellation of the amplifier and store the offsets in one or more coupling capacitors.

Abstract: A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.

Abstract: MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.

Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.

Abstract: A method of measuring changes in signal level output of an integrated circuit sensor by providing a direct current (DC) or low frequency (AC) bias to the sensor and placing a floating gate semiconductor device on-chip and coupling the floating gate of the semiconductor device with the sensor. As a result, changes in signal level output of the sensor modulate charge at the gate. The semiconductor device in turn converts the modulated charge at the gate into output signals proportional to the changes in the signal level output. The measurement method provides a resolution in the sub-atto range.