Patents by Inventor Yong Lu

Yong Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7328379
    Abstract: A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: February 5, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Theodore Zhu, Gary Kirchner, Richard W. Swanson, Yong Lu
  • Patent number: 7293516
    Abstract: A vertical translation mechanism for reconfiguring the hull form of a reconfigurable vessel having independently movably side hulls and a center hull is disclosed. The vertical translation mechanism includes a hydraulic-force actuator and a nonmetallic bearing. The hydraulic force actuator comprises a rod that is disposed within a hydraulic cylinder. Responsive to changes in hydraulic pressure in the cylinder, the rod is extended or retracted therefrom. Movement of the rod controls the vertical translation of the center hull and its rotational attitude relative to the side hulls.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: November 13, 2007
    Assignee: Lockheed Martin Corporation
    Inventors: Stephen L. Bailey, Lewis D. Madden, Robert G. Bice, Yong Lu
  • Patent number: 7208323
    Abstract: A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising a pinned magnetic layer and a free magnetic layer. The two magnetic layers are formed having widened regions at the ends of the layers. As such, the shape made out by the magneto-resisitve memory, from a top-view perspective, is wide at the ends and narrower at the mid-, forming an I shape in one preferred embodiment. The end portions of the free magnetic layer are allowed to magnetically couple to the end portions of the pinned magnetic layer such that magnetic coupling is shifted to these widened regions and coupling in the mid-portion between the widened regions is minimized. Thus, the influence of the pinned magnetic layer on the magnetization orientation of the mid-portion of the free magnetic layer is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: April 24, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Theodore Zhu, Yong Lu, Anthony Arrott, Joel Drewes
  • Patent number: 7200035
    Abstract: A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: April 3, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Theodore Zhu, Yong Lu, Anthony Arrott
  • Publication number: 20070039533
    Abstract: A vertical translation mechanism for reconfiguring the hull form of a reconfigurable vessel having independently movably side hulls and a center hull is disclosed. The vertical translation mechanism includes a hydraulic-force actuator and a nonmetallic bearing. The hydraulic force actuator comprises a rod that is disposed within a hydraulic cylinder. Responsive to changes in hydraulic pressure in the cylinder, the rod is extended or retracted therefrom. Movement of the rod controls the vertical translation of the center hull and its rotational attitude relative to the side hulls.
    Type: Application
    Filed: March 30, 2006
    Publication date: February 22, 2007
    Applicant: Lockheed Martin Corporation
    Inventors: Stephen Bailey, Lewis Madden, Robert Bice, Yong Lu
  • Publication number: 20060262722
    Abstract: A dynamic channel change technique is disclosed which may be implemented between nodes and a Head End of an access network. Initially a network device may communicate with the Head End via a first downstream channel and a first upstream channel. When the network device receives a dynamic channel change request which includes instructions for the network device to switch to a second downstream channel, the network device may respond by switching from the first downstream channel to the second downstream channel. Thereafter, the network device may communicate with the Head End via the second downstream channel and first upstream channel. Further, according to a specific embodiment, the dynamic channel change request may also include an upstream channel change request for causing the network device to switch from a first upstream channel to a second upstream channel.
    Type: Application
    Filed: July 10, 2006
    Publication date: November 23, 2006
    Applicant: Cisco Technology, Inc.
    Inventors: John Chapman, Daniel Crocker, Feisal Daruwalla, Joanna Zang, Yong Lu
  • Publication number: 20060251097
    Abstract: A dynamic channel change technique is disclosed which may be implemented between nodes and a Head End of an access network. Initially a network device may communicate with the Head End via a first downstream channel and a first upstream channel. When the network device receives a dynamic channel change request which includes instructions for the network device to switch to a second downstream channel, the network device may respond by switching from the first downstream channel to the second downstream channel. Thereafter, the network device may communicate with the Head End via the second downstream channel and first upstream channel. Further, according to a specific embodiment, the dynamic channel change request may also include an upstream channel change request for causing the network device to switch from a first upstream channel to a second upstream channel.
    Type: Application
    Filed: July 10, 2006
    Publication date: November 9, 2006
    Applicant: Cisco Technology, Inc.
    Inventors: John Chapman, Daniel Crocker, Feisal Daruwalla, Joanna Zang, Yong Lu
  • Patent number: 7113484
    Abstract: A dynamic channel change technique is disclosed which may be implemented between nodes and a Head End of an access network. Initially a network device may communicate with the Head End via a first downstream channel and a first upstream channel. When the network device receives a dynamic channel change request which includes instructions for the network device to switch to a second downstream channel, the network device may respond by switching from the first downstream channel to the second downstream channel. Thereafter, the network device may communicate with the Head End via the second downstream channel and first upstream channel. Further, according to a specific embodiment, the dynamic channel change request may also include an upstream channel change request for causing the network device to switch from a first upstream channel to a second upstream channel.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: September 26, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: John T. Chapman, Daniel W. Crocker, Feisal Y. Daruwalla, Joanna Qun Zang, Yong Lu
  • Patent number: 7108804
    Abstract: In one aspect, the invention provides a catalyst for the production of synthesis gas, the catalyst comprising a) from about 0.1 to about 1.3% by weight of nickel that is supported on modified support, and b) a promoting agent. The catalyst can also comprise a dispersing agent. In another aspect, the invention provides a process for preparing the catalyst above, and a process for the catalytic partial oxidation of methane using the same catalyst.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: September 19, 2006
    Assignees: National University of Singapore, ABB Lummus Global Inc.
    Inventors: Yong Lu, Luwei Chen, Jianyi Lin, Frits M. Dautzenberg
  • Patent number: 7092285
    Abstract: The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated giant-magneto-resistive (GMR) structures. The present invention relates to non-volatile logic state retention devices, such as GMR storage elements, and concerns a save-on-power-down circuit that may be integrated with conventional semiconductor-based computing, logic, and memory devices to retain volatile logic states and/or volatile digital information in a non-volatile manner.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Yong Lu, Romney R. Katti
  • Publication number: 20060143193
    Abstract: A metadata driven system for supporting business application software required in the middle tier for a line of business applications includes a process metadata module adapted to store a process in metadata format, wherein the process object contains logic related to an entity of the application software. The system allows for persistence of various entities like accounts, incidents, etc., and allows an end user of the business application software to create new types of entities. The system also allows the end user to perform critical business logic operations even on the new entities defined by the end user after the deployment of the business application without requiring recompilation of the business application software. The metadata driven approach allows to easily make changes to business applications and to automate quality assurance of objects built on top of the business applications.
    Type: Application
    Filed: December 29, 2004
    Publication date: June 29, 2006
    Applicant: MICROSOFT CORPORATION
    Inventors: Jigar Thakkar, Jagan Peri, Andrey Zaytsev, Michaeljon Miller, Navin Thadani, Yong Lu, Jasjit Grewal
  • Patent number: 7058007
    Abstract: A protection CMTS is available to immediately service a cable modem should that modem's service from a working CMTS fail for any reason. To speed the service transfer (cutover) from the working CMTS to the protection CMTS, the cable modem may preregister with the protection CMTS well before the cutover becomes necessary. The cable modem's registration with both the working CMTS and the protection CMTS preferably employs a single IP address, so that the cable modem need not obtain a new IP address during cutover. While the cable modem may register with both the working CMTS and the protection CMTS, the devices are designed or configured so that only the working CMTS injects a host route for the cable modem into the appropriate routing protocol. Only after cutover to the protection CMTS does the protection CMTS inject its host route.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: June 6, 2006
    Assignee: Cisco Technology, Inc.
    Inventors: Feisal Daruwalla, James R. Forster, Guenter E. Roeck, Joanna Qun Zang, Yong Lu
  • Patent number: 7029923
    Abstract: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: April 18, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Harry Liu, William Larson, Lonny Berg, Theodore Zhu, Shaoping Li, Romney R. Katti, Yong Lu, Anthony Arrott
  • Patent number: 6992918
    Abstract: MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: January 31, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Shaoping Li, Theodore Zhu, Anthony S. Arrott, Harry Liu, William L. Larson, Yong Lu
  • Publication number: 20060015619
    Abstract: A hosting center that is remote from a plurality of customer environments is provided so that users can interact with data from the user's selected customer environment. The data interaction includes bidirectional synchronization of data between that of the hosting center and that of the user's selected customer environment.
    Type: Application
    Filed: December 30, 2004
    Publication date: January 19, 2006
    Applicant: Siebel Systems, Inc.
    Inventors: Kwong Tse, David Louie, Ching Huang, Jimin Li, Wenxin Li, Yong Lu, Tien Nguyen, George Eichholzer
  • Patent number: 6985382
    Abstract: A technique to read a stored state in a magnetoresistive random access memory (MRAM) device, such as a giant magneto-resistance (GMR) MRAM device or a tunneling magneto-resistance (TMR) device uses a bit line in an MRAM device that is segmented into a first portion and a second portion. An interface circuit compares the resistance of a first portion and a second portion of a first bit line to the resistance of a first portion and a second portion of a second bit line to determine the logical state of a cell in the first bit line. The interface circuit includes a reset circuit that selectively couples the outputs of the interface circuit together. A subsequent decoupling of the outputs allows cross-coupling within the interface circuit to latch the outputs to a logical state corresponding to the stored magnetic state, thereby allowing the stored state of a cell to be read.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: January 10, 2006
    Assignee: Micron Technology, Inc.
    Inventors: David E. Fulkerson, Yong Lu
  • Patent number: 6972988
    Abstract: The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated giant-magneto-resistive (GMR) structures. A non-volatile logic state retention devices, such as GMR storage elements, and concerns a save-on-power-down circuit that may be integrated with conventional semiconductor-based computing, logic, and memory devices to retain volatile logic states and/or volatile digital information in a non-volatile manner.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: December 6, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Yong Lu, Romney R. Katti
  • Patent number: 6968482
    Abstract: A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: November 22, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Theodore Zhu, Gary Kirchner, Richard W. Swanson, Yong Lu
  • Publication number: 20050226040
    Abstract: A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising a pinned magnetic layer and a free magnetic layer. The two magnetic layers are formed having widened regions at the ends of the layers. As such, the shape made out by the magneto-resisitve memory, from a top-view perspective, is wide at the ends and narrower at the mid-, forming an I shape in one preferred embodiment. The end portions of the free magnetic layer are allowed to magnetically couple to the end portions of the pinned magnetic layer such that magnetic coupling is shifted to these widened regions and coupling in the mid-portion between the widened regions is minimized. Thus, the influence of the pinned magnetic layer on the magnetization orientation of the mid-portion of the free magnetic layer is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.
    Type: Application
    Filed: June 7, 2005
    Publication date: October 13, 2005
    Inventors: Theodore Zhu, Yong Lu, Anthony Arrott, Joel Drewes
  • Publication number: 20050226039
    Abstract: A magneto-resistive memory comprising magneto-resistive memory cells is disclosed, comprising two pinned magnetic layers on one side of a free magnetic layer. The pinned magnetic layers are formed with anti-parallel magnetization orientations such that a net magnetic moment of the two layers is substantially zero. The influence of pinned magnetic layers on free magnetic layer magnetization orientations is substantially eliminated, allowing for increased predictability in switching behavior and increased write selectivity of memory cells.
    Type: Application
    Filed: June 6, 2005
    Publication date: October 13, 2005
    Inventors: Theodore Zhu, Yong Lu, Anthony Arrott