Abstract: A low-profile antenna is provided. A laminated substrate is formed into a structure in which a plurality of substrates having different permittivities are stacked, and a radiator consists of a plurality of unit patches disposed on an upper surface of the laminated substrate and generates an electric field perpendicular to the upper surface of the laminated substrate. Ground vias are formed from the respective unit patches to a ground plane disposed on a lower surface of the laminated substrate through the substrates constituting the laminated substrate. In the low-profile antenna, the radiator consisting of the plurality of patches is disposed on the upper surface of the laminated substrate having a structure in which the plurality of substrates are stacked to generate a magnetic loop around the patches, so that vertical polarized signals can be received due to a magnetic field perpendicular to the upper surface of the laminated substrate.

Abstract: A thin film transistor (TFT) for a liquid crystal display device includes a gate electrode, a source electrode, a drain electrode, an active region including a first semiconductor layer and a second semiconductor layer interposed within the first semiconductor layer, and an ohmic contact layer formed on the active region, wherein the source and drain electrodes are formed on the ohmic contact layer.

Abstract: An LCD device is disclosed. The LCD device includes dual gate transistors provided to an output portion for outputting a gate voltage. As such, the charge/discharge time of the output portion is reduced so the response time of liquid crystal is improved.

Abstract: Provided is a relay-synchronization signal (R-SS) transmitting apparatus and method in an orthogonal frequency division multiplexing (OFDM)-based Long Term Evolution Advanced (LTE-A) system having a multi-hop relay.

Abstract: The present invention relates to an apparatus and method for estimating a channel in a wireless communication system. The apparatus according to the present invention includes an estimator for initially estimating a channel response value by using a predetermined signal among reception signals, a detector for detecting transmission signals by using the channel response value and an operator for updating the channel response value by using detected transmission signals, a detection accuracy and reception signals.

Abstract: Receiving apparatus and method in a Multiple-Input Multiple-Output (MIMO) wireless communication system are provided. The receiver having N-ary receive antennas includes a decomposer for decomposing a channel matrix to a matrix Q and a matrix R through a QR decomposition; a detector for determining a candidate group of an n-th phase by estimating a plurality of transmit signal vectors by substituting a plurality of transmittable symbols into symbol combinations of a candidate group of a (n?1)-th phase as an n-th symbol and detecting (n+1)-th through N-th symbols using characteristics of the matrix R; a calculator for calculating square Euclidean distance values between the transmit signal vectors and a receive signal vector; and a determiner for determining the candidate group of the n-th phase by selecting transmit signal vectors having the smallest square Euclidean distance value among the transmit signal vectors.

Abstract: The present invention relates to a thin-film transistor in a liquid crystal display device and a method of fabricating the same, and the thin-film transistor may be configured by including a first gate electrode formed on an insulating substrate; a first gate insulation film formed on the insulating substrate including the first gate electrode; an active layer formed on the first gate insulation film; source/drain electrodes formed on the active layer and arranged at both sides of the first gate electrode; a second gate insulation film formed on the active layer and the first gate insulation film including the source/drain electrodes and provided with a contact hole for exposing part of the drain electrode; a second gate electrode overlapped with the first gate electrode on the second gate insulation film; and a pixel electrode electrically connected to the drain electrode through the contact hole.

Abstract: Provided are a virtual multi-antenna method for an orthogonal frequency division multiplexing (OFDM) system and an OFDM-based cellular system. The virtual multi-antenna method includes grouping sub-carriers in a frequency domain of an OFDM symbol and generating at least one group including G sub-carriers; and regarding the G sub-carriers included in the at least one group as multiple channels used in a multi-antenna technique and virtually applying the multi-antenna technique to the transmission and reception of the OFDM symbol. The virtual multi-antenna method can effectively reduce an interference signal and obtain the effects of a spatial division multiple access (SDMA) technique without physically using multiple antennas.

Abstract: An LCD device includes dual gate transistors provided to an output portion of the shift register for outputting a gate voltage. As such, the charge/discharge time of the output portion is reduced so the response time of liquid crystal is improved.

Abstract: An LCD device is disclosed. The LCD device includes dual gate transistors provided to an output portion for outputting a gate voltage. As such, the charge/discharge time of the output portion is reduced so the response time of liquid crystal is improved.

Abstract: Disclosed is a downlink signal configuring method and device, and synchronization and cell search method and device using the same in a mobile communication system. A downlink frame has plural symbols into which pilot subcarriers are distributively arranged with respect to time and frequency axes. Initial symbol synchronization and initial frequency synchronization are estimated by using a position at which autocorrelation of a cyclic prefix of a downlink signal and a valid symbol of the downlink is maximized, and cell search and integer-times frequency synchronization are estimated by using pilot subcarriers included in the estimated symbol. Fine symbol synchronization, fine frequency synchronization, and downlink frame synchronization is estimated by using an estimated cell search result.

Abstract: A method of manufacturing a semiconductor device may include implanting fluorine ions into a portion of a poly gate region on a semiconductor substrate; forming a gate oxide film over the semiconductor substrate such that the gate oxide film is thicker in the fluorine-implanted region; forming the poly gate over the gate oxide film in the poly gate region; and forming lightly doped drains in active regions of the semiconductor substrate on both sides of the poly gate. Further, the method of manufacturing the semiconductor device includes forming spacers over both sidewalls of the poly gate; and forming source and drain regions in the active regions.

Abstract: An array substrate for a display device and its fabrication method are disclosed. The array substrate for a display device includes: a gate wiring and a gate electrode connected to the wiring formed on a substrate; a gate insulating layer formed on the gate electrode; an active layer and a barrier metal layer stacked with the gate insulating layer interposed therebetween on the gate electrode; a data wiring formed on the barrier metal layer and source and electrodes connected to the data wiring; a passivation film formed on the source and drain electrodes and the data wiring and having a contact hole exposing a portion of the drain electrode, the barrier metal layer and the active layer; and a pixel electrode formed on the passivation film and being in contact with the drain electrode and the barrier metal layer including the active layer.

Abstract: A semiconductor device according to an embodiment includes: a substrate on which a source/drain region is formed; a gate oxide that includes a first oxide formed on the substrate and implanted with fluorine impurity, and a second oxide formed on the first oxide; a gate electrode that is formed on the gate oxide; and a spacer that is formed on a side of the gate electrode.

Abstract: A semiconductor device and fabricating method thereof are disclosed, by which channel mobility is enhanced and by which effect of flicker noise can be minimized. Embodiments relate to a method of fabricating a semiconductor device which includes forming a first epi-layer over a substrate, forming a second epi-layer over the first epi-layer, forming a gate electrode over the second epi-layer, forming a spacer over both sides of the gate electrode, etching an area adjacent both sides of the spacer to a depth of the substrate, forming an LDD region in a region under the spacer, and forming a third epi-layer for a source/drain region over the etched area adjacent both of the sides of the spacer.

Abstract: There are provided a MOSFET and a method for fabricating the same. The MOSFET includes a semiconductor substrate, a first epitaxial layer in a predetermined location of the semiconductor substrate, a second epitaxial layer doped with high concentration impurity ions on the first epitaxial layer, a gate structure on the second epitaxial layer, and source/drain regions with lightly doped drain (LDD) regions. The first epitaxial layer supplies carriers to the second epitaxial layer so that short channel effects are reduced.

Abstract: An apparatus for estimating an antenna weight vector in an Orthogonal Frequency Division Multiple Access System (OFDMA) having a smart antenna. The apparatus includes receiving and storing training symbols in the time domain transmitted to estimate an antenna weight vector during a training symbol transmission interval; estimating carrier frequency offsets using training symbols in the frequency domain that are obtained by performing a Fast Fourier Transformation (FFT) algorithm with respect to the training symbols received during the training symbol transmission interval; compensating the stored training symbols in the time domain based on the estimated carrier frequency offsets; and estimating an antenna weight vector using training symbols in the frequency domain that are obtained by applying an FFT algorithm with respect to the training symbols in the time domain derived by compensating the carrier frequency offsets during the training symbol transmission interval.

Abstract: A synchronization method is provided. In the synchronization method, a first mutual ranging symbol is transmitted to at least one other subscriber station. A second mutual ranging symbol is received from the other subscriber station. Uplink synchronization information is controlled on the basis of the second mutual ranging symbol.

Abstract: There are provided a method for fabricating a MOSFET. The method includes: substrate, forming a semiconductor substrate, a germanium layer by implanting germanium (Ge) ions into a semiconductor substrate, forming an epitaxial layer doped with high concentration impurities over the germanium layer, forming a gate structure on the epitaxial layer, and forming source/drain regions with lightly doped drain (LDD) regions in the semiconductor substrate. The germanium layer supplies carriers into the epitaxial layer so that short channel effects are reduced.

Abstract: A thin film transistor (TFT) for a liquid crystal display device includes a gate electrode, a source electrode, a drain electrode, an active region including a first semiconductor layer and a second semiconductor layer interposed within the first semiconductor layer, and an ohmic contact layer formed on the active region, wherein the source and drain electrodes are formed on the ohmic contact layer.