Patents by Inventor Yong-Soo Cho

Yong-Soo Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090156214
    Abstract: Provided is a handover method of a wireless communication system using a hierarchical cellular scheme. In the method, signal quality of a serving node is measured, so that whether to start scanning for a handover is determined. When the scanning for the handover starts, signal qualities of a serving cell including the serving node and one or more neighbor cells are measured through a first preamble including a first identifier for distinguishing a cell. An intra-cell handover or an inter-cell handover is selected using the signal qualities of the serving cell and the neighbor cells. Therefore, a terminal can easily distinguish between the inter-cell handover and the intra-cell handover, and an overhead during a handover can be reduced because an intra-cell handover procedure is simplified.
    Type: Application
    Filed: December 16, 2008
    Publication date: June 18, 2009
    Applicants: SAMSUNG ELECTRONICS CO., LTD., CHUNG-ANG UNIVERSITY INDUSTRY-ACADEMY
    Inventors: Joo-Hyun Lee, Jin-Ghoo Choi, Sang-Boh Yun, Jong-Ho Lee, Yong-Soo Cho, Jae-Kwon Kim, Yeong-Jun Kim, Kyung-Soo Woo, Hyun-Il Yoo
  • Publication number: 20090152648
    Abstract: Disclosed are a semiconductor device and a method of fabricating the same. The semiconductor device includes a gate electrode that includes a body part disposed on the semiconductor substrate and a projecting part projecting downward from the body part; and source/drain regions at opposite sides of the gate electrode.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 18, 2009
    Inventor: Yong Soo Cho
  • Patent number: 7542504
    Abstract: Method for providing frequency-hopping OFDMA using symbols of comb patter, the method including the steps of: a) assigning frequency domain signal X(k) of comb pattern (comb symbol, k is frequency index) to modulated data sequence, the comb symbol comprising predetermined number of sub carriers (sub carrier group) which are placed with predetermined interval in the whole available frequency band; b) getting the comb symbol hopped for the comb symbol to have independent frequency offset; and c) inverse fast fourier transforming the comb symbol to time domain signal x(n) (n is time index) and transmitting the signal.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: June 2, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyung-Hi Chang, Kwang-Soon Kim, Yong-Soo Cho, Suk-Won Ha
  • Publication number: 20090116590
    Abstract: A method and an apparatus for detecting a signal in a multi-antenna system using a spatial multiplexing are provided. The apparatus includes at least one antenna for receiving a signal, a channel estimator for estimating a channel using the received signal, a detector for calculating multiplication values commonly used to determine a Euclidean distance using the receive signal and channel information and for detecting a transmitted signal by calculating Euclidean distances of one or more candidate symbols using the receive signal and the determined multiplication values and a decoder for demodulating and decoding the detected signal. Hence, the computational complexity of the signal detection can be mitigated.
    Type: Application
    Filed: October 28, 2008
    Publication date: May 7, 2009
    Applicants: SAMSUNG ELECTRONICS CO. LTD., Chang-Ang University Industry-Academy Cooperation Foundation
    Inventors: Joo-Hyun LEE, Sang-Boh YUN, Sung-Soo HWANG, Yong-Soo CHO, Jae-Kwon KIM, Tae-Ho IM
  • Publication number: 20090116565
    Abstract: A method for selecting beams, a switched beam operation method during an initial synchronization process, and an initial synchronization method using it are provided for selecting beams to minimize the probability of occurrence of interferences between cells by considering a distance between beams within neighboring sectors during an initial synchronization process using switched beams, in an orthogonal frequency division multiplexing (OFDM) cellular system employing a smart antenna. The inventive method comprises the steps of dividing each cell into sectors, and counting the number of fixed beams per cell, and selecting a switched beam for minimizing probability of interference, from fixed beams presenting in a corresponding sector, based on distances between a selected beam and beams of all of adjacent cells and the number of cases to be selected in a subsequent time slot, according to the counted number of the fixed beams existing in each sector.
    Type: Application
    Filed: December 13, 2005
    Publication date: May 7, 2009
    Applicant: Chung-Ang University Industry-Academy Cooperation Foundation
    Inventors: Jae Young Ahn, Yong-Soo Cho, Hyun-Soo Ko
  • Publication number: 20090096023
    Abstract: A method for manufacturing a semiconductor device that eliminates the cause of increase in leakage current and therefore suppresses power increase in a highly integrated circuit by forming a shallow junction using a dopant-containing oxide film after etching a semiconductor substrate in source and drain regions.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 16, 2009
    Inventor: Yong-Soo Cho
  • Publication number: 20090057760
    Abstract: A semiconductor device and fabricating method thereof are disclosed, by which channel mobility is enhanced and by which effect of flicker noise can be minimized. Embodiments relate to a method of fabricating a semiconductor device which includes forming a first epi-layer over a substrate, forming a second epi-layer over the first epi-layer, forming a gate electrode over the second epi-layer, forming a spacer over both sides of the gate electrode, etching an area adjacent both sides of the spacer to a depth of the substrate, forming an LDD region in a region under the spacer, and forming a third epi-layer for a source/drain region over the etched area adjacent both of the sides of the spacer.
    Type: Application
    Filed: August 24, 2008
    Publication date: March 5, 2009
    Inventor: Yong-Soo Cho
  • Publication number: 20090010149
    Abstract: Provided are a virtual multi-antenna method for an orthogonal frequency division multiplexing (OFDM) system and an OFDM-based cellular system. The virtual multi-antenna method includes grouping sub-carriers in a frequency domain of an OFDM symbol and generating at least one group including G sub-carriers; and regarding the G sub-carriers included in the at least one group as multiple channels used in a multi-antenna technique and virtually applying the multi-antenna technique to the transmission and reception of the OFDM symbol. The virtual multi-antenna method can effectively reduce an interference signal and obtain the effects of a spatial division multiple access (SDMA) technique without physically using multiple antennas.
    Type: Application
    Filed: August 18, 2006
    Publication date: January 8, 2009
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyo Jin Lee, Jae Young Ahn, Yong Soo Cho, Kyu-Jin Lee, Kyung-Won Park
  • Publication number: 20080318386
    Abstract: There are provided a MOSFET and a method for fabricating the same. The MOSFET includes a semiconductor substrate, a germanium layer formed by implanting germanium (Ge) ions into the semiconductor substrate, an epitaxial layer doped with high concentration impurities over the germanium layer, a gate structure on the epitaxial layer, and source/drain regions with lightly doped drain (LDD) regions in the semiconductor substrate. The germanium layer supplies carriers into the epitaxial layer so that short channel effects are reduced.
    Type: Application
    Filed: September 4, 2008
    Publication date: December 25, 2008
    Inventor: Yong Soo Cho
  • Publication number: 20080310556
    Abstract: Receiving apparatus and method in a Multiple-Input Multiple-Output (MIMO) wireless communication system are provided. The receiver having N-ary receive antennas includes a decomposer for decomposing a channel matrix to a matrix Q and a matrix R through a QR decomposition; a detector for determining a candidate group of an n-th phase by estimating a plurality of transmit signal vectors by substituting a plurality of transmittable symbols into symbol combinations of a candidate group of a (n?1)-th phase as an n-th symbol and detecting (n+1)-th through N-th symbols using characteristics of the matrix R; a calculator for calculating square Euclidean distance values between the transmit signal vectors and a receive signal vector; and a determiner for determining the candidate group of the n-th phase by selecting transmit signal vectors having the smallest square Euclidean distance value among the transmit signal vectors.
    Type: Application
    Filed: June 12, 2008
    Publication date: December 18, 2008
    Inventors: Joo-Hyun Lee, Sang-Boh Yun, Young-Hoon Kwon, Soong-Yoon Choi, Yong-Soo Cho, Tae-Ho Im, Jae-Kwon Kim
  • Patent number: 7432541
    Abstract: A metal oxide semiconductor field effect transistor (MOSFET) is disclosed. The MOSFET includes a semiconductor substrate, a germanium layer formed by implanting germanium (Ge) ions into the semiconductor substrate, an epitaxial layer doped with high concentration impurities over the germanium layer, a gate structure on the epitaxial layer, and source/drain regions with lightly doped drain (LDD) regions in the semiconductor substrate. The germanium layer supplies carriers into the epitaxial layer so that short channel effects are reduced.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: October 7, 2008
    Assignee: Dongbuanam Semiconductor Inc.
    Inventor: Yong Soo Cho
  • Patent number: 7430193
    Abstract: In an OFDMA-based cellular system, a frame of a downlink signal includes a common slot and traffic slots. The common slot includes a synchronization preamble and a cell search preamble. The synchronization preamble has a structure for synchronizing time and frequency, and the cell search preamble has a cell search structure. The traffic slot includes pilot symbols provided on the time and frequency axes. A cyclic prefix is used to estimate initial symbol synchronization, and the initial symbol synchronization and the synchronization preamble are used to synchronize the frame. The synchronization frame and the cell search preamble are used to estimate time and frequency synchronization. The cell search preamble is used to search cells. When the initial synchronization is performed, the cyclic prefix is used to track the frequency, the synchronization preamble is used to track symbol synchronization, and the cell search preamble is used to track fine frequency synchronization.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: September 30, 2008
    Assignees: Electronics and Telecommunications Research Institute, Chung-Ang University
    Inventors: Kwang-Soon Kim, Kyung-Hi Chang, Yong-Soo Cho, Tae-Gon Kim
  • Publication number: 20080214115
    Abstract: The present invention relates to an apparatus and method for estimating a channel in a wireless communication system. The apparatus according to the present invention includes an estimator for initially estimating a channel response value by using a predetermined signal among reception signals, a detector for detecting transmission signals by using the channel response value and an operator for updating the channel response value by using detected transmission signals, a detection accuracy and reception signals.
    Type: Application
    Filed: December 21, 2007
    Publication date: September 4, 2008
    Applicants: Samsung Electronics Co., Ltd., Chung-Ang University Industry-Academy Cooperation Foundation
    Inventors: Suk-Seung Hwang, Joo-Hyun Lee, Sang-Boh Yun, Yong-Soo Cho, Jae-Kwon Kim, Kyu-In Lee
  • Publication number: 20080181174
    Abstract: Disclosed is a method and apparatus for increasingly improving a performance of a mobile communication system or a wireless broadcasting system, such as a Cellular System, a PCS (Personal Communication Service), a WiBro, a DMB (Digital Multimedia Broadcasting) or a GPS (Global Positioning System) by installing a mobile/fixed relay having multiple antennas in mobile vehicles, such as a automobile or a bus, or in fixed structures, such as a house or a building, to achieve beam-forming gain or diversity gain.
    Type: Application
    Filed: May 11, 2007
    Publication date: July 31, 2008
    Inventor: YONG SOO CHO
  • Publication number: 20080152032
    Abstract: An apparatus and method for receiving signals in a multiple-input, multiple-output (MIMO) wireless communication system is provided. A receiving end using as many as N Receive (Rx) antennas includes a first detector, as many as (N-2) nth detectors, and an Nth detector. A signal detection technique of the present invention has a low complexity and a throughput similar to that of a Maximum Likelihood (ML) scheme in a Multiple-Input Multiple-Output (MIMO) wireless communication system using a Spatial Multiplexing (SM) scheme.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 26, 2008
    Applicants: SAMSUNG ELECTRONICS CO., LTD, CHUNG-ANG UNIVERSITY INDUSTRY-ACADEMY COOPERATION FOUNDATION
    Inventors: Joo-Hyun Lee, Sang-Boh Yun, Yong-Soo Cho, Jae-Kwon Kim, Tae-Ho Im
  • Publication number: 20080142884
    Abstract: Embodiments relate to a semiconductor device, and to a semiconductor device and a method for manufacture that may improve a performance of a MOSFET device. According to embodiments, a semiconductor device may include a gate pattern formed of a gate dielectric layer formed in an active area of a semiconductor substrate and a first gate electrode pattern formed on the gate dielectric layer, an oxide pattern formed at both sides of the first gate electrode pattern, and a second gate electrode pattern formed on the first gate electrode pattern including the oxide pattern, a lightly doping drain (LDD) area formed in the inside of the substrate of the lower area of the oxide pattern, a spacer formed on both side-walls of the gate pattern, source/drain areas formed on the surface of the substrate of both sides of the gate pattern including the spacer, and a salicide film formed in the gate pattern and the source/drain areas.
    Type: Application
    Filed: November 27, 2007
    Publication date: June 19, 2008
    Inventor: Yong-Soo Cho
  • Patent number: 7382718
    Abstract: Disclosed is a transmitting and receiving method for reducing a time-varying channel distortion in an orthogonal frequency division multiplex (OFDM) system. In the present invention, the transmitter defines M sub-channels in one data group, mathematically analyzes a change of channel for each path causing a time-varying channel distortion in a high-speed mobile environment by approximation, calculates a weight value based on the mathematical analysis and assigns the calculated weight value to transmit data of each sub-channel. Subsequently, the receiver combines the signals of these M sub-channels and demodulates the combined signals. Accordingly, the present invention greatly reduces a distortion caused by the time-varying channel to improve a bit error rate and a channel estimation performance.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: June 3, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kyung-Hi Chang, Yun-Hee Kim, Yong-Soo Cho, Kyung-Won Park
  • Patent number: 7211859
    Abstract: A semiconductor device according to a exemplary embodiment of the present invention includes a reverse spacer exposing a part of an epitaxial silicon layer on a silicon substrate, a gate oxide layer on at least the epitaxial silicon layer and a gate polysilicon layer on the gate oxide layer and at least part of the reverse spacer, and source/drain terminals including a first doped (shallow junction) region in the silicon substrate at a position exterior to the exposed epitaxial silicon layer and a second doped (deep junction) region neighboring the first doped region. The semiconductor device can thus have an epitaxial silicon channel of nanometer size, an ultra-shallow junction, and a deep junction.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: May 1, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong-Soo Cho
  • Patent number: 7211491
    Abstract: A method of fabricating a gate electrode of a semiconductor device is disclosed. A disclosed method comprises growing a silicon epitaxial layer on a silicon substrate; making at least one trench through the epitaxial layer and filling the trench with a first oxide layer; etching the first oxide layer to form reverse spacers in the trench; depositing a second oxide layer and a polysilicon layer over the silicon substrate including the trench and the reverse spacers and forming a gate; implanting ions in the silicon substrate at both sides of the gate to form pocket-well and LDD areas; depositing a nitride layer over the silicon substrate including the gate and etching the nitride layer to form spacers; implanting ions using the spacers and the gate as a mask to make a source/drain region; and forming a silicide layer on the top of the gate electrode and the silicon epitaxial layer positioned on the source/drain region.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 1, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong Soo Cho
  • Patent number: 7211871
    Abstract: Transistors and methods of fabricating transistors are disclosed. A disclosed method comprises forming an inversion epitaxial layer on a silicon substrate; forming a hard mask on the inversion epitaxial layer; depositing a silicon epitaxial layer over the inversion epitaxial layer; forming a trench through the silicon epitaxial layer by removing the hard mask; forming reverse spacers on the sidewalls of the trench by filling the trench with an insulating layer and etching the insulating layer; forming a gate electrode over the reverse spacers; forming pocket-well regions and LDD regions in the silicon substrate by performing ion implantations; forming spacers on the sidewalls of the gate electrode; forming source and drain regions in the silicon substrate by performing an ion implantation; and forming a silicide layer on the gate electrode and the source and drain regions.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 1, 2007
    Assignee: Dongbu Electronics, Co., Ltd.
    Inventor: Yong Soo Cho