Patents by Inventor Yong Soo Kim

Yong Soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8319341
    Abstract: A gate structure of a semiconductor device includes an intermediate structure, wherein the intermediate structure includes a titanium layer and a tungsten silicide layer. A method for forming a gate structure of a semiconductor device includes forming a polysilicon-based electrode. An intermediate structure, which includes a titanium layer and a tungsten silicide layer, is formed over the polysilicon-based electrode. A metal electrode is formed over the intermediate structure.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: November 27, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min-Gyu Sung, Hong-Seon Yang, Heung-Jae Cho, Yong-Soo Kim, Kwan-Yong Lim
  • Patent number: 8303089
    Abstract: Provided is an electrical connector for a print ink cartridge.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: November 6, 2012
    Assignee: Molex Incorporated
    Inventor: Yong-Soo Kim
  • Publication number: 20120267015
    Abstract: Provided are: a non-oriented electrical steel sheet having outstanding magnetic properties and comprising, as percentages by weight, from 1.0 to 3.0% of Al, from 0.5 to 2.5% of Si, from 0.5 to 2.0% of Mn, from 0.001 to 0.004% of N, from 0.0005 to 0.004% of S and a balance of Fe and other unavoidably incorporated impurities, wherein the Al, Mn, N and S are included so as to satisfy the compositional formulae {[Al]+[Mn]}?3.5, 0.002?{[N]+[S]}?0.006, 300?{([Al]+[Mn])/([N]+[S])}?1,400; and a production method therefor. By optimising the Al, Si, Mn, N and S added components in this way, the distribution density of coarse inclusions is increased, thereby making it possible to improve crystal-grain growth properties and domain wall mobility and so produce the highest grade of non-oriented electrical steel sheet having superior magnetic properties, low hardness, and superior customer workability and productivity.
    Type: Application
    Filed: December 28, 2010
    Publication date: October 25, 2012
    Applicant: POSCO
    Inventors: Jae-Hoon Kim, Jae-Kwan Kim, Yong-Soo Kim, Won-Seog Bong
  • Patent number: 8294200
    Abstract: A non-volatile memory device includes a substrate, a tunneling layer over the substrate, a charge trapping layer including a nitride layer and a silicon boron nitride layer over the tunneling layer, and a blocking layer over the charge trapping layer, and a control gate electrode arranged on the blocking layer.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: October 23, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon Sig Joo, Seung Ho Pyi, Yong Soo Kim
  • Patent number: 8295608
    Abstract: There are provided a device and method for detecting joint parts of a steel strip in an endless hot rolling process.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: October 23, 2012
    Assignee: POSCO
    Inventors: Yong Soo Kim, Jong Il Park, Oh Dae Kim, Yun Hyeon Kim, Myoung Koo Kang, Jin Su Bae
  • Patent number: 8288819
    Abstract: A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: October 16, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yong Soo Kim, Hong Seon Yang, Se Aug Jang, Seung Ho Pyi, Kwon Hong, Heung Jae Cho, Kwan Yong Lim, Min Gyu Sung, Seung Ryong Lee, Tae Yoon Kim
  • Publication number: 20120258946
    Abstract: Substituted phenylureas and phenylamides, processes for their preparation, pharmaceutical compositions containing these compounds, and the use of these compounds for preparing pharmaceutical compositions.
    Type: Application
    Filed: November 9, 2011
    Publication date: October 11, 2012
    Applicant: Gruenenthal GmbH
    Inventors: Robert FRANK, Gregor Bahrenberg, Thomas Christoph, Klaus Schiene, Jean De Vry, Nils Damann, Sven Frormann, Bernhard Lesch, Derek John Saunders, Jeewoo Lee, Yong-Soo Kim, Myeong-Seop Kim, Hannelore Stockhausen
  • Patent number: 8241974
    Abstract: A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: August 14, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Heung-Jae Cho, Moon-Sig Joo, Yong-Soo Kim, Won-Joon Choi
  • Patent number: 8237220
    Abstract: In a high speed vertical channel transistor, a pillar structure is formed over a substrate, a gate electrode surrounds an outer wall of a lower portion of the pillar structure; and a word line extends in a direction to partially contact an outer wall of the gate electrode. The word line shifts toward a side of the pillar structure resulting in increased transistor speed.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: August 7, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min-Gyu Sung, Heung-Jae Cho, Yong-Soo Kim, Kwan-Yong Lim, Se-Aug Jang
  • Patent number: 8105909
    Abstract: A method of fabricating a non-volatile memory device includes: forming a tunnel insulation layer pattern and a floating gate electrode layer pattern over a semiconductor substrate; forming an isolation trench by etching an exposed portion of the semiconductor substrate so that the isolation trench is aligned with the tunnel insulation layer pattern and the floating gate electrode layer pattern; forming an isolation layer by filling the isolation trench with a filling insulation layer; forming a hafnium-rich hafnium silicon oxide layer over the isolation layer and the floating gate electrode layer pattern; forming a hafnium-rich hafnium silicon oxynitride layer by carrying out a first nitridation on the hafnium-rich hafnium silicon oxide layer; forming a silicon-rich hafnium silicon oxide layer over the hafnium-rich hafnium silicon oxynitride layer; forming a silicon-rich hafnium silicon oxynitride layer by carrying out a second nitridation on the silicon-rich hafnium silicon oxide layer; and forming a control
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: January 31, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon Sig Joo, Heung Jae Cho, Yong Soo Kim, Won Joon Choi
  • Publication number: 20120012928
    Abstract: A method for fabricating a transistor including a bulb-type recess channel includes forming a bulb-type recess pattern in a substrate, forming a gate insulating layer over the substrate and the bulb-type recess pattern, forming a first gate conductive layer over the gate insulating layer, forming a void movement blocking layer over the first gate conductive layer in the bulb-type recess pattern, and forming a second gate conductive layer over the void movement blocking layer and the first gate conductive layer.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Inventors: Kwan-Yong Lim, Hong-Seon Yang, Dong-Sun Sheen, Se-Aug Jang, Heung-Jae Cho, Yong-Soo Kim, Min-Gyu Sung, Tae-Yoon Kim
  • Patent number: 8048742
    Abstract: A method for fabricating a transistor including a bulb-type recess channel includes forming a bulb-type recess pattern in a substrate, forming a gate insulating layer over the substrate and the bulb-type recess pattern, forming a first gate conductive layer over the gate insulating layer, forming a void movement blocking layer over the first gate conductive layer in the bulb-type recess pattern, and forming a second gate conductive layer over the void movement blocking layer and the first gate conductive layer.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 1, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong Lim, Hong-Seon Yang, Dong-Sun Sheen, Se-Aug Jang, Heung-Jae Cho, Yong-Soo Kim, Min-Gyu Sung, Tae-Yoon Kim
  • Patent number: 8039337
    Abstract: A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: October 18, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Heung-Jae Cho, Moon-Sig Joo, Yong-Soo Kim, Won-Joon Choi
  • Publication number: 20110250746
    Abstract: A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
    Type: Application
    Filed: June 22, 2011
    Publication date: October 13, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Heung-Jae CHO, Moon-Sig JOO, Yong-Soo KIM, Won-Joon CHOI
  • Patent number: 8008178
    Abstract: A method for fabricating a semiconductor device includes forming a first conductive layer over a substrate, forming an intermediate structure over the first conductive layer, the intermediate structure formed in a stack structure comprising at least a first metal layer and a nitrogen containing metal silicide layer, and forming a second conductive layer over the intermediate structure.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: August 30, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong Lim, Hong-Seon Yang, Heung-Jae Cho, Tae-Kyung Kim, Yong-Soo Kim, Min-Gyu Sung
  • Publication number: 20110193154
    Abstract: A non-volatile memory device includes a substrate, a tunneling layer over the substrate, a charge trapping layer including a nitride layer and a silicon boron nitride layer over the tunneling layer, and a blocking layer over the charge trapping layer, and a control gate electrode arranged on the blocking layer.
    Type: Application
    Filed: April 19, 2011
    Publication date: August 11, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Moon Sig Joo, Seung Ho Pyi, Yong Soo Kim
  • Publication number: 20110186920
    Abstract: A semiconductor device includes a first conductive layer, a first intermediate structure over the first conductive layer, a second intermediate structure over the first intermediate structure, and a second conductive layer over the second intermediate structure. The first intermediate structure includes a metal silicide layer and a nitrogen containing metal layer. The second intermediate structure includes at least a nitrogen containing metal silicide layer.
    Type: Application
    Filed: March 8, 2011
    Publication date: August 4, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong LIM, Hong-Seon Yang, Heung-Jae Cho, Tae-Kyung Kim, Yong-Soo Kim, Min-Gyu Sung
  • Publication number: 20110181977
    Abstract: A method of writing a servo pattern of a hard disk drive includes measuring the speed of a head of the hard disk drive by reading a basic servo pattern written to only select ones of the data tracks of the disk, realizing a feedforward current profile when the difference between the actual speed of the head and a target speed of the head is within a predetermined range, and writing a reference servo pattern using the realized feedforward current profile. A final servo pattern is then written using the reference servo pattern.
    Type: Application
    Filed: January 4, 2011
    Publication date: July 28, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ha Yong Kim, Kyung Ho Kim, Kyu Nam Cho, Yong-Soo Kim
  • Publication number: 20110181983
    Abstract: A method of centering a disk of a hard disk drive includes arranging a disk on an upper end portion of a hub on which a plurality of disks are rotatably assembled, and assembling the disk on the hub by vibrating the hub. Accordingly, the disks and/or spacers may be easily assembled on the hub, a time of centering may be relatively much reduced, and a superior centering quality may be obtained.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 28, 2011
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Kyung Ho KIM, Ha Yong Kim, Kyu Nam Cho, Yong-Soo Kim
  • Publication number: 20110165769
    Abstract: A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
    Type: Application
    Filed: March 14, 2011
    Publication date: July 7, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventors: Heung-Jae CHO, Moon-Sig Joo, Yong-Soo Kim, Won-Joon Choi