Patents by Inventor Yong Soo Kim

Yong Soo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090121235
    Abstract: A transistor of a semiconductor device includes a substrate, a gate over the substrate, a source/drain region formed in the substrate to have a channel region therebetween, and an epitaxial layer formed below the channel region to have a different lattice constant from the substrate. The epitaxial layer having a different lattice constant with a substrate material is formed below the channel region to apply a stress to the channel region. Thus, the mobility of carriers of the transistor increases.
    Type: Application
    Filed: June 30, 2008
    Publication date: May 14, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong-Soo KIM, Jun-Ki Kim
  • Publication number: 20090117751
    Abstract: A method for fabricating a radical oxide layer includes providing a substrate, forming an oxide layer over the substrate through a radical oxidation process, and performing a thermal treatment on the oxide layer by using oxygen (O2).
    Type: Application
    Filed: June 27, 2008
    Publication date: May 7, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong-Soo KIM, Hong-Seon Yang, Heung-Jae Cho
  • Publication number: 20090114981
    Abstract: In a high speed vertical channel transistor, a pillar structure is formed over a substrate, a gate electrode surrounds an outer wall of a lower portion of the pillar structure; and a word line extends in a direction to partially contact an outer wall of the gate electrode. The word line shifts toward a side of the pillar structure resulting in increased transistor speed.
    Type: Application
    Filed: June 29, 2008
    Publication date: May 7, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Min-Gyu SUNG, Heung-Jae Cho, Yong-Soo Kim, Kwan-Yong Lim, Se-Aug Jang
  • Patent number: 7504981
    Abstract: A remote control device that can increase the convenience of a user, a display processing apparatus having the same and a method of driving the same are provided. The remote control device has a moving object and a vibration member generating a vibration. If a vibration is generated as the moving object moves, the remote control generates a signal in response to a moving path of the moving object. The remote control provides the generated signal to an electric device so as to remotely control the electric device. Accordingly, a user can operate the remote control only by moving the remote control so that the user's convenience is increased.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: March 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-sun Hong, Baik-hee Han, Yong-soo Kim
  • Publication number: 20090001418
    Abstract: A method for fabricating a transistor, the method includes forming a gate over a substrate to form a first resultant structure, forming a gate spacer at first and second sidewalls of the gate, etching portions of the substrate proximate to the gate spacer to form a recess in a source/drain region of the substrate, forming a first epitaxial layer including germanium to fill the recess, and performing a high temperature oxidation process to form a second epitaxial layer including germanium over an interfacial layer between the substrate and the first epitaxial layer, the second epitaxial layer having a germanium concentration that is higher than a germanium concentration of the first epitaxial SiGe layer, thereby forming a second resultant structure.
    Type: Application
    Filed: December 27, 2007
    Publication date: January 1, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong-Soo KIM, Hong-Seon Yang, Seung-Ho Pyi, Tae-Hang Ahn
  • Publication number: 20080272424
    Abstract: Disclosed herein is a nonvolatile memory device that includes a substrate, a tunneling layer over the substrate, a charge trapping layer over the tunneling layer, an insulating layer for improving retention characteristics over the charge trapping layer, a blocking layer over the insulating layer, and a control gate electrode over the blocking layer. Also disclosed herein is a method of making the device.
    Type: Application
    Filed: November 15, 2007
    Publication date: November 6, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Yong Top Kim, Hong Seon Yang, Tae Yoon Kim, Yong Soo Kim, Seung Ryong Lee, Moon Sig Joo
  • Publication number: 20080160746
    Abstract: A method for fabricating a semiconductor device includes forming a first conductive layer over a substrate, forming an intermediate structure over the first conductive layer, the intermediate structure formed in a stack structure comprising at least a first metal layer and a nitrogen containing metal silicide layer, and forming a second conductive layer over the intermediate structure.
    Type: Application
    Filed: December 7, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong Lim, Hong-Seon Yang, Heung-Jae Cho, Tae-Kyung Kim, Yong-Soo Kim, Min-Gyu Sung
  • Publication number: 20080157383
    Abstract: A semiconductor device includes a first conductive layer, a first intermediate structure over the first conductive layer, a second intermediate structure over the first intermediate structure, and a second conductive layer over the second intermediate structure. The first intermediate structure includes a metal silicide layer and a nitrogen containing metal layer. The second intermediate structure includes at least a nitrogen containing metal silicide layer.
    Type: Application
    Filed: September 26, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Kwan-Yong LIM, Hong-Seon Yang, Heung-Jae Cho, Tae-Kyung Kim, Yong-Soo Kim, Min-Gyu Sung
  • Publication number: 20080157185
    Abstract: A non-volatile memory device includes a substrate, a tunneling layer over the substrate, a charge trapping layer including a nitride layer and a silicon boron nitride layer over the tunneling layer, and a blocking layer over the charge trapping layer, and a control gate electrode arranged on the blocking layer.
    Type: Application
    Filed: June 29, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc
    Inventors: Moon Sig Joo, Seung Ho Pyi, Yong Soo Kim
  • Publication number: 20080157205
    Abstract: A gate structure of a semiconductor device includes an intermediate structure, wherein the intermediate structure includes a titanium layer and a tungsten silicide layer. A method for forming a gate structure of a semiconductor device includes forming a polysilicon-based electrode. An intermediate structure, which includes a titanium layer and a tungsten silicide layer, is formed over the polysilicon-based electrode. A metal electrode is formed over the intermediate structure.
    Type: Application
    Filed: June 20, 2007
    Publication date: July 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Min-Gyu SUNG, Hong-Seon Yang, Heung-Jae Cho, Yong-Soo Kim, Kwan-Yong Lim
  • Publication number: 20080096355
    Abstract: A memory device includes an active area protruding from a semiconductor substrate. A recess is formed in the active area. A field oxide layer is formed on the semiconductor substrate. A gate electrode extends across the active area while being overlapped with the recess. A gate insulation layer is interposed between the gate electrode and the active area. Source and drain areas are formed in the active area. The transistor structure above defines a recessed transistor structure if it is sectioned along a source-drain line and defines a Fin transistor structure if it is sectioned along a gate line. The transistor structure ensures sufficient data retention time and improves the current drivability while lowering the back bias dependency of a threshold voltage.
    Type: Application
    Filed: December 21, 2007
    Publication date: April 24, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Se Aug Jang, Yong Soo Kim, Jae Geun Oh, Jae Roh, Hyun Chul Sohn
  • Publication number: 20080093393
    Abstract: A single-use dispenser using air pressure and includes an outer vessel in which air and content material are charged, a fixed body coupled to an open upper end of the outer vessel, a valve installed in the fixed body for selectively dispensing the content material using pressurized air, and a push button coupled to a top of the valve for pushing the valve, thereby spraying out the content material and air, wherein the valve includes a hollow body, a hollow valve body elastically supported to a top of the body and moving into and out of a hollow of the body, a packing member installed on the valve body for blocking an orifice pipe, and an air suction hole formed to penetrate the body for supplementing air pressure of the outer vessel.
    Type: Application
    Filed: June 10, 2005
    Publication date: April 24, 2008
    Inventor: Yong-Soo Kim
  • Publication number: 20080079093
    Abstract: A method for fabricating a transistor including a bulb-type recess channel includes forming a bulb-type recess pattern in a substrate, forming a gate insulating layer over the substrate and the bulb-type recess pattern, forming a first gate conductive layer over the gate insulating layer, forming a void movement blocking layer over the first gate conductive layer in the bulb-type recess pattern, and forming a second gate conductive layer over the void movement blocking layer and the first gate conductive layer.
    Type: Application
    Filed: June 29, 2007
    Publication date: April 3, 2008
    Inventors: Kwan-Yong Lim, Hong-Seon Yang, Dong-Sun Sheen, Se-Aug Jang, Heung-Jae Cho, Yong-Soo Kim, Min-Gyu Sung, Tae-Yoon Kim
  • Publication number: 20080079048
    Abstract: A method for fabricating a semiconductor device includes providing a substrate having a bulb-type recessed region, forming a gate insulating layer over the bulb-type recessed region and the substrate, and forming a gate conductive layer over the gate insulating layer. The gate conductive layer fills the bulb-type recessed region. The gate conductive layer includes two or more conductive layers and a discontinuous interface between the conductive layers.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 3, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong-Soo Kim, Hong-Seon Yang, Se-Aug Jang, Seung-Ho Pyi, Kwon Hong, Heung-Jae Cho, Kwan-Yong Lim, Min-Gyu Sung, Seung-Ryong Lee, Tae-Yoon Kim
  • Patent number: D562800
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: February 26, 2008
    Assignee: LG Electronics Inc.
    Inventors: Yong Soo Kim, Il Soo Yeom
  • Patent number: D562801
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: February 26, 2008
    Assignee: LG Electronics Inc.
    Inventors: Yong Soo Kim, Il Soo Yeom
  • Patent number: D562803
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: February 26, 2008
    Assignee: LG Electronics Inc.
    Inventors: Yong Soo Kim, Il Soo Yeom
  • Patent number: D565539
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: April 1, 2008
    Assignee: LG Electronics Inc.
    Inventors: Yong Soo Kim, Young Kook Seo, Il Soo Yeom
  • Patent number: D565540
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: April 1, 2008
    Assignee: LG Electronics Inc.
    Inventors: Yong Soo Kim, Young Kook Seo, Il Soo Yeom
  • Patent number: D565545
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: April 1, 2008
    Assignee: LG Electronics Inc.
    Inventors: Yong Soo Kim, Young Kook Seo, Il Soo Yeom