Abstract: A memory device includes an active area protruding from a semiconductor substrate. A recess is formed in the active area. A field oxide layer is formed on the semiconductor substrate. A gate electrode extends across the active area while being overlapped with the recess. A gate insulation layer is interposed between the gate electrode and the active area. Source and drain areas are formed in the active area. The transistor structure above defines a recessed transistor structure if it is sectioned along a source-drain line and defines a Fin transistor structure if it is sectioned along a gate line. The transistor structure ensures sufficient data retention time and improves the current drivability while lowering the back bias dependency of a threshold voltage.

Abstract: A structure for supporting a sign board is disclosed. The structure includes: a post clamp having a pair of arched clamping bands which are hingedly coupled and joined to each other by a fastening element, at least one clamping band having a pillar; a hanger having a socket pipe joined to the pillar of the post clamp, a support bar inserted into the socket pipe and joined by a fastening element, the support bar having an axial coupling groove; at least one connector having a first coupling plate with a coupling bulge adapted to be fitted into the coupling groove of the support bar and with a first arched hinge holder, and a second coupling plate coupled to the first coupling plate having a second arched hinge holder; and a sign board having a coupling bulge and a guide slot through which the hinge holders of the connector pass.

Abstract: Disclosed is a method for manufacturing a transistor in a semiconductor device, which can improve a device's refresh characteristics. The method includes: providing a silicon substrate having active and field regions; performing a channel ion implantation into the substrate; sequentially forming a hard mask film and a photoresist pattern exposing a gate formation region where the channel ion implantation occurred; performing a second, higher concentration channel ion implantation using the photoresist pattern as a mask, forming doped regions in the substrate at the gate formation region and sides; etching a hard mask using the photoresist pattern as a barrier; removing the photoresist pattern; etching the substrate using a portion of the remaining hard mask as a barrier forming a groove; removing the remaining hard mask; forming a gate in the groove where the hard mask was removed; and forming source and drain regions at both sides of the gate.

Abstract: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers.

Abstract: An electrical connector is provided for mating with a complementary connecting device having a mating portion. The connector includes a shell having an internal cavity and a front opening for receiving the mating portion of the complementary connecting device inserted into the cavity. A housing is mounted in at least a rear portion of the shell and has a mating portion extending forwardly into the cavity. A shutter is slidably mounted in the shell and is formed with a passage for receiving the forwardly extending mating portion of the housing therethrough. When the mating portion of the complementary connecting device is inserted into the cavity through the front opening in the shell, the shutter is slidably pushed rearwardly from a forward position to a rear position whereat the mating portion of the housing passes through the passage in the shutter for engaging the mating portion of the complementary connecting device.

Abstract: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers.

Abstract: A remote control device that can increase the convenience of a user, a display processing apparatus having the same and a method of driving the same are provided. The remote control device has a moving object and a vibration member generating a vibration. If a vibration is generated as the moving object moves, the remote control generates a signal in response to a moving path of the moving object. The remote control provides the generated signal to an electric device so as to remotely control the electric device. Accordingly, a user can operate the remote control only by moving the remote control so that the user's convenience is increased.

Abstract: A gate structure of a semiconductor memory device capable of preventing a poly void generation by forming a hard mask and maintaining a hysteresis area within a certain value. The gate structure of the semiconductor memory device includes: a gate insulation layer formed on a semiconductor substrate; a gate electrode formed on the gate insulation layer, wherein the gate electrode is formed by stacking a polysilicon layer and a metal layer; and a hard mask formed on the gate electrode, wherein a hysteresis area between the hard mask and the gate electrode materials is a equal to or less than approximately 2×1012 ° C.-dyne/cm2.

Abstract: The present invention relates to a method for fabricating a capacitor employing ALD-TiN as an upper electrode and being suitable for preventing a deterioration of a leakage current property which uses an ALD-TiN as an upper electrode. The method for fabricating the capacitor includes: forming a lower electrode on a semiconductor substrate; forming a dielectric layer on the lower electrode; loading the semiconductor substrate containing the dielectric layer into a deposition chamber; nitriding a surface of the dielectric layer while NH3 gas is flowed into the deposition chamber; and forming an upper layer by using a source gas NH3, containing Titanium (Ti) on the nitrated surface of the dielectric layer through an atomic layer deposition (ALD) method.

Abstract: A cup-like container made of one or more of a plurality of materials. A sensor unit is provided for sensing a conducting current caused by a specific resistance depending on a state and component of contents that are filled into the container. A circuit unit is provided for storing melodies and sound selected by a user. A power source is provided. A speaker is placed in an inner portion of the container and adapted to use a thin metal piece as part of a vibration device. In this manner, the user is informed of the sate or component of the contents by issuing at least one of music, melody and voice, which are stored in the circuit unit and desired by the user, through the speaker according to a signal from the sensor unit.

Abstract: The present invention is related to a method for fabricating a transistor with a polymetal gate electrode structure. The method includes the steps of: forming a gate insulation layer on a substrate; forming a patterned gate stack structure on the gate insulation layer, wherein the patterned stack structure includes a polysilicon layer as a bottom layer and a metal layer as an upper layer; forming a silicon oxide-based capping layer along a profile containing the patterned gate stack structure and on the gate insulation layer at a predetermined temperature that prevents oxidation of the metal layer; and performing a gate re-oxidation process.

Abstract: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers.

Abstract: A tailgate handle apparatus is hidden in a tailgate having an upper panel and a lower panel both mounted in a vertical manner to give the tailgate a refined appearance. The tailgate handle apparatus is structured in a simple manner to give reliability in its operation and reduce the manufacturing cost of a vehicle.

Abstract: A gate structure of a semiconductor memory device capable of preventing a poly void generation by forming a hard mask and maintaining a hysteresis area within a certain value. The gate structure of the semiconductor memory device includes: a gate insulation layer formed on a semiconductor substrate; a gate electrode formed on the gate insulation layer, wherein the gate electrode is formed by stacking a polysilicon layer and a metal layer; and a hard mask formed on the gate electrode, wherein a hysteresis area between the hard mask and the gate electrode materials is a equal to or less than approximately 2×1012° C.-dyne/cm2.

Abstract: A structure for supporting a sign board is disclosed. The structure includes: a post clamp having a pair of arched clamping bands which are hingedly coupled and joined to each other by a fastening element, at least one clamping band having a pillar; a hanger having a socket pipe joined to the pillar of the post clamp, a support bar inserted into the socket pipe and joined by a fastening element, the support bar having an axial coupling groove; at least one connector having a first coupling plate with a coupling bulge adapted to be fitted into the coupling groove of the support bar and with a first arched hinge holder, and a second coupling plate coupled to the first coupling plate having a second arched hinge holder; and a sign board having a coupling bulge and a guide slot through which the hinge holders of the connector pass.