Abstract: According to one embodiment, a nonvolatile semiconductor memory device comprises a semiconductor substrate, a first layer formed above the semiconductor substrate, a first conductive layer, an inter-electrode insulating layer, and a second conductive layer sequentially stacked above the first layer, a memory film formed on an inner surface of each of a pair of through holes provided in the first conductive layer, the inter-electrode insulating layer, and the second conductive layer and extending in a stacking direction, a semiconductor layer formed on the memory film in the pair of through holes, and a metal layer formed in part of the pair of through holes and/or in part of a connection hole that is provided in the first layer and connects lower end portions of the pair of through holes, the metal layer being in contact with the semiconductor layer.

Abstract: In one embodiment, a shift register memory includes first and second control electrodes extending in a first direction parallel to a surface of a substrate, and facing each other in a second direction perpendicular to the first direction. The memory further includes a plurality of first floating electrodes provided in a line on a first control electrode side between the first and second control electrodes. The memory further includes a plurality of second floating electrodes provided in a line on a second control electrode side between the first and second control electrodes. Each of the first and second floating electrodes has a planar shape which is mirror-asymmetric with respect to a plane perpendicular to the first direction.

Abstract: A nonvolatile semiconductor memory device that has a new structure is provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device has a plurality of memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

Abstract: A nonvolatile semiconductor memory device includes: forming a stacked body by alternately stacking a plurality of interlayer insulating films and a plurality of control gate electrodes; forming a through-hole extending in a stacking direction in the stacked body; etching a portion of the interlayer insulating film facing the through-hole via the through-hole to remove the portion; forming a removed portion; forming a first insulating film on inner faces of the through-hole and the portion in which the interlayer insulating films are removed; forming a floating gate electrode in the portion in which the interlayer insulating films are removed; forming a second insulating film so as to cover a portion of the floating gate electrode facing the through-hole; and burying a semiconductor pillar in the through-hole.

Abstract: According to one embodiment, a method of operating a semiconductor memory device is disclosed. The method can include storing read-only data in at least one selected from a memory cell of an uppermost layer and a memory cell of a lowermost layer of a plurality of memory cells connected in series via a channel body. The channel body extends upward from a substrate to intersect a plurality of electrode layers stacked on the substrate. The method can include prohibiting a data erase operation of the read-only memory cell having the read-only data stored in the read-only memory cell.

Abstract: This nonvolatile semiconductor memory device comprises a transistor string formed on a substrate and including a plurality of first transistors connected in series with each other. A first bit line is connected to a first end of the transistor string. A source line is connected to a second end of the transistor string. A memory string extends in a direction perpendicular to the substrate and comprises a plurality of nonvolatile memory transistors and a select transistor connected in series. Moreover, a part of the memory string is connected to a gate of the first transistor.

Abstract: A memory string includes: a first semiconductor layer formed in a columnar shape extending in a stacking direction perpendicular to a substrate; a tunnel insulating film formed surrounding a side surface of the first semiconductor layer; a charge accumulation film formed surrounding the tunnel insulating film and configured to be capable of accumulating charges; a block insulating film formed surrounding the charge accumulation film; and a plurality of first conductive layers formed surrounding the block insulating film and disposed at a predetermined interval in the stacking direction. The first semiconductor layer comprises carbon-doped silicon and being formed to have different carbon concentrations in upper and lower portions in the stacking direction.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first stacked structure body, a first semiconductor layer, a first organic film, a first semiconductor-side insulating film, and a first electrode-side insulating film. The first stacked structure body includes a plurality of first electrode films stacked along a first direction and a first inter-electrode insulating film provided between the first electrode films. The first semiconductor layer is opposed to side faces of the first electrode films. The first organic film is provided between the side faces of the first electrode films and the first semiconductor layer and containing an organic compound. The first semiconductor-side insulating film is provided between the first organic film and the first semiconductor layer. The first electrode-side insulating film provided between the first organic film and the side faces of the first electrode films.

Abstract: According to one embodiment, in a semiconductor memory device, a block selection transistor is provided between a stacked body and a word line in a hierarchy selection area. The block selection transistor includes a plurality of semiconductor bodies, a plurality of gate insulating films, and a gate electrode. The plurality of semiconductor bodies respectively extend from the end portions of the respective electrode layers to the respective word lines. The plurality of gate insulating films are provided on the side walls of the respective semiconductor bodies. The gate electrode faces the side wall of the semiconductor body through the gate insulating film.

Abstract: According to one embodiment, a magnetic memory element includes: a magnetic wire, a stress application unit, and a recording/reproducing unit. The magnetic wire includes a plurality of domain walls and a plurality of magnetic domains separated by the domain walls. The magnetic wire is a closed loop. The stress application unit is configured to cause the domain walls to circle around along the closed loop a plurality of times by applying stress to the magnetic wire. The recording/reproducing unit is configured to write memory information by changing magnetizations of the circling magnetic domains as the domain walls circle around and to read the written memory information by detecting the magnetizations of the circling magnetic domains.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device, includes: a stacked body including a plurality of electrode layers stacked alternately with a plurality of insulating films; a plurality of first channel body layers; a memory film; a plurality of selection gates; a second channel body layer connecting to each of the plurality of first channel body layers; a gate insulating film; and a first interconnect electrically connected to at least one of the plurality of electrode layers. The stacked body has a through-hole communicating from the upper surface of the stacked body to the lower surface of the stacked body outside a cell region. And the first interconnect is drawn out through the through-hole from the upper surface side of the stacked body to the lower surface side of the stacked body.

Abstract: A semiconductor memory device according to one embodiment of the present invention includes a dielectric film configured to store information depending on presence or absence of a conductive path therein, and a plurality of electrodes provided to contact a first surface of the dielectric film. The conductive path can be formed between two electrodes arbitrarily selected form the plurality of electrodes. The conductive path has a rectifying property of allowing a current to flow more easily in a first direction connecting arbitrary two electrodes than in a second direction opposite to the first direction. The largest possible number of the conductive paths that may be formed is larger than the number of the plurality of electrodes.

Abstract: A magnetic memory device comprises a first electrode, a second electrode, a laminated structure comprising plural first magnetic layers being provided between the first electrode and the second electrode, a second magnetic layer comprising different composition elements from that of the first magnetic layer and being provided between plural first magnetic layers, a piezoelectric body provided on a opposite side to a side where the first electrode is provided in the laminated structure, and a third electrode applying voltage to the piezoelectric body and provided on a different position from a position where the first electrode is provided in the piezoelectric body.

Abstract: According to one embodiment, a columnar semiconductor, a floating gate electrode formed on a side surface of the columnar semiconductor via a tunnel dielectric film, and a control gate electrode formed to surround the floating gate electrode via a block dielectric film are provided.

Abstract: A non-volatile semiconductor storage device contains a memory cell region, a first electrode, and a second electrode. The memory cell region is formed on a substrate and comprises multiple memory cells stacked on the substrate as part of memory strings. Multiple first conductive layers are laminated on the substrate. The first electrode functions as an electrode at one side of a capacitive component and comprises multiple conductive layers stacked on the substrate and separated horizontally from stacked conductive layers of the second electrode which is disposed at a side of the capacitive component opposite the first electrode.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a conductive member, a semiconductor pillar, and a charge storage layer. The stacked body is provided above the substrate. The stacked body includes a plurality of insulating films stacked alternately with a plurality of electrode films. A plurality of terraces are formed in a stairstep configuration along only a first direction in an end portion of the stacked body on the first-direction side. The first direction is parallel to an upper face of the substrate. The plurality of terraces are configured with upper faces of the electrode films respectively. The conductive member is electrically connected to the terrace to connect electrically the electrode film to the substrate by leading out the electrode film in a second direction parallel to the upper face of the substrate and orthogonal to the first direction.

Abstract: A magnetic memory according to an embodiment includes: a magnetic nanowire; first insulating layers provided on a first surface of the magnetic nanowire, each of the first insulating layers having a first and second end faces, a thickness of the first insulating layer over the first end face being thicker than a thickness of the first insulating layer over the second end face; first electrodes on surfaces of the first insulating layers opposite to the first surface; second insulating layers on the second surface of the magnetic nanowire, each of the second insulating layers having a third and fourth end faces, a thickness of the second insulating layer over the third surface being thicker than a thickness of the second insulating layer over the fourth end face; and second electrodes on surfaces of the second insulating layers.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first stacked structure body, a first semiconductor layer, a first organic film, a first semiconductor-side insulating film, and a first electrode-side insulating film. The first stacked structure body includes a plurality of first electrode films stacked along a first direction and a first inter-electrode insulating film provided between the first electrode films. The first semiconductor layer is opposed to side faces of the first electrode films. The first organic film is provided between the side faces of the first electrode films and the first semiconductor layer and containing an organic compound. The first semiconductor-side insulating film is provided between the first organic film and the first semiconductor layer. The first electrode-side insulating film provided between the first organic film and the side faces of the first electrode films.

Abstract: According to one embodiment, the select transistor is provided between a memory array region and the layer selection portion. The channel body and the charge storage film are provided in the memory array region. The select transistor includes a gate electrode provided on a side wall of one of the line portions between the memory array region and the layer selection portion; and a gate insulator film provided between the gate electrode and the line portions. The gate electrode extends in the stacking direction.