Abstract: A working vehicle has improved operability and working efficiency during loading. A loading operation detector detects the start of a loading operation based on at least two of the following: whether a boom lever has been operated in its raise direction; whether a boom is in an attitude set in advance; whether the boom angle is less than an upper limit; whether a speed ratio when a brake is OFF is greater than or equal to a predetermined value; whether a predetermined speed stage is set; whether the traveling range has been changed from reverse to forward; and whether the angular velocity of the boom is greater than or equal to a predetermined value. By increasing the discharge amount of a loader pump, and/or by supplying hydraulic fluid to a boom cylinder from a switch pump, a hydraulic fluid amount increase controller supplies more hydraulic fluid to the boom.

Abstract: A spin MOS field effect transistor includes a source electrode and a drain electrode each having a structure obtained by stacking an impurity diffusion layer, a (001)-oriented MgO layer and a Heusler alloy. The impurity diffusion layer is formed in a surface region of a semiconductor layer. The (001)-oriented MgO layer is formed on the impurity diffusion layer. The Heusler alloy is formed on the MgO layer.

Abstract: It is possible to reduce a current required for spin injection writing. A magneto-resistance effect element includes: a first magnetization pinned layer; a magnetization free layer; a tunnel barrier layer; a second magnetization pinned layer whose direction of magnetization is pinned to be substantially anti-parallel to the direction of magnetization of the first magnetization pinned layer, and; a non-magnetic layer.

Abstract: A spin transistor includes a non-magnetic semiconductor substrate having a channel region, a first area, and a second area. The channel region is between the first and the second areas. The spin transistor also includes a first conductive layer located above the first area and made of a ferromagnetic material magnetized in a first direction; and a second conductive layer located above the second area and made of a ferromagnetic material magnetized in one of the first direction and a second direction that is antiparallel with respect to the first direction. The channel region introduces electron spin between the conductive layers. The spin transistor also includes a gate electrode located between the conductive layers and above the channel region; and a tunnel barrier film located between the non-magnetic semiconductor substrate and at least one of the conductive layers.

Abstract: A TMR device comprising an antiferromagnetic layer made of an antiferromagnetic material containing Mn, a magnetization fixed layer made of a ferromagnetic material, a tunnel barrier layer made of a dielectric material, and a magnetization free layer made of a ferromagnetic material. An insulator material layer is inserted in the magnetization fixed layer at a distance from the antiferromagnetic material layer and the tunnel barrier layer. One material can be expressed by NX, where X is a first element selected from the group consisting of oxygen, nitrogen and carbon; and N is a second element, provided that the bonding energy between the first and the second elements is higher than the bonding energy between manganese and the first element. A second material can be expressed by MX, where M is an element selected from the group consisting of titanium, tantalum, vanadium, aluminum, europium, and scandium; and X is an element selected from the group consisting of oxygen, nitrogen and carbon.

Abstract: A stack includes a crystalline MgO layer, crystalline Heusler alloy layer, and amorphous Heusler alloy layer. The crystalline Heusler alloy layer is provided on the MgO layer. The amorphous Heusler alloy layer is provided on the crystalline Heusler alloy layer.

Abstract: A programmable logic circuit includes: an input circuit configured to receive a plurality of input signals; and a programmable cell array including a plurality of unit programmable cells arranged in a matrix form, each of the unit programmable cells including a first memory circuit of resistance change type including a first transistor and a second memory circuit of resistance change type including a second transistor, the first and second memory circuits connected in parallel, each gate of the first transistors on same row respectively receiving one input signal, each gate of the second transistors on same row receiving an inverted signal of the one input signal, output terminals of the first and second memory circuits on same column being connected to a common output line.

Abstract: A spin transistor includes a first ferromagnetic layer, a second ferromagnetic layer, a semiconductor layer between the first and second ferromagnetic layers, and a gate electrode on or above a surface of the semiconductor layer, the surface being between the first and second ferromagnetic layers. The first ferromagnetic layer comprises a ferromagnet which has a first minority spin band located at a high energy side and a second minority spin band located at a low energy side, and has a Fermi level in an area of the high energy side higher than a middle of a gap between the first and second minority spin bands.

Abstract: It is possible to reduce a current required for spin injection writing. A magneto-resistance effect element includes: a first magnetization pinned layer; a magnetization free layer; a tunnel barrier layer; a second magnetization pinned layer whose direction of magnetization is pinned to be substantially anti-parallel to the direction of magnetization of the first magnetization pinned layer, and; a non-magnetic layer.

Abstract: It is made possible to provide a spin MOSFET that can minimize the increase in production costs and can perform both spin injection writing and reading. A spin MOSFET includes: a substrate that has a semiconductor region of a first conductivity type; first and second ferromagnetic stacked films that are formed at a distance from each other on the semiconductor region, and each have the same stacked structure comprising a first ferromagnetic layer, a nonmagnetic layer, and a second ferromagnetic layer stacked in this order, the second ferromagnetic stacked film having a film-plane area different from that of the first ferromagnetic stacked film; a gate insulating film that is formed on a portion of the semiconductor region, the portion being located between the first ferromagnetic stacked film and the second ferromagnetic stacked film; and a gate that is formed on the gate insulating film.

Abstract: A spin transistor includes a non-magnetic semiconductor substrate having a channel region, a first area, and a second area. The channel region is between the first and the second areas. The spin transistor also includes a first conductive layer located above the first area and made of a ferromagnetic material magnetized in a first direction; and a second conductive layer located above the second area and made of a ferromagnetic material magnetized in one of the first direction and a second direction that is antiparallel with respect to the first direction. The channel region introduces electron spin between the conductive layers. The spin transistor also includes a gate electrode located between the conductive layers and above the channel region; and a tunnel barrier film located between the non-magnetic semiconductor substrate and at least one of the conductive layers.

Abstract: It is made possible to cause spin inversion at a low current density which does not cause element destruction and to conduct writing with a small current. A magnetoresistance effect element includes: a magnetization pinned layer in which magnetization direction is pinned; a magnetic recording layer in which magnetization direction is changeable, the magnetization direction in the magnetization pinned layer forming an angle which is greater than 0 degree and less than 180 degrees with a magnetization direction in the magnetic recording layer, and the magnetization direction in the magnetic recording layer being inverted by injecting spin-polarized electrons into the magnetic recording layer; and a non-magnetic metal layer provided between the magnetization pinned layer and the magnetic recording layer.

Abstract: A spin-injection magnetic random access memory of an aspect of the present invention includes a magnetoresistive element, a unit which writes data into the magnetoresistive element by use of spin-polarized electrons generated by a spin-injection current and which applies, to the magnetoresistive element, a magnetic field of a direction of a hard magnetization of the magnetoresistive element during the writing.

Abstract: A vertical spin transistor according to an embodiment of the present invention includes: a first source/drain layer including a layer formed of magnetic material; a protruding structure including, a channel layer formed on the first source/drain layer and including a layer formed of semiconductor, and a second source/drain layer formed on the channel layer and including a layer formed of magnetic material; a gate insulating film formed on a side of the channel layer; and a gate electrode formed on a surface of the gate insulating film.

Abstract: An automatic analyzer for performing qualitative and quantitative analyses of living samples, such as blood and urine, which effectively utilizes the sample and enables requested tests to be performed as many as possible, when sample deficiency is predicted as a result of measuring a sample volume in advance. The analyzer includes a unit for measuring a sample volume, and has a function of, when sample deficiency is predicted, automatically changing an analysis mode to a decrease sample assay for a part of tests, thereby reducing a sample volume required depending on the measured sample volume.

Abstract: A spin MOSFET includes: a semiconductor substrate; a first magnetic film formed on the semiconductor substrate and including a first ferromagnetic layer, a magnetization direction of the first ferromagnetic layer being pinned; a second magnetic film formed on the semiconductor substrate to separate from the first magnetic film and including a magnetization free layer, a first nonmagnetic layer being a tunnel insulator and provided on the magnetization free layer, and a magnetization pinned layer provided on the first nonmagnetic layer, a magnetization direction of the magnetization free layer being changeable and a magnetization direction of the magnetization pinned layer being fixed; a gate insulating film provided at least on the semiconductor substrate between the first magnetic film and the second magnetic film; and a gate electrode formed on the gate insulating film.

Abstract: It is made possible to provide a highly reliable magnetoresistive effect element and a magnetic memory that operate with low power consumption and current writing and without element destruction. The magnetoresistive effect element includes a first magnetization pinned layer comprising at least one magnetic layer and in which a magnetization direction is pinned, a magnetization free layer in which a magnetization direction is changeable, a tunnel barrier layer provided between the first magnetization pinned layer and the magnetization free layer, a non-magnetic metal layer provided on a first region in an opposite surface of the magnetization free layer from the tunnel barrier layer, a dielectric layer provided on a second region other than the first region in the opposite surface of the magnetization free layer from the tunnel barrier layer; and a second magnetization pinned layer provided to cover opposite surfaces of the non-magnetic metal layer and the dielectric layer from the magnetization free layer.

Abstract: A semiconductor integrated circuit includes an n-channel spin FET including one of a magnetic tunnel junction and a magneto-semiconductor junction, the n-channel spin FET including a gate terminal to receive an input signal, a source terminal to receive a first power supply potential, and a drain terminal connected to an output terminal, a p-channel FET including a gate terminal to receive a clock signal, a source terminal to receive a second power supply potential, and a drain terminal connected to the output terminal, a subsequent circuit connected to the output terminal, and a control circuit which turns on the p-channel FET to start charging the output terminal, then turns off the p-channel FET to end the charging, and supplies the input signal to the gate terminal of the n-channel spin FET.

Abstract: A magnetoresistive element has a ferromagnetic double tunnel junction having a stacked structure of a first antiferromagnetic layer/a first ferromagnetic layer/a first dielectric layer/a second ferromagnetic layer/a second dielectric layer/a third ferromagnetic layer/a second antiferromagnetic layer. The second ferromagnetic layer that is a free layer consists of a Co-based alloy or a three-layered film of a Co-based alloy/a Ni—Fe alloy/a Co-based alloy. A tunnel current is flowed between the first ferromagnetic layer and the third ferromagnetic layer.

Abstract: A semiconductor device includes: a first source region and a first drain region formed at a distance from each other in a semiconductor substrate; a first gate insulating film formed on the semiconductor substrate between the first source region and the first drain region; a first gate electrode formed on the first gate insulating film; a first source electrode formed above the first source region and including a ferromagnetic layer having an easy axis of magnetization in a first direction; a first drain electrode formed above the first drain region and including a ferromagnetic layer magnetized in a second direction at an angle larger than 0 degrees but not larger than 180 degrees with respect to the first direction; and a second drain electrode formed above the first drain region, being located at a distance from the first drain electrode, and including a ferromagnetic layer magnetized in a direction substantially antiparallel to the second direction.