Patents by Inventor Yoshiaki Yamada

Yoshiaki Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6106782
    Abstract: A chromatograph is provided for accurately identifying components of a sample even with the use of a moving average method for noise reduction. A eluding solution is supplied to a column by a pump. In a sample injector, the sample injected into the column is separated into components by the column, and converted to an electric signal by a detector. A detected output signal is subjected to data processing in a data processor. The output signal is sampled at regular intervals and subjected to moving average processing in the detector. A sample injection signal from the sample injector is sent to the detector which generates a data processing start signal that is delayed by a time equal to a delay resulting from the moving average processing for the signal. The data processing start signal is sent to the data processor which starts the data processing in response to this signal.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: August 22, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yoshiaki Yamada, Kiyotoshi Mori
  • Patent number: 6093637
    Abstract: A multi-layer interconnection structure in a semiconductor device has a interlevel dielectric layer of three SiO.sub.2 films. The first SiO.sub.2 film has a small thickness not lower than 25 nm and is formed by a dual-frequency plasma enhanced CVD process using alkoxysilane as a reactive gas. The second SiO.sub.2 film has a large thickness ranging between 300 and 800 nm and is formed on the first SiO.sub.2 film by an atmospheric pressure CVD process using a mixture of alkoxysilane and ozone as a reactive gas. The third SiO.sub.2 film has a thickness of 50 nm and is flattened by an etch-back process of the same together with an overlying sacrificial spin-on glass film. A second layer interconnect pattern is formed on or above the flattened third SiO.sub.2 film with an excellent reliability.
    Type: Grant
    Filed: October 8, 1997
    Date of Patent: July 25, 2000
    Assignee: NEC Corporation
    Inventors: Koji Kishimoto, Yoshiaki Yamada
  • Patent number: 6058764
    Abstract: A reliable analytical apparatus is provided which can produce a highly reliable analytical Value on the basis of data entered during manual sample preparation which can be easily traced and used in editing of the analytical result of the analyzer because they are stored in association with the results of measurements by the analyzer. The analytical apparatus has an input device for inputting sample preparation procedures through the display screen, and various computations based on weighed quantities, constant dilution volume and so on entered during the manual preparation, which are automatically executed so as to eliminate human error.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: May 9, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Yoshiaki Yamada, Kiyotoshi Mori, Masato Fukuda
  • Patent number: 5997398
    Abstract: A semiconductor wafer storage apparatus includes a wafer storage unit main body and a gas supply unit with a chemical filter, the gas supply unit being arranged independently of the wafer storage unit.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: December 7, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshiaki Yamada, Hiroshi Watanabe
  • Patent number: 5910020
    Abstract: Disclosed is a method for fabricating a semiconductor device which prevents generation of imperfections in an aluminum alloy as an upper wiring even when part of a refractory metal pillar, which fills in a contact hole connecting lower and upper wiring layers, is exposed due to displacement of the upper wiring layer. The method comprises forming a third insulation film, a second insulation film and a second wiring layer, on a first wiring layer, forming holes which extend to the first wiring layer therethrough, forming refractory metal pillars by filling in the holes with a refractory metals, and forming a fourth insulation film. The second wiring layer is formed within a groove formed by removing the third and fourth insulation films to expose top and side surfaces of the refractory metal pillar. Even when displacement is caused between the refractory metal pillar and the second wiring layer, the reliability does not decrease, since the refractory metal pillars are covered with the fourth insulation film.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: June 8, 1999
    Assignee: NEC Corporation
    Inventor: Yoshiaki Yamada
  • Patent number: 5900645
    Abstract: A semiconductor device is tested without destroying a substrate immediately after a formation of a metal film and before patterning the metal film.To this end, the substrate is first divided into a product region and a test pattern region. Next, an insulating film is formed on the substrate. Thereafter, openings are formed in the insulating film and on the product region and the test pattern region. Subsequently, the metal film is formed in the openings and on the insulating film. Finally, the metal film is patterned to form a wiring pattern.Under these circumstances, a forming state of the metal film in the opening on the test pattern region is actually tested. Specifically, the presence or absence of a void is checked. In accordance with this test result, a forming state of the metal film in the opening in the product region is evaluated.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: May 4, 1999
    Assignee: NEC Corporation
    Inventor: Yoshiaki Yamada
  • Patent number: 5889801
    Abstract: A driving method for a tunable semiconductor laser which is remarkably effective for realizing high speed and stable wavelength switching is presented. Generally, when a single longitudinal mode laser oscillation wavelength of a tunable semiconductor laser diode comprising an active region and a wavelength control region is switched from .lambda..sub.1 to .lambda..sub.2, a wavelength control current (.lambda.-Control) supplied to the wavelength control region is switched from I.sub.1 to I.sub.2. In the driving method according to the present invention, an active layer current (Active) supplied to the active region is temporarily decreased below a predetermined value during a predetermined period, in order to temporarily stop the single longitudinal mode laser oscillation of the laser diode.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: March 30, 1999
    Assignees: NEC Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Tomoaki Kato, Yoshiaki Yamada
  • Patent number: 5827778
    Abstract: A method of manufacturing a semiconductor device comprises the steps of forming a first layer interconnect pattern overlying a substrate, forming consecutively a thin silicon oxide film and a thick silicon fluoride oxide film, selectively etching the silicon fluoride oxide film to expose a part of the silicon oxide film by using a first gas of a low fluorine content, and etching the exposed silicon oxide film by using a second gas of a high fluorine content to form a via-hole reaching the first layer interconnect pattern The silicon oxide film has a thickness from 50 to 200 nm while the silicon fluoride oxide film has a thickness of 1 .mu.m or higher. The thin silicon oxide film provides a reduced amount of an over-etch while thick silicon fluoride oxide film provides a low capacitance for the interconnect to achieve a higher operation of the LSI.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: October 27, 1998
    Assignee: NEC Corporation
    Inventor: Yoshiaki Yamada
  • Patent number: 5811666
    Abstract: A method for chromatographic analysis wherein an eluent is fed by a pump and a sample is injected into the eluent from a sample injector, while the composition of the eluent is changed over time. A mixture of the eluent and the sample is passed through a column, and identification of the sample is performed based on separation of the sample into components in the column. The pressure of the eluent in a feed path is detected, a pressure depending on the composition of the eluent is obtained as a reference and the detected pressure is compared with the obtained pressure. Such a comparison enables abnormality in an apparatus for liquid chromatographic analysis to be easily detected.
    Type: Grant
    Filed: October 9, 1996
    Date of Patent: September 22, 1998
    Assignee: Hitachi, Ltd.
    Inventor: Yoshiaki Yamada
  • Patent number: 5804505
    Abstract: Disclosed herein is a method of producing a semiconductor device which includes the steps of forming a hole in an insulating film covering a semiconductor substrate, forming a titanium nitride layer on surfaces of the hole and the insulating film, depositing tungsten on the titanium nitride layer with filling the hole to thereby form a blanket tungsten layer, etching back the blanket tungsten layer by a plasma gas including fluorine until the titanium nitride layer is exposed to thereby form a tungsten plug filling the hole, cleaning the titanium nitride layer to remove fluorine adhering to and remaining on the titanium nitride layer, and forming an aluminum layer on the cleaned titanium layer and the tungsten plug.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: September 8, 1998
    Assignee: NEC Corporation
    Inventors: Yoshiaki Yamada, Kiyonori Kajiyana
  • Patent number: 5744016
    Abstract: A magnetron sputtering electrode 2 is attached to a vacuum chamber 1 to make it retain a Ti target 4 via a back plate 3. A substrate 9 is loaded on a substrate holder 8 provided at a lower portion of the vacuum chamber 1. A collimation plate 6 is provided between the substrate 9 and the Ti target 4 to pass through only the sputtered particles advancing in the vertical direction, and, at its outside, shield plates 5, 7 are provided. The shield plate 5 at the target side is shaped in a wave form and thus its surface area is increased so that nitrogen can be adsorbed as much as possible.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: April 28, 1998
    Assignee: NEC Corporation
    Inventors: Yoshiaki Yamada, Toshiki Shinmura
  • Patent number: 5716477
    Abstract: A thermal image transfer recording medium includes a support and a thermal image transfer ink layer formed on the support. The thermal image transfer ink layer contains a coloring agent, a resin with a melting point of 120.degree. C. or more and an SP value of 10.5 to 12.5, and a melt viscosity lowering material for lowering the melt viscosity of the resin, with the compatibility of the resin and the melt viscosity lowering material, measured by a transparency measurement method, being 0.20 or less, or with the melt viscosity at 150.degree. C. of the thermal image transfer ink layer being in the range of 1.times.10.sup.2 to 5.times.10.sup.6 poise.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: February 10, 1998
    Assignee: Ricoh Company, Ltd.
    Inventors: Junko Yamaguchi, Mitsuru Maeda, Tetsuji Kunitake, Kazuyoshi Inamura, Yasumitsu Kuga, Shigeru Miyajima, Tadafumi Tatewaki, Yoshiaki Yamada
  • Patent number: 5661558
    Abstract: An optical detector for flowing sample comprises a light condenser for condensing a diverging monochrome light, a flow cell arranged in the course of convergence of the converged light beam, and a sample-side detector for receiving a sample-side light. Such a construction makes it possible to correct delicate changes of the light axis due to intensity, position, temperature changes of the light source, density change of the flowing liquid, and any change of other causes effectively for stable sample analysis without difficult optical adjustment.
    Type: Grant
    Filed: June 20, 1995
    Date of Patent: August 26, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Taro Nogami, Yoshiaki Yamada, Synichi Mathuura
  • Patent number: 5643422
    Abstract: A titanium nitride layer is deposited on a semiconductor substrate through a magnetron sputtering using a titanium target, and the sputtered surface is mainly formed by (001) crystal surfaces, at least 90 percent of which have respective <001> directions falling within 30 degrees with respect to a normal line to the a major surface of the semiconductor substrate, thereby preventing the sputtered surface from nitriding.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: July 1, 1997
    Assignee: NEC Corporation
    Inventor: Yoshiaki Yamada
  • Patent number: 5571001
    Abstract: A pressure-resistant explosion-proof electric motor (44) is surrounded by a double casing comprised of inner and outer cases with a motor-cooling oil passage (54) formed therebetween. A flange (26) is detachably fitted to the top surface of a tank to hold the electric motor (44) in the tank. A downwardly-extending pipe (28) is at an upper end fixed to the flange and at a lower end connected through a terminal box (30) to the electric motor (44). A centrifugal pump (67) is fixed to the underside of the electric motor (44) to have its rotary shaft connected to the output shaft (60) of the electric motor (44). A motor cover accommodates therein the electric motor and the terminal box (30) in a watertight manner. A protective pipe (71) extends from the flange (26) to the motor cover (69) and accommodates therein the downwardly-extending pipe (28) in a watertight manner. A cooling oil is circulated through the motor-cooling oil passage (54) to cool the electric motor.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: November 5, 1996
    Assignees: Taiko Kikai Industries Co., Ltd., Japanese Marine Equipment Association
    Inventors: Tetsuya Fukuda, Yoshiaki Yamada
  • Patent number: 5543357
    Abstract: The present invention discloses a process for manufacturing a semiconductor device in which characteristics of an aluminum alloy film are prevented from deteriorating, when a titanium film is used as an under film and the aluminum alloy film is heated to fill a via hole therewith. Interlayered insulating film is formed on a first aluminum wire, and after the formation of a via hole which reaches the first aluminum wire, a titanium film and an aluminum alloy film are formed in turn by a sputtering process. Next, a silicon substrate is heated up to 450.degree. to 500.degree. C. to melt the aluminum alloy film, thereby filling the via hole therewith. In this case, the thickness of the titanium film is set to 10% or less of the thickness of the aluminum alloy film and at most 25 nm.
    Type: Grant
    Filed: December 8, 1994
    Date of Patent: August 6, 1996
    Assignee: NEC Corporation
    Inventors: Yoshiaki Yamada, Nobukazu Ito, Kuniko Miyakawa, Michiko Yamanaka
  • Patent number: 5512170
    Abstract: The volume of the sample added to the sample retainer and the capacity of the sample retainer are compared, and the less one is stored as volume of the sample injected to a sample separating column. If the volume of the sample added to the sample retainer is more than the capacity of the sample retainer, accordingly, the capacity of the sample retainer is stored.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: April 30, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Yoshiaki Yamada, Hironori Kaji
  • Patent number: 5470792
    Abstract: Tungsten is grown only within a viahole 10. The upper surface of the tungsten layer 3 is made lower than the upper surface of a silicon oxide film 2. Thereafter, a titanium film 4 and a titanium nitride film 5 are formed by sputtering, and an aluminum alloy film 6 is formed by the sputtering while a silicon substrate 1 is heated to the temperature of 400 through 550 degrees Centigrade. Since the thickness of the tungsten layer 3 is thinner than the depth of the viahole 10, the upper layer wiring cannot be shorted by the tungsten layer 3. Further, since the viahole which remains not completely filled by the tungsten is completely filled with the tungsten layer 3 and the aluminum alloy film 6, no wire disconnection cannot occur in the viahole 10.
    Type: Grant
    Filed: March 2, 1994
    Date of Patent: November 28, 1995
    Assignee: NEC Corporation
    Inventor: Yoshiaki Yamada
  • Patent number: 5470392
    Abstract: A semiconductor processing method includes the steps of carrying a case containing semiconductor wafers and to which an ID card is attached into semiconductor processing equipment at a first side of the semiconductor processing equipment; removing the ID card from the case; taking the semiconductor wafers out of the case; carrying the semiconductor wafers taken out of the case into a processing means on a second side, opposite to the first side, of the semiconductor processing equipment; processing the semiconductor wafers in the processing means; attaching the ID card corresponding to the semiconductor wafers to the case; taking the processed semiconductor wafers out of the processing means at the first side of the semiconductor processing equipment; putting the processed semiconductor wafers into the case to which the ID card is attached; and carrying the case outside the semiconductor equipment at the first side of the semiconductor equipment.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: November 28, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshiaki Yamada, Junji Iwasaki, Masashi Ohmori
  • Patent number: 5383482
    Abstract: Semiconductor processing equipment includes an ID-card removing robot, an ID-card stocking device, and an ID-card attaching robot so that the management of ID cards is performed inside the equipment. Thus, the present invention makes it possible to reduce equipment size and achieve highly efficient factory automation. Furthermore, in a semiconductor processing equipment module according to the present invention, each item of semiconductor processing equipment has its own ID-card stocking device. As a result, the number of case carriers can be reduced and a space reduction with increased factory automation can be easily realized.
    Type: Grant
    Filed: November 2, 1992
    Date of Patent: January 24, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshiaki Yamada, Junji Iwasaki, Masashi Ohmori