Patents by Inventor Yoshitaka Otsubo

Yoshitaka Otsubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10121732
    Abstract: A semiconductor device includes: a base plate including a metallic base plate and an insulating film provided on the metallic base plate; a semiconductor chip provided on the base plate; a control board disposed above the semiconductor chip; and a relay terminal connected to a signal electrode of the semiconductor chip through a signal line wire, extending to the control board, and connected to the control board, wherein the relay terminal is directly fixed to the insulating film of the base plate.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: November 6, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshitaka Kimura, Yoshitaka Otsubo
  • Publication number: 20180269120
    Abstract: Provided is a technique of reducing detachment of a sealing resin in a semiconductor device, thereby achieving an increased improvement in lifetime of the semiconductor device. The semiconductor device includes the following: an insulating substrate; a metal block disposed on the upper surface of the insulating substrate; a semiconductor element mounted on the upper surface of the metal block; a case enclosing the semiconductor element, the metal block, and the insulating substrate; and a sealing resin sealing the semiconductor element and the metal block. The metal block includes at least one groove on a surface of the metal block, the surface being in contact with the sealing resin. The opening of the at least one groove has a width narrower than a width of the bottom surface of the at least one groove.
    Type: Application
    Filed: December 14, 2017
    Publication date: September 20, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasutaka SHIMIZU, Takuya TAKAHASHI, Yoshitaka OTSUBO
  • Publication number: 20180226324
    Abstract: A semiconductor device includes: a base plate including a metallic base plate and an insulating film provided on the metallic base plate; a semiconductor chip provided on the base plate; a control board disposed above the semiconductor chip; and a relay terminal connected to a signal electrode of the semiconductor chip through a signal line wire, extending to the control board, and connected to the control board, wherein the relay terminal is directly fixed to the insulating film of the base plate.
    Type: Application
    Filed: October 16, 2017
    Publication date: August 9, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshitaka KIMURA, Yoshitaka OTSUBO
  • Publication number: 20180204782
    Abstract: In a semiconductor device, an outer peripheral case body has guiding portions formed therein as a plurality of recesses. The plurality of guiding portions each include an upper end opening. The outer peripheral case body has inner peripheral side openings formed in its inner peripheral surface, each of which is continuous with the upper end opening, extends from an upper end face toward a base body and is continuous with the guiding portion. The first insertion portion is inserted into a first guiding portion of the plurality of guiding portions. The first external terminal portion is continuous with the first insertion portion and extends through the upper end opening in the first guiding portion to outside of the outer peripheral case body. The first connection terminal portion is continuous with the first insertion portion and connected to a conductive pattern through the inner peripheral side opening.
    Type: Application
    Filed: October 5, 2017
    Publication date: July 19, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hayato NAGAMIZU, Takuro MORI, Yoshitaka OTSUBO
  • Publication number: 20180182679
    Abstract: A semiconductor device includes: a base plate; an insulating substrate provided on an upper surface of the base plate; a conductive pattern provided on an upper surface of the insulating substrate; a semiconductor chip mounted on an upper surface of the conductive pattern; a case surrounding the base plate, the insulating substrate, the conductive pattern, and the semiconductor chip; a sealing resin sealing an interior of the case; and an external connection terminal provided to the case. One end portion of the external connection terminal is connected to the conductive pattern, the case has a terminal insertion portion enabling insertion of the other end portion of the external connection terminal in a peripheral wall portion thereof, and a portion of the external connection terminal other than the other end portion is sealed by the sealing resin with the other end portion being inserted in the terminal insertion portion.
    Type: Application
    Filed: July 27, 2017
    Publication date: June 28, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuro MORI, Hayato NAGAMIZU, Yoshitaka OTSUBO
  • Patent number: 9979105
    Abstract: A power semiconductor device includes: an outer case; at least one press-fit terminal buried in a top surface of the outer case; and a plurality of supporting portions formed so as to protrude from the top surface of the outer case. A top end of the press-fit terminal protrudes more than top surfaces of the supporting portions from the top surface of the outer case.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 22, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Minoru Egusa, Hidetoshi Ishibashi, Yoshitaka Otsubo, Hiroyuki Masumoto, Hiroshi Kawata
  • Patent number: 9960126
    Abstract: According to the present invention, a semiconductor device includes a heat spreader, a semiconductor chip fixed to a mounting surface of the heat spreader via a bonding member and sealing resin that covers the heat spreader and the semiconductor chip, wherein a groove is formed on the mounting surface around the semiconductor chip, a length between the semiconductor chip and the groove is equal to or greater than a depth of the groove, and the bonding member is not provided on at least part of a region of the mounting surface between the semiconductor chip and the groove.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: May 1, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Manabu Matsumoto, Yoshitaka Otsubo, Yasutaka Shimizu
  • Patent number: 9927732
    Abstract: Provided is a light scanning apparatus, including: a light source; a rotary polygon mirror; an optical member guiding a light beam; an optical box on which the light source is mounted and which contains the rotary polygon mirror and the optical member; a cover covering an opening of the optical box; a fixation unit fixing the cover on the optical box; the cover having a dust-proof member which is sandwiched between the cover and a side wall of the optical box; and the dust-proof member including an abutment portion against which the side wall is brought into abutment, and non-abutment portions provided on both sides of the abutment portion and separated from the side wall, and the dust-proof member including a groove in one of the non-abutment portions which is located on a side opposite to another one located on a side where the fixation unit is provided.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: March 27, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yoshitaka Otsubo
  • Patent number: 9906663
    Abstract: Provided is a light scanning apparatus, including: a light source emitting a light beam; a rotary polygon mirror deflecting the light beam so as to scan a photosensitive member with the light beam; an optical member guiding the light beam; an optical box on which the light source is mounted and which contains the rotary polygon mirror and the optical member; a cover mounted on a side wall of the optical box so as to cover an opening of the optical box, and the cover having a dust-proof member which is molded on the cover and sandwiched between the cover and the side wall of the optical box; and the dust-proof member including convex portions protruded toward the optical box and configured to contact with a top of the side wall opposed to the dust-proof member, and a concave portion provided between the convex portions and separated from the top.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: February 27, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yoshitaka Otsubo
  • Patent number: 9887154
    Abstract: A semiconductor device includes an insulating substrate including a substrate, a metal pattern formed on an upper surface of the substrate, and a metal film formed on a lower surface of the substrate, a semiconductor element fixed on the metal pattern, a case surrounding the metal pattern and having a contact portion maintained in contact with the upper surface of the substrate, and an adhesive with which the case and a portion of the upper surface of the substrate outside a portion maintained in contact with the contact portion are bonded together, wherein a plurality of through holes are formed in a peripheral portion of the case, the through holes extending vertically through the case, and wherein the metal film exists in at least part of a place right below the contact portion.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: February 6, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Takahashi, Yoshitaka Otsubo
  • Publication number: 20180025993
    Abstract: According to the present invention, a semiconductor device includes a heat spreader, a semiconductor chip fixed to a mounting surface of the heat spreader via a bonding member and sealing resin that covers the heat spreader and the semiconductor chip, wherein a groove is formed on the mounting surface around the semiconductor chip, a length between the semiconductor chip and the groove is equal to or greater than a depth of the groove, and the bonding member is not provided on at least part of a region of the mounting surface between the semiconductor chip and the groove.
    Type: Application
    Filed: February 13, 2017
    Publication date: January 25, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Manabu MATSUMOTO, Yoshitaka OTSUBO, Yasutaka SHIMIZU
  • Patent number: 9864295
    Abstract: An upper cover attached to an optical box included in an optical scanning device includes a flow path in which a sealing member is injection-molded. The flow path includes a first bottom portion, a second bottom portion, and a step. The step is formed between the first bottom portion and the second bottom portion, and the area where the sealing member and the upper cover adhere to each other increases by an amount corresponding to the provided step so that adhesiveness between the sealing member and the upper cover is enhanced.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: January 9, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoshitaka Otsubo
  • Publication number: 20180005923
    Abstract: A semiconductor device includes: a circuit pattern, at least one or more wires joined thereto, an electrode terminal joining thereto, and a semiconductor element. The electrode terminal includes a horizontally extending portion extending along a main surface and connected to the wire, and a bent portion at which an extending direction of the electrode terminal is changed relative to the horizontally extending portion. Each of the wires has joint portions at which each of the wires and the circuit pattern are joined to each other. In a plan view, the joint portions are located on an outside of a portion where each of the wires and the electrode terminal overlap each other.
    Type: Application
    Filed: March 30, 2017
    Publication date: January 4, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasutaka SHIMIZU, Yoshitaka OTSUBO, Mituharu TABATA
  • Patent number: 9859195
    Abstract: A semiconductor device includes: a circuit pattern, at least one or more wires joined thereto, an electrode terminal joining thereto, and a semiconductor element. The electrode terminal includes a horizontally extending portion extending along a main surface and connected to the wire, and a bent portion at which an extending direction of the electrode terminal is changed relative to the horizontally extending portion. Each of the wires has joint portions at which each of the wires and the circuit pattern are joined to each other. In a plan view, the joint portions are located on an outside of a portion where each of the wires and the electrode terminal overlap each other.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: January 2, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasutaka Shimizu, Yoshitaka Otsubo, Mituharu Tabata
  • Patent number: 9721861
    Abstract: A semiconductor device includes a semiconductor element and a ceramic circuit substrate on which the semiconductor element is mounted. The ceramic circuit substrate includes a ceramic substrate having one surface and the other surface facing each other, a metal circuit board joined to the one surface of the ceramic substrate and electrically connected to the semiconductor element, and a metal heat-dissipation plate joined to the other surface of the ceramic substrate. The metal circuit board is greater in thickness than the metal heat-dissipation plate. A surface of the metal heat-dissipation plate on a side opposite to the ceramic substrate is larger in area than a surface of the metal circuit board on a side opposite to the ceramic substrate. Thereby, a semiconductor device capable of suppressing warpage of the ceramic substrate can be achieved.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: August 1, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshitaka Otsubo, Takuya Takahashi, Masaomi Miyazawa, Tetsuo Yamashita, Tomohiro Hieda, Mituharu Tabata
  • Patent number: 9633918
    Abstract: A semiconductor device includes an insulating substrate, a semiconductor element secured to a top surface of the insulating substrate, a case formed of a resin and having a frame portion surrounding the semiconductor element, a metal support located above the insulating substrate and having an end secured to the frame portion, a holding-down portion extending downward from the metal support so as to prevent upwardly convex bending of the insulating substrate, and an adhesive bonding the insulating substrate and the case together.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: April 25, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Takahashi, Yoshitaka Otsubo
  • Patent number: 9627293
    Abstract: In a conventional semiconductor device, a pattern serving as a heat dissipating material is formed by applying a phase transition material. Provided is a semiconductor device that can reduce collapse of a pattern shape even if a shock is applied to the pattern formed with the phase transition material that is liquefied when the environmental temperature is not sufficiently controlled. The semiconductor device includes semiconductor elements mounted inside a semiconductor module (10); a heat radiating surface (13), formed in the semiconductor module (10), dissipating heat generated in the semiconductor elements to a heat radiator; a pattern (14) formed on the heat radiating surface and made from a phase transition material; and a film (15) serving as a first film that covers the pattern (14).
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: April 18, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Rei Yoneyama, Kozo Harada, Isao Oshima, Yoshitaka Otsubo, Rena Kawahara
  • Publication number: 20170068181
    Abstract: A step is formed between a first bottom portion and a second bottom portion, and the area where a sealing member and an upper cover adhere to each other increases by an amount corresponding to the provided step so that adhesiveness between the sealing member and the upper cover is enhanced.
    Type: Application
    Filed: September 2, 2016
    Publication date: March 9, 2017
    Inventor: Yoshitaka Otsubo
  • Patent number: 9583407
    Abstract: A first conductor layer is provided on a first surface of an insulating plate, and has a first volume. A second conductor layer is provided on a second surface of the insulating plate, and has a second volume. A third conductor layer is provided on a second surface of the insulating plate, and has a second volume. The third conductor layer has a mounting region thicker than the second conductor layer. The sum of the second and third volumes is greater than or equal to 70% and smaller than or equal to 130% of the first volume. A semiconductor chip is provided on the mounting region. A sealing part is formed of an insulator, and seals the semiconductor chip within a case.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: February 28, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Yoshida, Yoshitaka Otsubo, Hidetoshi Ishibashi, Kenta Nakahara
  • Patent number: D814431
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: April 3, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Manabu Matsumoto, Yoshitaka Otsubo, Hiroyuki Masumoto