Patents by Inventor Yoshitaka Yamamoto
Yoshitaka Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150325846Abstract: An electrode material includes an aggregate which is formed by aggregating electrode active material particles having a carbonaceous film forced on the surface thereof, in which a volume density of the aggregate is 50% by volume or more and 80% by volume or less of the volume density of a solid body which has the same external appearance as the aggregate, a coverage ratio of the carbonaceous film with respect to the surface of the electrode active material particles is 80% or more, and an average thickness of the carbonaceous film is 1.0 nm or more and 7.0 nm or less.Type: ApplicationFiled: March 7, 2013Publication date: November 12, 2015Inventors: Takao KITAGAWA, Yoshitaka YAMAMOTO
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Patent number: 9159781Abstract: Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b?2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.Type: GrantFiled: March 29, 2012Date of Patent: October 13, 2015Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Kanta Abe, Hidekazu Miyairi, Tetsuhiro Tanaka, Takashi Ienaga, Yoshitaka Yamamoto
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Publication number: 20150249169Abstract: The photoelectric conversion element includes a semiconductor substrate, a first amorphous film of a first conductivity type disposed on an entire surface of one surface of the semiconductor substrate, a first conductive oxide layer disposed on the first amorphous film, a second amorphous film of the first conductivity type disposed on a part of the other surface of the semiconductor substrate, a second conductive oxide layer disposed on the second amorphous film, a third amorphous film of a second conductivity type disposed on the other part of the other surface of the semiconductor substrate, and a third conductive oxide layer disposed on the third amorphous film. Electric conductivity of the first conductive oxide layer is lower than electric conductivities of the second and the third conductive oxide layer. Transmittance of the first conductive oxide layer is higher than transmittances of the second and the third conductive oxide layer.Type: ApplicationFiled: September 19, 2013Publication date: September 3, 2015Applicant: Sharp Kabushiki KaishaInventors: Toshihiko Sakai, Kenji Kimoto, Naoki Koide, Yoshitaka Yamamoto
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Publication number: 20150221791Abstract: Provided is a photoelectric conversion element which includes a first conductive semiconductor substrate of a first conductivity type, a first semiconductor film of the first conductivity type disposed on one front surface of the semiconductor substrate, a second semiconductor film of a second conductivity type disposed on the front surface to be independent from the first semiconductor film, and a dielectric film disposed between the semiconductor substrate and the first semiconductor film and/or between the semiconductor substrate and the second semiconductor film, in which an intermetallic compound layer is formed on the first semiconductor film and on the second semiconductor film.Type: ApplicationFiled: September 19, 2013Publication date: August 6, 2015Inventors: Masatomi Harada, Kenji Kimoto, Naoki Koide, Yoshitaka Yamamoto, Kyotaro Nakamura
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Publication number: 20150221801Abstract: A photoelectric conversion element including an i-type non-single-crystal film provided on the entire one surface of a semiconductor substrate, in which an interface between the semiconductor substrate and the i-type non-single-crystal film is flat, and a method of manufacturing the photoelectric conversion element are provided.Type: ApplicationFiled: September 9, 2013Publication date: August 6, 2015Applicant: Sharp Kabushiki KaishaInventors: Yoshitaka Yamamoto, Naoki Koide
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Publication number: 20150211709Abstract: A lighting device (100) includes: a surface light source (1); a first lens (L1) having a first focal point (F1), the first lens being provided on the light exit surface side of the surface light source; and a second lens (L2) having a second focal point (F2), the second lens being provided on a light exit surface side of the first lens, the surface light source, the first lens, and the second lens being configured such that a first virtual image (I1) is formed by the first lens and a second virtual image (I2) is formed by the second lens, wherein the first virtual image (I1) is formed between the second focal point (F2) and the first lens, and the second focal point (F2) is on a side opposite to the light source side relative to a predetermined focal position f?.Type: ApplicationFiled: July 26, 2013Publication date: July 30, 2015Applicants: Sharp Kabushiki Kaisha, TOHOKU UNIVERSITYInventors: Tatsuo Uchida, Yoshito Suzuki, Tohru Kawakami, Takahiro Ishinabe, Katsunori Ehara, Yoshihiro Hashimoto, Toshiki Matsuoka, Kozo Nakamura, Yasuhisa Itoh, Yoshitaka Yamamoto, Yutaka Ishii, David Montgomery
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Publication number: 20150187775Abstract: A novel semiconductor device where multilevel data can be written and read. The semiconductor device includes first to fifth transistors, a capacitor, a bit line, and a power supply line. Write operation is performed in such a manner that first data is supplied to a gate of the fifth transistor through the first transistor; the first transistor is turned off; second data is supplied to a second electrode of the capacitor through the second transistor to convert the first data into third data; and the second electrode of the capacitor are made electrically floating. The second electrode of the capacitor is initialized to GND through the third transistor. Read operation is performed by charging or discharging the bit line through the fourth transistor and the fifth transistor. The first to third transistors are preferably oxide semiconductor transistors.Type: ApplicationFiled: December 24, 2014Publication date: July 2, 2015Inventors: Yoshitaka Yamamoto, Kiyoshi Kato
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Publication number: 20150179803Abstract: To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.Type: ApplicationFiled: December 16, 2014Publication date: June 25, 2015Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yuhei Sato, Yasumasa Yamane, Yoshitaka Yamamoto, Hideomi Suzawa, Tetsuhiro Tanaka, Yutaka Okazaki, Naoki Okuno, Takahisa Ishiyama
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Publication number: 20150179774Abstract: The semiconductor device is manufactured by the following method. A first oxide semiconductor film is formed over a first gate electrode and a first insulating film, oxygen is added to the first oxide semiconductor film, and then a second oxide semiconductor film is formed over the first oxide semiconductor film. Then, heat treatment is performed. Next, part of the first insulating film, part of the first oxide semiconductor film, and part of the second oxide semiconductor film are etched to form a first gate insulating film having a projection. Next, a pair of electrodes is formed over the second oxide semiconductor film, and a third oxide semiconductor film is formed over the second oxide semiconductor film and the pair of electrodes. Then, a second gate insulating film is formed over the third oxide semiconductor film, and a second gate electrode is formed over the second gate insulating film.Type: ApplicationFiled: December 15, 2014Publication date: June 25, 2015Inventors: Shunpei Yamazaki, Naoto Yamade, Yoshitaka Yamamoto, Hideomi Suzawa, Masayuki Sakakura, Yuhei Sato, Yasumasa Yamane
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Publication number: 20150167924Abstract: A lighting device (100) includes: a surface light source (1); a first lens (L1) having a first focal point (F1), the first lens being provided on the light exit surface side of the surface light source; and a second lens (L2) having a second focal point (F2), the second lens being provided on a light exit surface side of the first lens, the surface light source, the first lens, and the second lens being configured such that a first virtual image (I1) is formed by the first lens and a second virtual image (I2) is formed by the second lens, wherein the first virtual image (I1) is formed between the second focal point (F2) and the first lens, the second focal point (F2) is on a side opposite to the light source side relative to a predetermined focal position f?, and at least either of a light entry surface or a light exit surface of the first lens or the second lens includes a non-revolution surface (SO) as a lens surface, and a plurality of boundary lines (B1-B4) whose curvatures vary discontinuously are providType: ApplicationFiled: July 2, 2013Publication date: June 18, 2015Inventors: Tatsuo Uchida, Yoshito Suzuki, Tohru Kawakami, Takahiro Ishinabe, Katsunori Ehara, Yoshihiro Hashimoto, Toshiki Matsuoka, Kozo Nakamura, Yasuhisa Itoh, Yoshitaka Yamamoto, Yutaka Ishii
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Patent number: 9048453Abstract: To provide a light-emitting device which can emit bright light without increasing the projected area of a light-emitting element and be manufactured with high yield. A light-emitting device of one embodiment of the present invention includes a plurality of projections; a first electrode formed along the plurality of projections; a layer containing a light-emitting organic compound formed along the plurality of projections and over the first electrode; and a second electrode formed along the plurality of projections and over the layer containing a light-emitting organic compound. Further, the plurality of projections each have a bottom surface having a side in contact with a bottom surface of an adjacent projection; a plurality of side surfaces each having a certain angle greater than 0° and less than or equal to 80° with respect to the bottom surface; and a vertex having a first continuously curved surface.Type: GrantFiled: September 26, 2012Date of Patent: June 2, 2015Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Takuya Kawata, Hisao Ikeda, Manabu Niboshi, Seiichi Mitsui, Yoshitaka Yamamoto
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Publication number: 20150118558Abstract: An electrode material of the present invention includes surface-coated LixAyDzPO4 particles obtained by coating surfaces of LixAyDzPO4 (in which, A represents one or more selected from the group consisting of Co, Mn, Ni, Fe, Cu and Cr, D represents one or more selected from the group consisting of Mg, Ca, Sr, Ba, Ti, Zn, B, Al, Ga, In, Si, Ge, Sc, Y and rare earth elements, 0<x?2, 0<y?1, and 0?z?1.5) particles with a carbonaceous coat, and an elution amount of Li is in a range of 200 ppm to 700 ppm and an elution amount of P is in a range of 500 ppm to 2000 ppm when the surface-coated LixAyDzPO4 particles are immersed in a sulfuric acid solution having a hydrogen-ion exponent of 4 for 24 hours.Type: ApplicationFiled: January 22, 2013Publication date: April 30, 2015Inventors: Akinori Yamazaki, Yoshitaka Yamamoto, Takao Kitagawa, Hirofumi Yasumiishi
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Publication number: 20150069385Abstract: A method for adjusting threshold of a semiconductor device is provided. In a plurality of semiconductor devices each including a semiconductor, a source or drain electrode electrically in contact with the semiconductor, a gate electrode, and a charge trap layer between a gate electrode and the semiconductor, a state where the potential of the gate electrode is set higher than the potential of the source or drain electrode while the semiconductor devices are heated at 150° C. or higher and 300° C. or lower is kept for one second or longer to trap electrons in the charge trap layer, so that the threshold is increased and Icut is reduced. Here, the potential difference between the gate electrode and the source or drain electrode is set so that it is different between the semiconductor devices, and the thresholds of the semiconductor devices are adjusted to be appropriate to each purpose.Type: ApplicationFiled: September 4, 2014Publication date: March 12, 2015Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Takayuki INOUE, Hideomi SUZAWA
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Publication number: 20150069387Abstract: A method for manufacturing a semiconductor device with adjusted threshold is provided. In a semiconductor device including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is provided, a charge trap layer provided between the first gate electrode and the semiconductor, and a gate insulating layer provided between the second gate electrode and the semiconductor, a threshold is increased by trapping electrons in the charge trap layer by keeping a potential of the first gate electrode at a potential higher than a potential of the source or drain electrode for 1 second or more while heating. After the threshold adjustment process, the first gate electrode is removed or insulated from other circuits. Alternatively, a resistor may be provided between the first gate electrode and other circuits.Type: ApplicationFiled: September 8, 2014Publication date: March 12, 2015Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Takayuki INOUE, Hideomi SUZAWA, Yasuhiko TAKEMURA
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Publication number: 20150060846Abstract: A semiconductor device in which the threshold is adjusted is provided. In a transistor including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and an electron trap layer between the gate electrode and the semiconductor, the electron trap layer includes crystallized hafnium oxide. The crystallized hafnium oxide is deposited by a sputtering method using hafnium oxide as a target. When the substrate temperature is Tsub (° C.) and the proportion of oxygen in an atmosphere is P (%) in the sputtering method, P?45?0.15×Tsub is satisfied. The crystallized hafnium oxide has excellent electron trapping properties. By the trap of an appropriate number of electrons, the threshold of the semiconductor device can be adjusted.Type: ApplicationFiled: August 28, 2014Publication date: March 5, 2015Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Takayuki INOUE, Hideomi SUZAWA
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Publication number: 20150036215Abstract: To provide a thin optical sheet having improved efficiency for light utilization, an optical sheet (5) of one mode of the present invention includes, in sequence from a light entry side to a light emission side, a plurality of first prisms (13), a ¼ wavelength plate (11), and a polarized-light separating element (12), the plurality of first prisms (13) each having (i) a first surface (13a) through which light enters the first prism and (ii) a second surface (13b) that reflects the light, having entered the first prism, toward the light emission side, the optical film further including, between the plurality of first prisms in an in-plane direction of the optical film, a second prism (14) that reflects light.Type: ApplicationFiled: February 15, 2013Publication date: February 5, 2015Inventors: Tatsuo Uchida, Yoshito Suzuki, Tohru Kawakami, Kazuo Sekiya, Masahiro Nishizawa, Takahiro Ishinabe, Katsunori Ehara, Yoshihiro Hashimoto, Yasuhisa Itoh, Yoshitaka Yamamoto, Yutaka Ishii
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Publication number: 20150015456Abstract: A multi-display device (101) of the present invention includes fry-eye lens arrays (3), located between a plurality of liquid crystal modules (11) arranged in parallel and in a tiling manner and a diffusing element (12), which cause rays of light emitted from light source sections (2) and transmitted through the liquid crystal modules (11) to be condensed on the diffusing element (12) at a pitch that is wider than a pixel pitch of the liquid crystal modules (11). This makes it possible with a simple configuration to make seams between image modulation elements less conspicuous and give a satisfactory feeling of resolution.Type: ApplicationFiled: February 14, 2013Publication date: January 15, 2015Applicant: TOUOKU UNIVERISTYInventors: Tatsuo Uchida, Yoshito Suzuki, Tohru Kawakami, Kazuo Sekiya, Masahiro Nishizawa, Takahiro Ishinabe, Katsunori Ehara, Yoshihiro Hashimoto, Yasuhisa Itoh, Yoshitaka Yamamoto, Yutaka Ishii
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Publication number: 20150008428Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted to an appropriate value is provided. The semiconductor device includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is sandwiched, an electron trap layer between the first gate electrode and the semiconductor, and a gate insulating layer between the second gate electrode and the semiconductor. By keeping a potential of the first gate electrode higher than a potential of the source or drain electrode for 1 second or more while heating, electrons are trapped in the electron trap layer. Consequently, threshold is increased and Icut is reduced.Type: ApplicationFiled: June 24, 2014Publication date: January 8, 2015Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Toshihiko TAKEUCHI, Yasumasa YAMANE, Takayuki INOUE, Shunpei YAMAZAKI
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Publication number: 20150011048Abstract: To provide a semiconductor device in which the threshold value is controlled. Furthermore, to provide a semiconductor device in which a deterioration in electrical characteristics which becomes more noticeable as a transistor is miniaturized can be suppressed. The semiconductor device includes a first semiconductor film, a source electrode and a drain electrode electrically connected to the first semiconductor film, a gate insulating film, and a gate electrode in contact with the gate insulating film. The gate insulating film includes a first insulating film and a trap film, and charge is trapped in a charge trap state in an interface between the first insulating film and the trap film or inside the trap film.Type: ApplicationFiled: July 2, 2014Publication date: January 8, 2015Inventors: Tetsuhiro Tanaka, Takayuki Inoue, Yoshitaka Yamamoto, Hideomi Suzawa, Tamae Moriwaka
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Patent number: 8853697Abstract: To inhibit a metal element contained in a glass substrate from being diffused into a gate insulating film or an oxide semiconductor film. A semiconductor device includes a glass substrate, a base insulating film formed using metal oxide over the glass substrate, a gate electrode formed over the base insulating film, a gate insulating film formed over the gate electrode, an oxide semiconductor film which is formed over the gate insulating film and overlapping with the gate electrode, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In a region of the base insulating film that is present in a range of 3 nm or less from a surface of the base insulating film, the concentration of a metal element contained in the glass substrate is less than or equal to 1×1018 atoms/cm3.Type: GrantFiled: February 26, 2013Date of Patent: October 7, 2014Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Kenichi Okazaki, Takuya Matsuo, Yoshitaka Yamamoto, Hiroshi Matsukizono, Yosuke Kanzaki