Patents by Inventor Yoshitaka Yamamoto

Yoshitaka Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6953714
    Abstract: A method for producing a thin film semiconductor device is described. In the method, a thin film layer of non-single-crystalline semiconductor, which is deposited on a base layer of glass, is processed to an island-shaped thin film layer at the time prior to the layer irradiation step. The laser irradiation to the thin film layer of non-single-crystalline semiconductor is carried out after forming an insulation film layer and a gate electrode over the island-shaped thin film layer, by using the gate electrode as the irradiation mask, whereby the center area of the island-shaped thin film layer masked by the gate electrode is crystallized, and simultaneously, the both side areas thereof which is not masked by the gate electrode are annealed. Next, a source electrode and a drain electrode is formed in the annealed areas. The implantation of impurity ion may be carried out either before or after the laser irradiation.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: October 11, 2005
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yoshinobu Kimura, Masakiyo Matsumura, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Yoshitaka Yamamoto, Hideo Koseki
  • Publication number: 20050161738
    Abstract: A thin film transistor includes a one conductive type semiconductor layer; a source region and a drain region which are separately provided in the semiconductor layer; and a gate electrode provided above or below the semiconductor layer with an insulating film interposed therebetween, wherein the width of the junction face between the source region and the channel which is provided between the source region and drain region, is different from the width of the junction face between the above channel region and the drain region.
    Type: Application
    Filed: March 4, 2003
    Publication date: July 28, 2005
    Applicant: Kabushiki Kaisha Ekisho Sentan Gijutsu Kaishatsu C
    Inventors: Masato Hiramatsu, Masakiyo Matsumura, Mikihiko Nishitani, Yoshinobu Kimura, Yoshitaka Yamamoto
  • Publication number: 20050161676
    Abstract: A method for producing a thin film semiconductor device is described. In the method, a thin film layer of non-single-crystalline semiconductor, which is deposited on a base layer of glass, is processed to an island-shaped thin film layer at the time prior to the layer irradiation step. The laser irradiation to the thin film layer of non-single-crystalline semiconductor is carried out after forming an insulation film layer and a gate electrode over the island-shaped thin film layer, by using the gate electrode as the irradiation mask, whereby the center area of the island-shaped thin film layer masked by the gate electrode is crystallized, and simultaneously, the both side areas thereof which is not masked by the gate electrode are annealed. Next, a source electrode and a drain electrode is formed in the annealed areas. The implantation of impurity ion may be carried out either before or after the laser irradiation.
    Type: Application
    Filed: February 23, 2005
    Publication date: July 28, 2005
    Applicant: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yoshinobu Kimura, Masakiyo Matsumura, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Yoshitaka Yamamoto, Hideo Koseki
  • Patent number: 6890849
    Abstract: An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed layer on the barrier film for metal diffusion using an electroless plating process, a step of selectively forming a metal conductive layer on the metal seed layer using an electroplating process, and a step of etching the barrier film for metal diffusion using the metal conductive layer as a mask.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: May 10, 2005
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Masaki Kado, Shigeru Aomori, Yoshitaka Yamamoto
  • Publication number: 20050085002
    Abstract: A thin film semiconductor device and a method for producing it are described. In the thin film layer of semiconductor of the device, a plurality of large size single-crystalline grains of semiconductor are formed in a regulated configuration, and each of single crystalline grains is equipped with one unit of electric circuit having a gate electrode, a source electrode and drain electrode. Such regulated arrangement of large size single-crystalline grains in the semiconductor layer is realized by a process including a step of irradiating the layer of amorphous or polycrystalline semiconductor with energy beam such as excimer laser so that maximum irradiation intensity points and minimum irradiation intensity points are arranged regulatedly. The device can have a high mobility such as about 500 cm2/V sec.
    Type: Application
    Filed: October 29, 2004
    Publication date: April 21, 2005
    Applicant: Advanced LCD Technologies Development Center, Co, Ltd.
    Inventors: Masakiyo Matsumura, Yasuhisa Oana, Hiroyuki Abe, Yoshitaka Yamamoto, Hideo Koseki, Mitsunori Warabisako
  • Publication number: 20050082538
    Abstract: An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed layer on the barrier film for metal diffusion using an electroless plating process, a step of selectively forming a metal conductive layer on the metal seed layer using an electroplating process, and a step of etching the barrier film for metal diffusion using the metal conductive layer as a mask.
    Type: Application
    Filed: October 28, 2004
    Publication date: April 21, 2005
    Inventors: Masaki Kado, Shigeru Aomori, Yoshitaka Yamamoto
  • Publication number: 20050014315
    Abstract: A method for forming a crystallized semiconductor layer includes preparing a non-single-crystal semiconductor layer in which at least one crystal seed is formed, and irradiating with an energy ray the non-single-crystal semiconductor layer having the crystal seed formed therein to allow a crystal to laterally grow from the crystal seed in the non-single-crystal semiconductor layer, irradiation of the energy ray is carried out by positioning to at least a part of the crystal seed an area having a minimum intensity value of the energy ray, the energy ray having a confirmation that an area having a maximum intensity value of the energy ray is continuously reduced to the area having the minimum intensity value in an irradiated surface.
    Type: Application
    Filed: June 2, 2004
    Publication date: January 20, 2005
    Inventors: Yoshitaka Yamamoto, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Yoshinobu Kimura
  • Patent number: 6828178
    Abstract: A thin film semiconductor device and a method for producing it are described. In the thin film layer of semiconductor of the device, a plurality of large size single-crystalline grains of semiconductor are formed in a regulated configuration, and each of single crystalline grains is equipped with one unit of electric circuit having a gate electrode, a source electrode and drain electrode. Such regulated arrangement of large size single-crystalline grains in the semiconductor layer is realized by a process including a step of irradiating the layer of amorphous or polycrystalline semiconductor with energy beam such as excimer laser so that maximum irradiation intensity points and minimum irradiation intensity points are arranged regulatedly. The device can have a high mobility such as about 500 cm2/V sec.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: December 7, 2004
    Assignee: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Masakiyo Matsumura, Yasuhisa Oana, Hiroyuki Abe, Yoshitaka Yamamoto, Hideo Koseki, Mitsunori Warabisako
  • Publication number: 20040176649
    Abstract: A method for making gas hydrate comprising generating ultrafine bubbles in an aqueous solution; and spontaneously generating hydrate nuclei by self-compression and collapsing of the ultrafine bubbles.
    Type: Application
    Filed: March 3, 2004
    Publication date: September 9, 2004
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Masayoshi Takahashi, Yoshitaka Yamamoto
  • Publication number: 20040164298
    Abstract: A semiconductor device includes a non-single-crystal semiconductor film, a support substrate that supports the non-single-crystal semiconductor film, and an active device having a part of the non-single-crystal semiconductor film as a channel region. In particular, the channel region has an oxygen concentration not higher than 1×1018 atoms/cm3 and a carbon concentration not higher than 1×1018 atoms/cm3.
    Type: Application
    Filed: November 28, 2003
    Publication date: August 26, 2004
    Inventors: Masato Hiramatsu, Yoshinobu Kimura, Hiroyuki Ogawa, Masayuki Jyumonji, Yoshitaka Yamamoto, Masakiyo Matsumura
  • Publication number: 20040142544
    Abstract: A method of manufacturing a thin-film semiconductor device substrate includes a step of forming a non-single crystalline semiconductor thin film on a base layer, and an annealing step of irradiating the non-single crystalline semiconductor thin film with an energy beam to enhance crystallinity of a non-single crystalline semiconductor constituting the non-single crystalline semiconductor thin film. The annealing step includes simultaneously irradiating the non-single crystalline semiconductor thin film with a plurality of energy beams to form a plurality of unit regions each including at least one irradiated region irradiated with the energy beam and at least one non-irradiated region that is not irradiated with the energy beam.
    Type: Application
    Filed: January 13, 2004
    Publication date: July 22, 2004
    Inventors: Yoshinobu Kimura, Masakiyo Matsumura, Yoshitaka Yamamoto, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Fumiki Nakano
  • Publication number: 20040051180
    Abstract: An interconnect forming method according to the present invention includes a step of forming a barrier film for metal diffusion on an insulator film, a step of selectively forming a metal seed layer on the barrier film for metal diffusion using an electroless plating process, a step of selectively forming a metal conductive layer on the metal seed layer using an electroplating process, and a step of etching the barrier film for metal diffusion using the metal conductive layer as a mask.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 18, 2004
    Inventors: Masaki Kado, Shigeru Aomori, Yoshitaka Yamamoto
  • Publication number: 20030132439
    Abstract: A method for producing a thin film semiconductor device is described. In the method, a thin film layer of non-single-crystalline semiconductor, which is deposited on a base layer of glass, is processed to an island-shaped thin film layer at the time prior to the layer irradiation step. The laser irradiation to the thin film layer of non-single-crystalline semiconductor is carried out after forming an insulation film layer and a gate electrode over the island-shaped thin film layer, by using the gate electrode as the irradiation mask, whereby the center area of the island-shaped thin film layer masked by the gate electrode is crystallized, and simultaneously, the both side areas thereof which is not masked by the gate electrode are annealed. Next, a source electrode and a drain electrode is formed in the annealed areas. The implantation of impurity ion may be carried out either before or after the laser irradiation.
    Type: Application
    Filed: November 14, 2002
    Publication date: July 17, 2003
    Applicant: Advanced LCD Technologies Development Center Co., Ltd.
    Inventors: Yoshinobu Kimura, Masakiyo Matsumura, Mikihiko Nishitani, Masato Hiramatsu, Masayuki Jyumonji, Yoshitaka Yamamoto, Hideo Koseki
  • Patent number: 6523432
    Abstract: A lower bracket for mounting a steering column to a vehicle body is formed as a single element that is fixed to the vehicle body by inserting a bolt with a collar therethrough. Upon application of an impact load, the lower bracket forces the bolt and collar into a path of a smaller width than the collar thereby plastically deforming an edge portion of the path for absorption of the impact energy.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: February 25, 2003
    Assignee: Koyo Seiko Co., Ltd.
    Inventors: Yoshitaka Yamamoto, Koji Yoshioka, Noboru Minamoto
  • Publication number: 20030027410
    Abstract: A thin film semiconductor device and a method for producing it are described. In the thin film layer of semiconductor of the device, a plurality of large size single-crystalline grains of semiconductor are formed in a regulated configuration, and each of single crystalline grains is equipped with one unit of electric circuit having a gate electrode, a source electrode and drain electrode. Such regulated arrangement of large size single-crystalline grains in the semiconductor layer is realized by a process including a step of irradiating the layer of amorphous or polycrystalline semiconductor with energy beam such as excimer laser so that maximum irradiation intensity points and minimum irradiation intensity points are arranged regulatedly. The device can have a high mobility such as about 500 cm2/V sec..
    Type: Application
    Filed: July 11, 2002
    Publication date: February 6, 2003
    Applicant: ALTEDEC
    Inventors: Masakiyo Matsumura, Yasuhisa Oana, Hiroyuki Abe, Yoshitaka Yamamoto, Hideo Koseki, Mitsunori Warabisako
  • Publication number: 20020014674
    Abstract: The present invention discloses a light emitting device comprising a substrate transparent at the emission wavelength and an active layer structure formed on such substrate, in which the thickness of the substrate is 75 &mgr;m or less, and/or a layer for suppressing spectral-intensity-modulation due to the substrate-mode is provided between the substrate and the active layer structure. Such device can suppress the spectral-intensity modulation due to the substrate-mode, which is observed for the case the substrate is transparent at the emission wavelength, to thereby provide a light emission device excellent in linearity of the current-light output characteristics, and to thereby improve the coupling characteristics with an external cavity.
    Type: Application
    Filed: May 21, 2001
    Publication date: February 7, 2002
    Inventors: Horie Hideyoshi, Satoru Nagao, Yoshitaka Yamamoto, Toshinari Fujimori
  • Publication number: 20020008795
    Abstract: There is disclosed a small-sized, active matrix liquid crystal display having high reliability. The liquid crystal display comprises a TFT substrate, a counter substrate, and a layer of a liquid crystal material held between these two substrates. A plurality of pixel TFTs are arranged in rows and columns on the TFT substrate. Driver TFTs forming a driver circuit for driving the pixel TFTs are formed also on the TFT substrate. All of these TFTs are covered by the liquid crystal material directly or via a thin film to protect these TFTs. A short ring is cut after a rubbing operation and before bonding of the substrates. Therefore, during manufacturing, the TFTs are protected from static charges. Also, the cutting operation is facilitated.
    Type: Application
    Filed: January 9, 2001
    Publication date: January 24, 2002
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Yoshitaka Yamamoto
  • Patent number: 6304307
    Abstract: There is provided an active matrix liquid crystal display having high reliability with improved yield of production. In an active matrix liquid crystal display in which peripheral driving circuits are in contact with a liquid crystal material, spacers are dispersed in peripheral driving circuit regions in a density lower than that in a pixel region to reduce damage to the peripheral driving circuits and to improve production yield and reliability of products.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: October 16, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Nishi, Toshimitsu Konuma, Takahiro Tsuji, Yoshitaka Yamamoto, Masahiro Adachi, Kiyoshi Ogishima
  • Patent number: 6246454
    Abstract: There is disclosed a small-sized, active matrix liquid crystal display having high reliability. The liquid crystal display comprises a TFT substrate, a counter substrate, and a layer of a liquid crystal material held between these two substrates. A plurality of pixel TFTs are arranged in rows and columns on the TFT substrate. Driver TFTs forming a driver circuit for driving the pixel TFTs are formed also on the TFT substrate. All of these TFTs are covered by the liquid crystal material directly or via a thin film to protect these TFTs. A short ring is cut after a rubbing operation and before bonding of the substrates. Therefore, during manufacturing, the TFTs are protected from static charges. Also, the cutting operation is facilitated.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: June 12, 2001
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Jun Koyama, Yoshitaka Yamamoto
  • Patent number: 6211535
    Abstract: Method of forming an active layer for TFTs without plasma-damaging the side surfaces of the active layer. The method is started with forming a crystalline silicon film on a glass substrate. A resist mask is placed on the silicon film. The silicon film is etched with an etchant gas consisting mainly of a halogen fluoride gas, thus forming the active layer. During this process, the etchant gas is not changed into a plasma to prevent the side surfaces of the active layer from being plasma-damaged. ClF3 can be used as the halogen fluoride gas.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: April 3, 2001
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Yoshitaka Yamamoto, Hideomi Suzawa, Katunobu Awane, Fumiaki Funada, Shunpei Yamazaki