Abstract: A novel semiconductor device is provided. The semiconductor device has a function of changing a pixel selection period in accordance with a distance from a driver circuit. Specifically, when the distance between a first pixel and the driver circuit is longer than the distance between a second pixel and the driver circuit, the pulse width of a selection signal supplied to the first pixel is set larger than the pulse width of a selection signal supplied to the second pixel. Accordingly, writing of image signals to pixels provided far from the driver circuit can be accurately performed while the selection period for pixels provided near the driver circuit is kept short.

Abstract: A semiconductor device including pixels arranged in a matrix of n rows and m columns, in which the pixels in the m-th column are shielded from light, is provided.

Abstract: To provide a semiconductor device that can reduce power consumption and retain data for a long time and a memory device including the semiconductor device. The semiconductor device includes a word line divider, a memory cell, a first wiring, and a second wiring. The word line divider is electrically connected to the first wiring and the second wiring. The memory cell includes a first transistor with a dual-gate structure. A first gate of the first transistor is electrically connected to the first wiring, and a second gate of the first transistor is electrically connected to the second wiring. The word line divider supplies a high-level potential or a low-level potential to the first wiring and supplies a predetermined potential to the second wiring, whereby a threshold voltage of the first transistor is changed. With such a configuration, a semiconductor device that can reduce power consumption and retain data for a long time is driven.

Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.

Abstract: A novel display system and a moving object are provided. The display system includes a display panel and a display driver. The display panel has a curved shape. The display panel includes a first display region and a second display region on the curved surface. The display driver generates first analog data by a first clock signal and first digital data and generates second analog data by a second clock signal and second digital data. An image can be displayed in accordance with the curved shape of the display panel by transmitting the first analog data to the first display region and transmitting the second analog data to the second display region.

Abstract: To provide a semiconductor device which can execute the product-sum operation. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. First analog data is stored in the first memory cell, and reference analog data is stored in the second memory cell. The first memory cell and the second memory cell supply a first current and a second current, respectively, when a reference potential is applied as a selection signal. The offset circuit has a function of supplying a third current corresponding to a differential current between the first current and the second current. In the semiconductor device, the first memory and the second memory supply a fourth current and a fifth current, respectively, when a potential corresponding to second analog data is applied as a selection signal.

Abstract: A neuron circuit can switch between two functions: as an input neuron circuit, and as a hidden neuron circuit. An error circuit can switch between two functions: as a hidden error circuit, and as an output neuron circuit. A switching circuit is configured to be capable of changing the connections between the neuron circuit, a synapse circuit, and the error circuit. The synapse circuit includes an analog memory that stores data that corresponds to the connection strength between the input neuron circuit and the hidden neuron circuit or between the hidden neuron circuit and the output neuron circuit, a writing circuit that changes the data in the analog memory, and a weighting circuit that weights an input signal in reaction to the data of the analog memory and outputs the weighted output signal. The analog memory includes a transistor comprising an oxide semiconductor with extremely low off-state current.

Abstract: A semiconductor device capable of performing product-sum operation with low power consumption. The semiconductor device includes first and second logic circuits, first to fourth transistors, and first and second holding units. A low power supply potential input terminal of the first logic circuit is electrically connected to the first and third transistors. A low power supply potential input terminal of the second logic circuit is electrically connected to the second and fourth transistors. The potentials of second gates of the first and fourth transistors are held in the first holding unit as potentials corresponding to first data. The potentials of second gates of the second and third transistors are held in the second holding unit. The on/off states of the first to fourth transistors are determined by second data. A difference in signal input/output time between the first and second logic circuits depends on the first data and the second data.

Abstract: A semiconductor device including photosensor capable of imaging with high resolution is disclosed. The semiconductor device includes the photosensor having a photodiode, a first transistor, and a second transistor. The photodiode generates an electric signal in accordance with the intensity of light. The first transistor stores charge in a gate thereof and converts the stored charge into an output signal. The second transistor transfers the electric signal generated by the photodiode to the gate of the first transistor and holds the charge stored in the gate of the first transistor. The first transistor has a back gate and the threshold voltage thereof is changed by changing the potential of the back gate.

Abstract: A novel semiconductor device or display system is provided. The display system includes a correction circuit having a function of correcting an image signal by utilizing artificial intelligence. Specifically, learning by an artificial neural network enables the correction circuit to correct an image signal so as to alleviate the image discontinuity. Then, by making an inference (recognition) utilizing the artificial neural network which has finished the learning, the image signal is corrected and compensation for the image discontinuity can be made. In this manner, the junction can be inconspicuous on the displayed image, improving the quality of a high-resolution image.

Abstract: A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.

Abstract: To provide a semiconductor device which can execute the product-sum operation. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. First analog data is stored in the first memory cell, and reference analog data is stored in the second memory cell. The first memory cell and the second memory cell supply a first current and a second current, respectively, when a reference potential is applied as a selection signal. The offset circuit has a function of supplying a third current corresponding to a differential current between the first current and the second current. In the semiconductor device, the first memory and the second memory supply a fourth current and a fifth current, respectively, when a potential corresponding to second analog data is applied as a selection signal.

Abstract: An imaging device with reduced power consumption is provided. The imaging device includes an imaging portion and an encoder. First image data obtained by the imaging portion is transmitted to the encoder. The encoder includes a first circuit that forms a neural network, and the first circuit conducts feature extraction by the neural network on a first image to generate second image data. Note that since the first circuit has a function of performing convolution processing using a weight filter, the encoder can perform computation with a convolutional neural network.

Abstract: To provide a semiconductor device which can execute the product-sum operation. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. First analog data is stored in the first memory cell, and reference analog data is stored in the second memory cell. The first memory cell and the second memory cell supply a first current and a second current, respectively, when a reference potential is applied as a selection signal. The offset circuit has a function of supplying a third current corresponding to a differential current between the first current and the second current. In the semiconductor device, the first memory and the second memory supply a fourth current and a fifth current, respectively, when a potential corresponding to second analog data is applied as a selection signal.

Abstract: A display device that performs image correction in accordance with external light environment is provided. The display device includes a host device and an optical sensor. In addition, the display device includes a processing circuit. The host device has a function of performing arithmetic processing using a neural network on software and a function of performing supervised learning with the neural network. The processing circuit has a function of performing arithmetic processing using a neural network on hardware. The optical sensor has a function of obtaining illuminance of external light. The obtained illuminance of external light is inputted to the host device, and a luminance and color tone preferred by users are regarded as teacher data, whereby learning is performed on the neural network of the host device. A weight coefficient obtained through the learning is used as a weight coefficient of the neural network of the processing circuit.

Abstract: A novel semiconductor device is provided. The semiconductor device has a function of changing a pixel selection period in accordance with a distance from a driver circuit. Specifically, when the distance between a first pixel and the driver circuit is longer than the distance between a second pixel and the driver circuit, the pulse width of a selection signal supplied to the first pixel is set larger than the pulse width of a selection signal supplied to the second pixel. Accordingly, writing of image signals to pixels provided far from the driver circuit can be accurately performed while the selection period for pixels provided near the driver circuit is kept short.

Abstract: An object is to provide a semiconductor device with low power consumption. The semiconductor device includes a controller, a register, and an image processing portion. The image processing portion has a function of taking image data from a frame memory and a parameter from the register and processing the image data by using the parameter. The frame memory has a function of retaining the image data while power supply is stopped. The register has a function of retaining the parameter while power supply is stopped. The controller controls power supply to the register, the frame memory, and the image processing portion. The register includes first and second scan chain registers. The first scan chain register stores a parameter related to a first display region. The second scan chain register stores a parameter related to a second display region. A parameter is changed by loading of data of the first or second scan chain register.

Abstract: A programmable logic device including an asynchronous circuit is provided. The programmable logic device includes a lookup table, a first circuit, and a second circuit. The first circuit receives a first signal and a second signal. The second circuit sends a third signal. The first circuit sends a fourth signal and a fifth signal, when receiving the third signal. The fourth signal has the same logic as the first signal. The fifth signal has the same logic as the second signal. The lookup table sends a sixth signal and a seventh signal, when receiving the fourth signal and the fifth signal. The second circuit sends an eighth signal, when receiving the sixth signal and the seventh signal. The first circuit sends a ninth signal, when receiving the eighth signal. The lookup table includes a memory. The sixth signal and the seventh signal are generated from data stored in the memory.

Abstract: A semiconductor device with a large storage capacity per unit area is provided. The disclosed semiconductor device includes a plurality of gain-cell memory cells each stacked over a substrate. Axes of channel length directions of write transistors of memory cells correspond to each other, and are substantially perpendicular to the top surface of the substrate. The semiconductor device can retain multi-level data. The channel of read transistors is columnar silicon (embedded in a hole penetrating gates of the read transistors). The channel of write transistors is columnar metal oxide (embedded in a hole penetrating the gates of the read transistors and gates, or write word lines, of the write transistors). The columnar silicon faces the gate of the read transistor with an insulating film therebetween. The columnar metal oxide faces the write word line with an insulating film, which is obtained by oxidizing the write word line, therebetween, and is electrically connected to the gate of the read transistor.

Abstract: To provide a semiconductor device that can reduce power consumption and retain data for a long time and a memory device including the semiconductor device. The semiconductor device includes a word line divider, a memory cell, a first wiring, and a second wiring. The word line divider is electrically connected to the first wiring and the second wiring. The memory cell includes a first transistor with a dual-gate structure. A first gate of the first transistor is electrically connected to the first wiring, and a second gate of the first transistor is electrically connected to the second wiring. The word line divider supplies a high-level potential or a low-level potential to the first wiring and supplies a predetermined potential to the second wiring, whereby a threshold voltage of the first transistor is changed. With such a configuration, a semiconductor device that can reduce power consumption and retain data for a long time is driven.