Patents by Inventor Yoshiyuki Matsunaga

Yoshiyuki Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10141364
    Abstract: An imaging device comprising a unit pixel cell comprising: a photoelectric converter that generates an electric signal through photoelectric conversion of incident light; and a signal detection circuit that detects the electric signal, the signal detection circuit comprising a first transistor that amplifies the electric signal, a second transistor that selectively transmits output of the first transistor to outside of the unit pixel cell, and a feedback circuit that forms a feedback loop through which the electric signal is negatively fed back, the feedback loop not passing through the first transistor.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: November 27, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Kazuko Nishimura, Yutaka Abe, Masashi Murakami, Yoshiyuki Matsunaga
  • Publication number: 20180166479
    Abstract: An imaging device includes a unit pixel cell including: a photoelectric converter that generates a signal charge through photoelectric conversion of incident light, and a signal detection circuit that detects an electric signal according to an amount of the signal charge, wherein the signal detection circuit includes: a first transistor that amplifies the electric signal, a gate of the first transistor being connected to the photoelectric converter, a second transistor having a source and a drain, one of the source and the drain being connected to the photoelectric converter, and a first capacitor having a first end and a second end, the first end being connected to the other of the source and the drain of the second transistor, the second end being connected to a first voltage source.
    Type: Application
    Filed: January 24, 2018
    Publication date: June 14, 2018
    Inventors: Masashi MURAKAMI, Kazuko NISHIMURA, Yutaka ABE, Yoshiyuki MATSUNAGA, Yoshihiro SATO, Junji HIRASE
  • Publication number: 20180114811
    Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.
    Type: Application
    Filed: December 21, 2017
    Publication date: April 26, 2018
    Inventors: Yoshihiro SATO, Ryohei MIYAGAWA, Tokuhiko TAMAKI, Junji HIRASE, Yoshiyuki OHMORI, Yoshiyuki MATSUNAGA
  • Patent number: 9917119
    Abstract: An imaging device includes: a unit pixel cell comprising: a photoelectric converter generating an electric signal and comprising a first and second electrodes and a photoelectric conversion film located therebetween, the first electrode being located on a light receiving side of the photoelectric conversion film, a signal detection circuit detecting the electric signal and comprising a first transistor and a second transistor that are connected to the second electrode, the first transistor amplifying the electric signal, and a capacitor circuit comprising a first capacitor and a second capacitor having a capacitance value larger than that of the first capacitor that are serially connected to each other, the capacitor circuit being provided between the second electrode and a reference voltage; and a feedback circuit comprising the first transistor and an inverting amplifier and negatively feeding back the electric signal to the second transistor via the first transistor and the inverting amplifier.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: March 13, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Masashi Murakami, Kazuko Nishimura, Yutaka Abe, Yoshiyuki Matsunaga, Yoshihiro Sato, Junji Hirase
  • Patent number: 9881960
    Abstract: Each unit pixel includes a photoelectric converter, an n-type impurity region forming an accumulation diode together with the semiconductor region, the accumulation diode accumulating a signal charge generated by the photoelectric converter, an amplifier transistor including a gate electrode electrically connected to the impurity region, and an isolation region formed around the amplifier transistor and implanted with p-type impurities. The amplifier transistor includes an n-type source/drain region formed between the gate electrode and the isolation region, and a channel region formed under the gate electrode. A gap in the isolation region is, in a gate width direction, wider at a portion including the channel region than at a portion including the source/drain region.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: January 30, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshihiro Sato, Ryohei Miyagawa, Tokuhiko Tamaki, Junji Hirase, Yoshiyuki Ohmori, Yoshiyuki Matsunaga
  • Patent number: 9883131
    Abstract: An imaging device includes a photoelectric converter that generates charge; a first charge transfer channel having a first end electrically connected to the photoelectric converter and a second end, and transferring the charge in a direction from the first end to the second end; a second charge transfer channel diverging from the first charge transfer channel at a first position and transferring a first part of the charge; a third charge transfer channel diverging from the first charge transfer channel at a second position different from the first position in the direction and transferring a part of the second part of the charge; and first and second charge accumulators that accumulate at least a part of the first and second part of the charge respectively. The imaging device does not include a gate that switches between cutoff and transfer of charge, in the first charge transfer channel.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: January 30, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Sanshiro Shishido, Ryota Sakaida, Yoshiyuki Matsunaga
  • Patent number: 9871983
    Abstract: A solid-state imaging apparatus includes a pixel including: a photoelectric converter that generates a signal charge corresponding to incident light; a charge storage section that is connected to the photoelectric converter and accumulates signal charge; a reset transistor; an amplifying transistor; and a cutoff transistor, wherein the amplifying transistor and the cutoff transistor form a negative feedback amplifying circuit.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: January 16, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Keisuke Yazawa, Motonori Ishii, Yutaka Hirose, Yoshihisa Kato, Yoshiyuki Matsunaga
  • Patent number: 9773825
    Abstract: Each unit pixel includes a photoelectric converter formed above a semiconductor region, an amplifier transistor formed in the semiconductor region, and including a gate electrode connected to the photoelectric converter, a reset transistor configured to reset a potential of the gate electrode, and an isolation region formed in the semiconductor region between the amplifier transistor and the reset transistor to electrically isolate the amplifier transistor from the reset transistor. The amplifier transistor includes a source/drain region. The source/drain region has a single source/drain structure.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: September 26, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Junji Hirase, Yoshiyuki Matsunaga, Yoshihiro Sato
  • Publication number: 20170094206
    Abstract: A solid-state imaging apparatus includes a pixel including: a photoelectric converter that generates a signal charge corresponding to incident light; a charge storage section that is connected to the photoelectric converter and accumulates signal charge; a reset transistor; an amplifying transistor; and a cutoff transistor, wherein the amplifying transistor and the cutoff transistor form a negative feedback amplifying circuit.
    Type: Application
    Filed: December 13, 2016
    Publication date: March 30, 2017
    Inventors: Keisuke YAZAWA, Motonori ISHII, Yutaka HIROSE, Yoshihisa KATO, Yoshiyuki MATSUNAGA
  • Patent number: 9554067
    Abstract: The present invention provides a solid-state imaging apparatus that can significantly reduce kTC noise by using a negative feedback amplifying circuit. A solid-state imaging apparatus includes a pixel unit including a plurality of pixels arranged on a semiconductor substrate in a matrix, the pixel unit including, for each column, a source line and a column signal line, each of the plurality of pixels including: a photoelectric conversion unit that generates a signal charge corresponding to incident light; a storage unit storing the signal charge; a reset transistor; an amplifying transistor; and a cutoff transistor, wherein the amplifying transistor and the cutoff transistor form a negative feedback amplifying circuit. With this configuration, kTC noise can significantly be reduced.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: January 24, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Keisuke Yazawa, Motonori Ishii, Yutaka Hirose, Yoshihisa Kato, Yoshiyuki Matsunaga
  • Publication number: 20170006241
    Abstract: An imaging device includes a photoelectric converter that generates charge; a first charge transfer channel having a first end electrically connected to the photoelectric converter and a second end, and transferring the charge in a direction from the first end to the second end; a second charge transfer channel diverging from the first charge transfer channel at a first position and transferring a first part of the charge; a third charge transfer channel diverging from the first charge transfer channel at a second position different from the first position in the direction and transferring a part of the second part of the charge; and first and second charge accumulators that accumulate at least a part of the first and second part of the charge respectively. The imaging device does not include a gate that switches between cutoff and transfer of charge, in the first charge transfer channel.
    Type: Application
    Filed: June 23, 2016
    Publication date: January 5, 2017
    Inventors: SANSHIRO SHISHIDO, RYOTA SAKAIDA, YOSHIYUKI MATSUNAGA
  • Patent number: 9425225
    Abstract: Unit pixel cells each includes: a photoelectric conversion film; a transparent electrode; a pixel electrode; an amplification transistor; a reset transistor; and an element isolation STI and a leakage suppression region for electrically isolating the amplification transistor and the reset transistor, the first isolation region being in a silicon substrate, between the amplification transistor and the reset transistor, the reset transistor including: a gate electrode; and a drain region which is connected to the pixel electrode, and is in the silicon substrate, between the gate electrode and element isolation STI and the leakage suppression region, in which a depletion layer formed by a first PN junction between the drain region and its surrounding region and in contact with a surface of the silicon substrate is narrower than a depletion layer formed by a second PN junction between the drain region and its surrounding region and formed in the silicon substrate.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: August 23, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Yoshiyuki Matsunaga
  • Publication number: 20160190187
    Abstract: An imaging device comprising a unit pixel cell comprising: a photoelectric converter that generates an electric signal through photoelectric conversion of incident light; and a signal detection circuit that detects the electric signal, the signal detection circuit comprising a first transistor that amplifies the electric signal, a second transistor that selectively transmits output of the first transistor to outside of the unit pixel cell, and a feedback circuit that forms a feedback loop through which the electric signal is negatively fed back, the feedback loop not passing through the first transistor.
    Type: Application
    Filed: December 10, 2015
    Publication date: June 30, 2016
    Inventors: KAZUKO NISHIMURA, YUTAKA ABE, MASASHI MURAKAMI, YOSHIYUKI MATSUNAGA
  • Publication number: 20160190188
    Abstract: An imaging device includes: a unit pixel cell comprising: a photoelectric converter generating an electric signal and comprising a first and second electrodes and a photoelectric conversion film located therebetween, the first electrode being located on a light receiving side of the photoelectric conversion film, a signal detection circuit detecting the electric signal and comprising a first transistor and a second transistor that are connected to the second electrode, the first transistor amplifying the electric signal, and a capacitor circuit comprising a first capacitor and a second capacitor having a capacitance value larger than that of the first capacitor that are serially connected to each other, the capacitor circuit being provided between the second electrode and a reference voltage; and a feedback circuit comprising the first transistor and an inverting amplifier and negatively feeding back the electric signal to the second transistor via the first transistor and the inverting amplifier.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 30, 2016
    Inventors: MASASHI MURAKAMI, KAZUKO NISHIMURA, YUTAKA ABE, YOSHIYUKI MATSUNAGA, YOSHIHIRO SATO, JUNJI HIRASE
  • Patent number: 9270894
    Abstract: An imaging apparatus disclosed herein includes: a solid-state imaging device in which pixels are arranged in a matrix; a mechanical shutter; and a signal processing unit, wherein the signal processing unit: resets charge stored in all the pixels by closing the mechanical shutter and applying a voltage V2 to a photoelectric conversion unit; starts first exposure by opening the mechanical shutter and applying a voltage V1 to the photoelectric conversion unit; finishes the first exposure by applying the voltage V2 to the photoelectric conversion unit with the mechanical shutter open; reads pixel signals to obtain a first still image; resets all the pixels; starts second exposure by applying the voltage V1 to the photoelectric conversion unit with the mechanical shutter open; finishes the second exposure by applying the voltage V2 to the photoelectric conversion unit with the mechanical shutter open; reads pixel signals to obtain a second still image.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: February 23, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takahiro Yamamoto, Yoshiyuki Matsunaga, Takayuki Ota
  • Patent number: 9172895
    Abstract: A solid-state imaging device including pixels, each pixel having a reset transistor, a selection transistor, an amplification transistor, and a photoelectric conversion unit. The photoelectric conversion unit has a photoelectric conversion film which performs photoelectric conversion, a pixel electrode formed on the surface of the photoelectric conversion film that faces the semiconductor substrate, and a transparent electrode formed on the surface of the photoelectric conversion film that is opposite to the pixel electrode, and the amplitude of a row reset signal applied to the gate of the reset transistor is smaller than at least one of (a) the maximum voltage applied to the drain of the amplification transistor, (b) the maximum voltage applied to the gate of the selection transistor, (c) the power source voltage applied to an inverting amplifier, and (d) the maximum voltage applied to a transparent electrode.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: October 27, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Makoto Yarino, Takahiro Yamamoto, Yoshiyuki Matsunaga
  • Publication number: 20150288898
    Abstract: The present invention provides a solid-state imaging apparatus that can significantly reduce kTC noise by using a negative feedback amplifying circuit. A solid-state imaging apparatus includes a pixel unit including a plurality of pixels arranged on a semiconductor substrate in a matrix, the pixel unit including, for each column, a source line and a column signal line, each of the plurality of pixels including: a photoelectric conversion unit that generates a signal charge corresponding to incident light; a storage unit storing the signal charge; a reset transistor; an amplifying transistor; and a cutoff transistor, wherein the amplifying transistor and the cutoff transistor form a negative feedback amplifying circuit. With this configuration, kTC noise can significantly be reduced.
    Type: Application
    Filed: May 28, 2015
    Publication date: October 8, 2015
    Inventors: KEISUKE YAZAWA, MOTONORI ISHII, YUTAKA HIROSE, YOSHIHISA KATO, YOSHIYUKI MATSUNAGA
  • Publication number: 20150256777
    Abstract: A solid-state imaging apparatus has: a signal readout circuit including a charge storage region connected to a photoelectric conversion region, and a reset transistor connected at one of source and drain to the charge storage region; and a negative feedback circuit that feeds back an output of the signal readout circuit in a negative feedback manner to the other of the source and drain of the reset transistor. A reset operation for discharging a charge stored in the charge storage region includes a first period in which the negative feedback circuit is OFF and a second period which occurs after the first period and in which the negative feedback circuit is ON. In the first period, the reset transistor changes from OFF to ON and then to OFF. In the second period, such a reset transistor control voltage is applied that makes the reset transistor to gradually change to ON.
    Type: Application
    Filed: May 18, 2015
    Publication date: September 10, 2015
    Inventors: MOTONORI ISHII, YOSHIYUKI MATSUNAGA, YUTAKA HIROSE
  • Patent number: 9124827
    Abstract: An image-capturing apparatus including a solid-state imaging device including unit-cells arranged in a matrix, in which each of the unit-cells includes a photoelectric conversion unit including: a photoelectric conversion film formed above a semiconductor substrate; a pixel electrode formed on a surface of the photoelectric conversion film, the surface facing the semiconductor substrate; and a transparent electrode formed on a surface of the photoelectric conversion film, the surface being opposite the surface on which the pixel electrode is formed, and the image-capturing apparatus further includes: a voltage applying unit which applies, between the pixel electrode and the transparent electrode, a variable sensitivity voltage for controlling sensitivity of the solid-state imaging device; a level detecting unit which detects an output level of image-captured image data from the solid-state imaging device; and a controlling unit which varies the variable sensitivity voltage based on the output level detected b
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: September 1, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Katsunori Mizuno, Yoshiyuki Matsunaga, Takahiro Yamamoto
  • Patent number: 9105544
    Abstract: A solid-state imaging device including unit pixel cells, each having a photoelectric conversion film and a pixel electrode which are formed above a silicon substrate, an amplification transistor which is formed on the silicon substrate and outputs a voltage according to a potential of the pixel electrode, and a reset transistor which is formed on the silicon substrate and resets a potential of a gate electrode of the amplification transistor, the imaging device including a vertical signal line which is disposed correspondingly to a column of the unit pixel cells, and transmits a voltage of the unit pixel cells of the corresponding column, and a vertical scanning unit which selects a row of the unit pixel cells having a voltage to be outputted to the vertical signal line, wherein the vertical signal line is located below the pixel electrode of the unit pixel cells corresponding to the vertical signal line.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: August 11, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Yoshiyuki Matsunaga