Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.

Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.

Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.

Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.

Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.

Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.

Abstract: An imaging device chip set includes an imaging chip 11 which includes a plurality of unit pixels 21 and at least part of a peripheral circuit section 22 and a DSP chip 13 which includes a digital processing section 31 for converting and processing an image signal and remaining part of the peripheral circuit section 22. A first wiring layer is formed on a first substrate. The first wiring layer includes two or fewer layers in a photosensitive area 20 where the plurality of unit pixels are provided and three or fewer layers in the other area.

Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.

Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.

Abstract: A solid state image pickup device 110 is provided with: a plurality of pixel units 10 that are arranged two-dimensionally and include a photoelectric conversion unit (photodiode PD) that converts light into a charge and an amplification unit (amplifier Q13) that converts the charge into a voltage and outputs it; a plurality of noise signal removal units (noise cancellation units 40) that are provided one for each column and remove noises contained in the voltage outputted from the amplifier Q31 of the pixel unit 10 belonging to the column; and a plurality of column amplification units (column amplifiers 70) that amplify the voltage outputted from the amplifier Q13 of the pixel unit 10 and output the amplified voltage to the noise cancellation unit 40, and enables increase in sensitivity and reduction in noise with low power consumption.

Abstract: A high dynamic range solid-state image pickup device is provided with a plurality of unit cells (500), which convert light into signal charges and accumulate the signal charges, and are arranged by rows and columns for outputting a signal voltage corresponding to the signal charges; a row selecting circuit (110) and a read transistor (502) for setting an accumulation time period for accumulating the signal charges in the unit cells (500) to a first period and a second period different from each other; a row selecting circuit (110) and a vertical selection transistor (505) for selecting a row; sampling capacitors (210a, 210b) connected to the unit cell (500) of each column; and a pulse generating circuit (220) and sampling transistors (200a, 200b) for selecting an arbitrary sampling capacitor from the sampling capacitors (210a, 210b).

Abstract: A wavelength separation filter 206 is composed of ?/4 multilayer films 302 to 304 that are sequentially laminated on a multilayer interference filter 301. The multilayer interference filter 301 is composed of two ?/4 multilayer films with a dielectric layer sandwiched therebetween. Also, the multilayer interference filter 301 is composed of parts 301B, 301G, 301R that transmit blue light, green light, and red light, respectively. The multilayer interference filter 301 wavelength-separates visible light. The ?/4 multilayer films 302 to 304 reflect light having a wavelength within wavelength ranges having set-wavelengths of 800 nm, 900 nm, and 1000 nm respectively. In other words, the ?/4 multilayer films 302 to 304 reflect near infrared light.

Abstract: A solid state imaging device includes an imaging area where a plurality of first pixels and a plurality of second pixels are respectively arranged in the form of a matrix, each of the first pixels and the second pixels having a photoelectric conversion portion and outputting a signal in accordance with brightness of incident light when selected; a plurality of first memories that respectively store signals of selected first pixels out of the plurality of first pixels; and a plurality of second memories that are respectively connected in parallel to the first memories and respectively store signals of selected second pixels out of the plurality of second pixels. The signals stored in the first memories and in the second memories are successively read to a horizontal signal line.

Abstract: An object of the present invention is to provide a shift register in which it is prevented from malfunctioning because of a portion between a first transistor and a second transistor being in a high-impedance state. The shift register of the present invention includes capacitor means 5 for storing data outputted from a unit circuit 1 of the preceding block. A first transistor 3 is turned ON only when data is being stored in the capacitor means 5. A second transistor 7 includes a control electrode and an input-side diffusion layer connected to the output-side diffusion layer of the first transistor 3, and is turned ON only when a pulse of a clock signal from the first transistor 3 is inputted to the control electrode and the input-side diffusion layer. Potential controlling means 2 keeps the second transistor 7 OFF at least during a period in which the second transistor 7 is supposed to be OFF.

Abstract: An imaging device outputs brightness information according to an amount of incident light and includes: an imaging unit that includes a plurality of unit cells arranged one dimensionally or two-dimensionally, each unit cell including a photoelectric conversion part that generates a first output voltage in a reset state and a second output voltage according to an amount of incident light, and each unit cell generating a reset voltage that corresponds to the first output voltage and a read voltage that corresponds to the second output voltage; and an output unit operable to output, in relation to each unit cell, brightness information indicating a difference between the reset voltage and the read voltage when normal light is incident to the imaging device and the read voltage is in a predetermined range, and brightness information indicating high brightness when strong light is incident to the imaging device and the read voltage is not in the predetermined range.

Abstract: A solid-state image pickup device consists of a plurality of pixels arranged in a matrix for outputting an image signal corresponding to the received light intensity. The solid-state image pickup device includes: reset switches (13,23) for opening/closing between a VDDCELL that repeatedly and cyclically outputs a high potential and a low potential and an electric charge holding section in each pixel; reset signal lines (97,98) connected to pixels of the same row; a row scan circuit (80) for successively selecting rows, always giving Hi impedance or Lo impedance to the reset signal of the selected row and Hi impedance to the reset signal lines of the non-selected row; and an ALLRS circuit 94 for giving the Lo potential to the reset line of the non-selected row before and after the rise of VDCELL from a low potential to high potential. Thus, the solid-state image pickup device can reduce its size and increase its operation speed while suppressing lowering of the dynamic range.

Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.

Abstract: According to the present invention, as a structure of a pixel section (10), in each of columns from a first to a m-th column, a plurality of pixel signals outputted from a plurality of pixels arranged in a column direction are transmitted, respectively, to a plurality of output signal lines (15l to 15n) different from each other. Then, a read control and are set control are simultaneously executed on the plurality of pixels.

Abstract: A solid state image pickup device 110 is provided with: a plurality of pixel units 10 that are arranged two-dimensionally and include a photoelectric conversion unit (photodiode PD) that converts light into a charge and an amplification unit (amplifier Q13) that converts the charge into a voltage and outputs it; a plurality of noise signal removal units (noise cancellation units 40) that are provided one for each column and remove noises contained in the voltage outputted from the amplifier Q31 of the pixel unit 10 belonging to the column; and a plurality of column amplification units (column amplifiers 70) that amplify the voltage outputted from the amplifier Q13 of the pixel unit 10 and output the amplified voltage to the noise cancellation unit 40, and enables increase in sensitivity and reduction in noise with low power consumption.

Abstract: A solid-state imaging apparatus that performs color imaging using visible light and imaging using infrared light, the solid-state imaging apparatus including a plurality of two-dimensionally arranged pixel cells, in each of which a filter mainly transmits one of visible light and infrared light, wherein filters are arranged such that a first unit of arrangement where a plurality of filters that mainly transmit visible light are arranged and a second unit of arrangement where a filter that mainly transmits visible light and a filter that mainly transmits infrared light are arranged are alternately arranged in both a row direction and a column direction. Also, in the first unit of arrangement are arranged filters including three kinds of filters each transmitting one of red light, green light and blue light and in the second unit of arrangement are arranged four kinds of filters each transmitting one of red light, green light, blue light and infrared light.