Patents by Inventor Yoshiyuki Matsunaga

Yoshiyuki Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8319875
    Abstract: An imaging device outputs brightness information according to an amount of incident light and includes: an imaging unit that includes a plurality of unit cells arranged one dimensionally or two-dimensionally, each unit cell including a photoelectric conversion part that generates a first output voltage in a reset state and a second output voltage according to an amount of incident light, and each unit cell generating a reset voltage that corresponds to the first output voltage and a read voltage that corresponds to the second output voltage; and an output unit operable to output, in relation to each unit cell, brightness information indicating a difference between the reset voltage and the read voltage when normal light is incident to the imaging device and the read voltage is in a predetermined range, and brightness information indicating high brightness when strong light is incident to the imaging device and the read voltage is not in the predetermined range.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: November 27, 2012
    Assignee: Panasonic Corporation
    Inventors: Masayuki Masuyama, Masashi Murakami, Yoshiyuki Matsunaga
  • Patent number: 8299512
    Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: October 30, 2012
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 8274590
    Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: September 25, 2012
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 8253833
    Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: August 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Publication number: 20120200752
    Abstract: A solid-state image pickup device includes a plurality of pixels arranged in rows and columns on a semiconductor substrate. A photoelectric converter of each pixel includes a photoelectric conversion film between a pixel electrode and a transparent electrode. An amplifier transistor has a gate connected to the pixel electrode, and a reset transistor has a source connected to the pixel electrode. The solid-state image pickup device performs: hard reset operation in which a first reset voltage is applied to the drain of the reset transistor, and then the reset transistor is turned on; and soft reset operation in which a second reset voltage which has a higher level than the first reset voltage is applied to the drain of the reset transistor, and then a pulse in a negative direction is applied to the source of the reset transistor via a capacitor.
    Type: Application
    Filed: April 18, 2012
    Publication date: August 9, 2012
    Applicant: PANASONIC CORPORATION
    Inventor: Yoshiyuki MATSUNAGA
  • Patent number: 8218289
    Abstract: An electrolytic capacitor includes: a case including a case body, in which an electrolytic capacitor element is disposed in a sealed manner and filled up with an electrolytic solution, and a safety valve is mounted to the case body for jetting an evaporated gas of the electrolytic solution filling the electrolytic capacitor element; a cover member mounted to the case so as to cover the safety valve provided for the case; a first fixing unit mounted to the cover member so as to prevent the cover member from dismounting when the evaporated gas of the electrolytic solution is jetted outward; and a second fixing unit disposed in association with the first fixing unit and adopted to reinforce and assist a function of the first fixing unit to thereby prevent the cover member from being dismounted. An electric equipment includes a lighting circuit including circuit components, and an electrolytic capacitor of the structure mentioned above.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: July 10, 2012
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Isao Abe, Kenichi Asami, Hajime Osaki, Yoshiyuki Matsunaga, Hideo Kozuka
  • Patent number: 8149308
    Abstract: A high dynamic range solid-state image pickup device is provided with a plurality of unit cells, which convert light into signal charges and accumulate the signal charges. The unit cells are arranged by rows and columns for outputting a signal voltage corresponding to the signal charges. A selector and a read transistor set an accumulation time period for accumulating the signal charges in the unit cells to a first period and a second period different from each other. The row selector and a vertical selection transistor select a row. Sampling capacitors (210a, 210b) are connected to the unit cell of each column. A pulse generator and sampling transistors select an arbitrary sampling capacitor from the sampling capacitors. The pulse generator and the sampling transistors perform selection so as to accumulate the signal voltage corresponding to the signal charges accumulated during the first period and the second period in the sampling capacitors, respectively.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: April 3, 2012
    Assignee: Panasonic Corporation
    Inventors: Masayuki Masuyama, Yoshiyuki Matsunaga
  • Patent number: 8134191
    Abstract: A solid-state imaging apparatus that performs color imaging using visible light and imaging using infrared light, the solid-state imaging apparatus including a plurality of two-dimensionally arranged pixel cells, in each of which a filter mainly transmits one of visible light and infrared light, wherein filters are arranged such that a first unit of arrangement where a plurality of filters that mainly transmit visible light are arranged and a second unit of arrangement where a filter that mainly transmits visible light and a filter that mainly transmits infrared light are arranged are alternately arranged in both a row direction and a column direction. Also, in the first unit of arrangement are arranged filters including three kinds of filters each transmitting one of red light, green light and blue light and in the second unit of arrangement are arranged four kinds of filters each transmitting one of red light, green light, blue light and infrared light.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: March 13, 2012
    Assignee: Panasonic Corporation
    Inventors: Takumi Yamaguchi, Yuuichi Inaba, Daisuke Ueda, Yoshiyuki Matsunaga
  • Publication number: 20110272751
    Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.
    Type: Application
    Filed: July 18, 2011
    Publication date: November 10, 2011
    Applicant: Panasonic Corporation
    Inventors: Makoto INAGAKI, Yoshiyuki Matsunaga
  • Patent number: 8018511
    Abstract: According to the present invention, as a structure of a pixel section (10), in each of columns from a first to a m-th column, a plurality of pixel signals outputted from a plurality of pixels arranged in a column direction are transmitted, respectively, to a plurality of output signal lines (15l to 15n) different from each other. Then, a read control and are set control are simultaneously executed on the plurality of pixels.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Takeshi Sowa, Kunihiko Hara, Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 8017983
    Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 8004026
    Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: August 23, 2011
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 7944493
    Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: May 17, 2011
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Publication number: 20110109780
    Abstract: An imaging device outputs brightness information according to an amount of incident light and includes: an imaging unit that includes a plurality of unit cells arranged one dimensionally or two-dimensionally, each unit cell including a photoelectric conversion part that generates a first output voltage in a reset state and a second output voltage according to an amount of incident light, and each unit cell generating a reset voltage that corresponds to the first output voltage and a read voltage that corresponds to the second output voltage; and an output unit operable to output, in relation to each unit cell, brightness information indicating a difference between the reset voltage and the read voltage when normal light is incident to the imaging device and the read voltage is in a predetermined range, and brightness information indicating high brightness when strong light is incident to the imaging device and the read voltage is not in the predetermined range.
    Type: Application
    Filed: January 14, 2011
    Publication date: May 12, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masayuki MASUYAMA, Masashi Murakami, Yoshiyuki Matsunaga
  • Patent number: 7928485
    Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: April 19, 2011
    Assignee: Panasonic Corporation
    Inventors: Mikiya Uchida, Yoshiyuki Matsunaga, Makoto Inagaki
  • Publication number: 20100328485
    Abstract: An imaging device includes a plurality of pixels each configured to convert incident light to an electric charge signal and output the electric charge signal as a pixel signal, and a pixel binning unit configured to bin pixel signals from pixels adjacent to each other and output the binned pixel signal. The pixel binning unit performs first pixel binning operation of binning pixel signals from pixels on the same column and second pixel binning operation of binning pixels on the same row.
    Type: Application
    Filed: September 13, 2010
    Publication date: December 30, 2010
    Applicant: Panasonic Corporation
    Inventors: Kunihiro IMAMURA, Toshiya FUJII, Yoshiyuki MATSUNAGA
  • Patent number: 7859032
    Abstract: During an exposure time period (long accumulation time period) of a low shutter speed shooting mode, a second reference voltage Vss2, which is different from a first reference voltage Vss1 (a ground voltage) corresponding to a reference voltage of a peripheral circuit, is applied to a well (5) where a photoelectric converter section (2) and a drain region (4) are formed, whereby generation of dark electrons at a portion of a surface of the well (5) below a gate electrode (6) is suppressed. A polarity of the second reference voltage Vss2 is positive in the case where a conductivity type of the well (5) is a P-type, and is negative in the case of an N-type.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: December 28, 2010
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Publication number: 20100271522
    Abstract: The present invention provides a solid-state imaging device which is capable of high-speed and high-quality pixel mixture. The solid-state imaging device includes: a plurality of pixels; a row selecting circuit; a plurality of column signal lines each of which is provided to a corresponding one of columns of pixels, is connected to pixels of the corresponding column, and transfers the signals outputted from the connected pixels; a pixel current source which (i) is provided to a corresponding one of the column signal lines, (ii) is connected to the corresponding column signal line, and (iii) supplies to the connected column signal line a current when the signal is outputted from the selected pixel to the connected column signal line; and a control unit which changes the number of rows of pixels being simultaneously selected by the row selecting circuit, and values of the current supplied by the pixel current source.
    Type: Application
    Filed: April 20, 2010
    Publication date: October 28, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Yoshiyuki MATSUNAGA, Kunihiko HARA, Hiroyuki HAYASHITA, Yoshihisa MINAMI
  • Patent number: 7791660
    Abstract: A solid-state image sensing device includes: a pixel array in which pixels performing photoelectric conversion are arranged in rows and columns; and a column amplification section in which an image signal output from each pixel is amplified. The column amplification section includes amplifiers each of which is provided for each column, and the column amplification section is connected to a power supply voltage feed section and the ground. An impedance on the power supply side of the amplifier is greater than an impedance on the ground side.
    Type: Grant
    Filed: May 1, 2007
    Date of Patent: September 7, 2010
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Yoshida, Yoshiyuki Matsunaga, Takahiro Muroshima
  • Publication number: 20100195271
    Abstract: An electrolytic capacitor includes: a case including a case body, in which an electrolytic capacitor element is disposed in a sealed manner and filled up with an electrolytic solution, and a safety valve is mounted to the case body for jetting an evaporated gas of the electrolytic solution filling the electrolytic capacitor element; a cover member mounted to the case so as to cover the safety valve provided for the case; a first fixing unit mounted to the cover member so as to prevent the cover member from dismounting when the evaporated gas of the electrolytic solution is jetted outward; and a second fixing unit disposed in association with the first fixing unit and adopted to reinforce and assist a function of the first fixing unit to thereby prevent the cover member from being dismounted. An electric equipment includes a lighting circuit including circuit components, and an electrolytic capacitor of the structure mentioned above.
    Type: Application
    Filed: January 27, 2010
    Publication date: August 5, 2010
    Applicant: TOSHIBA LIGHTING & TECHNOLOGY CORPORATION
    Inventors: Isao ABE, Kenichi Asami, Hajime Osaki, Yoshiyuki Matsunaga, Hideo Kozuka