Patents by Inventor Yoshiyuki Matsunaga

Yoshiyuki Matsunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7459335
    Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: December 2, 2008
    Assignee: Panasonic Corporation
    Inventors: Mikiya Uchida, Yoshiyuki Matsunaga, Makoto Inagaki
  • Patent number: 7453511
    Abstract: An area image sensor outputs the difference between charges received by light-receiving cells arranged in an array pattern. A system controller generates a timing signal for generating a pulse or modulation signal. A control signal generator generates a control signal for separately controlling the light-receiving timings of the light-receiving cells of the area image sensor on the basis of the timing signal from the system controller. A light emitting controller controls a light source to generate light, the intensity of which changes on the basis of the timing signal from the system controller. A reflected light image processor extracts a reflected image of an object from the difference outputted from the area image sensor.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: November 18, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunichi Numazaki, Miwako Doi, Yoshiyuki Matsunaga, Akira Morishita, Naoko Umeki
  • Patent number: 7443436
    Abstract: The image pickup device comprises: an image pickup unit 1 in which a plurality of unit cells for generating reset and read voltages are arranged; a noise eliminating unit 6 for generating, with respect to each unit cell, a differential voltage corresponding to a difference between the reset and read voltages; and output units 5 and 7 for outputting the read and differential voltages, respectively, to a signal processing apparatus. The signal processing apparatus comprises: a judging unit 8 for judging whether each of the read voltages is within a predetermined range; and a system output unit 9 for outputting, for unit cells whose voltages are judged as being within the predetermined range, corresponding differential voltages as luminance information of the unit cells; for unit cells whose voltages are judged as not being within the predetermined range, a predetermined voltage indicating high luminance as luminance information of the unit cells.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: October 28, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Masuyama, Yoshiyuki Matsunaga, Masashi Murakami
  • Publication number: 20080143861
    Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.
    Type: Application
    Filed: February 15, 2008
    Publication date: June 19, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 7369169
    Abstract: An MOS-type solid-state imaging apparatus includes an imaging region formed by two-dimensionally arranging unit cells serving as photoelectric conversion portions on a semiconductor substrate, a plurality of vertical address lines arranged in a row direction of the imaging region to select a row of unit cells to be addressed, a plurality of vertical signal lines arranged in a column direction of the imaging region to read out signals from the unit cells in each column, a plurality of load transistors each connected to one end of each of the vertical signal lines, and a plurality of horizontal selection transistors each connected to the other end of each of the vertical signal lines.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: May 6, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Matsunaga, Shinji Ohsawa, Nobuo Nakamura, Hirofumi Yamashita, Hiroki Miura
  • Publication number: 20080087925
    Abstract: During an exposure time period (long accumulation time period) of a low shutter speed shooting mode, a second reference voltage Vss2, which is different from a first reference voltage Vss1 (a ground voltage) corresponding to a reference voltage of a peripheral circuit, is applied to a well (5) where a photoelectric converter section (2) and a drain region (4) are formed, whereby generation of dark electrons at a portion of a surface of the well (5) below a gate electrode (6) is suppressed. A polarity of the second reference voltage Vss2 is positive in the case where a conductivity type of the well (5) is a P-type, and is negative in the case of an N-type.
    Type: Application
    Filed: July 21, 2005
    Publication date: April 17, 2008
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Publication number: 20080088725
    Abstract: An amplification-type solid-state imaging device adds a plurality of signals from pixels of the same color, R, G, or B, in order to output the signals. A gravity center in each group of added pixels is arranged without being partial in a pixel region.
    Type: Application
    Filed: June 28, 2007
    Publication date: April 17, 2008
    Inventor: Yoshiyuki Matsunaga
  • Patent number: 7358105
    Abstract: A high-performance solid-state imaging device is provided. The solid-state imaging device includes: a plurality of pixel cells; and a driving unit. Each of the plurality of pixel cells includes: a photodiode that converts incident light into a signal charge and stores the signal charge; a MOS transistor that is provided for reading out the signal charge stored in the photodiode; an element isolation portion that is formed of a STI that is a grooved portion of the semiconductor substrate so that the photodiode and the MOS transistor are isolated from each other; and a deep-portion isolation implantation layer that is formed under the element isolation portion for preventing a flow of a charge from the photodiode to the MOS transistor.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: April 15, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Nagasaki, Syouji Tanaka, Yoshiyuki Matsunaga
  • Patent number: 7352399
    Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: April 1, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Publication number: 20070296843
    Abstract: A solid-state imaging device includes a plurality of pixels arranged two-dimensionally. Each pixel includes a photoelectric converter (2) for converting incident light to a charge, and a gray filter (6a, 6b, 6c) having a visible light transmittance that is different depending on the photoelectric converter (2). According to this construction, the plurality of pixels have different sensitivities to incident light. By combining pixel signals obtained from three pixels having different sensitivities, a wider dynamic range can be achieved.
    Type: Application
    Filed: June 8, 2007
    Publication date: December 27, 2007
    Inventors: Shigetaka Kasuga, Katsumi Takeda, Takumi Yamaguchi, Yoshiyuki Matsunaga, Takahiko Murata, Takayoshi Yamada
  • Patent number: 7304286
    Abstract: A solid-state imaging device can be provided by which a signal charge stored in a photodiode can be transferred completely even when a power supply voltage is low. The solid-state imaging device includes: a plurality of pixel cells arranged on a semiconductor substrate; and a driving unit that is provided for driving the plurality of pixel cells. Each of the plurality of pixel cells includes: a photodiode that converts incident light into a signal charge and stores the signal charge; a transfer transistor that is provided for reading out the signal charge stored in the photodiode; and a potential smoothing unit that is formed so as to allow a potential from the photodiode to the transfer transistor to change smoothly.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: December 4, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Syouji Tanaka, Yoshiyuki Matsunaga
  • Publication number: 20070247535
    Abstract: A solid-state image sensing device includes: a pixel array in which pixels performing photoelectric conversion are arranged in rows and columns; and a column amplification section in which an image signal output from each pixel is amplified. The column amplification section includes amplifiers each of which is provided for each column, and the column amplification section is connected to a power supply voltage feed section and the ground. An impedance on the power supply side of the amplifier is greater than an impedance on the ground side.
    Type: Application
    Filed: May 1, 2007
    Publication date: October 25, 2007
    Inventors: Hiroshi Yoshida, Yoshiyuki Matsunaga, Takahiro Muroshima
  • Patent number: 7271834
    Abstract: An imaging device chip set includes an imaging chip provided for obtaining an electric signal by photoelectric conversion of incident light, and a DSP chip provided for carrying out digital signal processing with respect to the electric signal obtained by the imaging chip. The imaging chip includes a plurality of unit pixels for generating the electric signal by the photoelectric conversion of incident light, a horizontal scanning circuit for selecting the unit pixels in a horizontal direction, and a vertical scanning circuit for selecting the unit pixels in a vertical direction. The DSP chip includes a timing generating circuit for generating timing pulses necessary for operations of the horizontal scanning circuit and the vertical scanning circuit, and a digital signal processing circuit for carrying out digital signal processing with respect to the electric signal generated by the plurality of unit pixels.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: September 18, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigetaka Kasuga, Yoshiyuki Matsunaga, Kazuyuki Inokuma
  • Publication number: 20070184570
    Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.
    Type: Application
    Filed: March 22, 2007
    Publication date: August 9, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Mikiya Uchida, Yoshiyuki Matsunaga, Makoto Inagaki
  • Publication number: 20070109432
    Abstract: A solid state imaging device includes an imaging area where a plurality of first pixels and a plurality of second pixels are respectively arranged in the form of a matrix, each of the first pixels and the second pixels having a photoelectric conversion portion and outputting a signal in accordance with brightness of incident light when selected; a plurality of first memories that respectively store signals of selected first pixels out of the plurality of first pixels; and a plurality of second memories that are respectively connected in parallel to the first memories and respectively store signals of selected second pixels out of the plurality of second pixels. The signals stored in the first memories and in the second memories are successively read to a horizontal signal line.
    Type: Application
    Filed: September 28, 2006
    Publication date: May 17, 2007
    Inventors: Takumi Yamaguchi, Takahiko Murata, Shigetaka Kasuga, Takayoshi Yamada, Yoshiyuki Matsunaga, Ryohei Miyagawa
  • Patent number: 7214976
    Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: May 8, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mikiya Uchida, Yoshiyuki Matsunaga, Makoto Inagaki
  • Publication number: 20070030372
    Abstract: In each photosensitive cell, a photodiode 101, a transfer gate 102, a floating diffusion layer section 103, an amplifier transistor 104, and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.
    Type: Application
    Filed: September 29, 2006
    Publication date: February 8, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 7157754
    Abstract: A high-performance solid-state imaging device is provided. The solid-state imaging device includes: a plurality of pixel cells; and a driving unit. Each of the plurality of pixel cells includes: a photodiode that converts incident light into a signal charge and stores the signal charge; a MOS transistor that is provided for reading out the signal charge stored in the photodiode; an element isolation portion that is formed of a STI that is a grooved portion of the semiconductor substrate so that the photodiode and the MOS transistor are isolated from each other; and a deep-portion isolation implantation layer that is formed under the element isolation portion for preventing a flow of a charge from the photodiode to the MOS transistor.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: January 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Nagasaki, Syouji Tanaka, Yoshiyuki Matsunaga
  • Publication number: 20060226438
    Abstract: A solid-state imaging device including an n-type semiconductor substrate including a photoelectric conversion portion, and a signal detection portion for detecting a signal charge is used. The photoelectric conversion portion is provided with a photodiode, and a p-well that overlaps the photoelectric conversion portion and the signal detection portion when viewed in a thickness direction of the semiconductor substrate is formed in the semiconductor substrate. The p-well is formed so that a surface side interface is located below a surface side interface of the photodiode. Preferably, the surface side interface of the p-well is located below a lower side interface of the photodiode and an impurity profile of the p-well does not overlap that of the photodiode. At this time, a non-dope region is present between the photodiode and the p-well.
    Type: Application
    Filed: March 22, 2006
    Publication date: October 12, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Motonari Katsuno, Yoshiyuki Matsunaga
  • Patent number: 7113213
    Abstract: An image system uses an amplification-type MOS sensor for receiving an optical image through a photoelectric conversion element, converting the image into an electrical signal, and outputting the signal. This system includes an optical system for guiding this optical image to a predetermined position, an image processing means having a sensor for photoelectrically converting the optical image guided to the predetermined position by the optical system into an electrical signal in units of pixels, and a signal process device for processing an output from the image processing means, and outputting the resultant data.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: September 26, 2006
    Inventors: Yoshiyuki Matsunaga, Keiji Mabuchi, Shinji Ohsawa, Nobuo Nakamura, Hirofumi Yamashita, Hiroki Miura, Nagataka Tanaka