Abstract: A process for producing an aldehyde, which comprises a reaction step of producing an aldehyde by reacting an olefinic compound with carbon monoxide and hydrogen in the presence of a rhodium complex catalyst comprising at least rhodium and an organic phosphite in a reaction zone, a separation step of obtaining a catalyst solution containing the rhodium complex catalyst by separating the aldehyde from a reaction solution taken from the reaction zone, and a recycling step of recycling the catalyst solution into the reaction zone, wherein the aldehyde is separated from the reaction solution in such a manner as to make an aldehyde concentration from 0.5 to 99 wt % in the catalyst solution.

Abstract: A NAND-cell type EEPROM includes an array of memory cells connected to bit lines. Each cell includes one transistor with a floating gate and a control gate electrode, wherein electrons are tunneled to or from the floating gate to write a data thereinto. A sense/latch circuit is connected to the bit lines, and selectively performs a sense operation and a latch operation if the write data. A program controller is provided for writing the data into a selected memory cell in the designated area, and for reading the data written in the selected cell to verify whether or not its resultant threshold voltage falls within an allowable range. If it is insufficient, the data is rewritten thereinto.

Abstract: A pellicle includes a reticle, a pellicle frame, a pellicle film, and a capturing material. The pellicle frame has a reticle pattern surface formed with a reticle pattern. The pellicle frame has one end face bonded to the reticle pattern surface to surround the reticle pattern. The pellicle film is bonded to the other end face of the pellicle frame. The capturing material is formed on at least part of an inner surface of the pellicle frame to capture a deposition control material which is present in a gas in a space in the pellicle to control formation of a deposit on the reticle pattern surface. The space in the pellicle is defined by the reticle pattern surface, the pellicle frame, and the pellicle film. A pellicle case for accommodating the pellicle is also disclosed.

Abstract: An upper case (32) is rotatably provided in a body portion (31) to be fixed to an end face on the column side, and a spiral cable (29) is spirally accommodated in an annular space between the body portion (31) and the upper case (32). A cancel cam (40) for pressing a cancel portion (42) of a turn signal lever (36) with return rotation of a steering is protruded in a predetermined position on an outer peripheral surface of the upper case (32). A flange portion (41) is integrally formed on the cancel cam (40) over the outer peripheral surface of the upper case (32). A side wall (31B) to circulate and surround the flange portion (41) of the upper case (32) is erected on an upper surface of the body portion (31).

Abstract: A pellicle includes a reticle, a pellicle frame, a pellicle film, and a capturing material. The pellicle frame has a reticle pattern surface formed with a reticle pattern. The pellicle frame has one end face bonded to the reticle pattern surface to surround the reticle pattern. The pellicle film is bonded to the other end face of the pellicle frame. The capturing material is formed on at least part of an inner surface of the pellicle frame to capture a deposition control material which is present in a gas in a space in the pellicle to control formation of a deposit on the reticle pattern surface. The space in the pellicle is defined by the reticle pattern surface, the pellicle frame, and the pellicle film. A pellicle case for accommodating the pellicle is also disclosed.

Abstract: A blood testing tool is provided, which separates blood cells and can collect blood plasma or blood serum with a high yield. The blood testing tool includes an asymmetric porous membrane with a pore size distribution in which an average pore size varies to be reduced continuously or discontinuously in a thickness direction. The porous membrane includes a blood supply portion, a development portion, and a blood-cell blocking portion formed between the blood supply portion and the development portion and pores in the blood cell blocking portion include only pores through which blood cells cannot pass. When blood is supplied to one side with larger pores of the blood supply portion, the blood moves in a direction parallel to a surface of the porous membrane by a capillary phenomenon, but only blood plasma or blood serum moves into the development portion to develop.

Abstract: A connector for a flat cable is equipped with a resin-made holder and a resin-made cover that is mounted on the holder. The holder has two metallic bus bars for making connection of a flat cable with two electric wires. The respective bus bars are insert molded in the holder and have flat plate-like portions of connection that are arranged in the form of a flat plane by being spaced away from each other. The outer periphery of each portion of connection is exposed from the holder. The flat cable has two conductors. The respective conductors have exposed conductor portions that are extended in array. Each electric wire has a core wire portion. On the respective connection portions there are superposed their corresponding exposed conductor portions and core wire portions, respectively. The respective core wire portions are connected to their corresponding connection portions by ultrasonic welding.

Abstract: A liquid developing method that uses a highly-concentrated liquid developing agent to develop an electrostatic latent image. A highly-concentrated liquid developing agent with a viscosity of 100 to 1,000 mPa.s can be used. Therefore, a film of developing agent from 5 to 40 &mgr;m thick can be formed on the surface of the developing roller or developing belt and this provides a soft contact with the photosensitive member surface where the electrostatic latent image has been formed. If the surface of the photosensitive member does not have good release properties, a film of pre-wet liquid can be formed on the surface of the photosensitive member.

Abstract: A non-volatile semiconductor memory device includes a semiconductor substrate, a memory cell including source and drain regions formed in a surface region of the semiconductor substrate, and a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate sequentially stacked on the semiconductor substrate, the memory cell being capable of electrically rewriting data by exchanging charges between the charge storage layer and the semiconductor substrate, and a means for applying a high potential to the semiconductor substrate and an intermediate potential to the control gate in a first data erase operation, and applying a high potential to the semiconductor substrate and a low potential to the control gate in second and subsequent data erase operations, thereby removing electrons from the charge storage layer.

Abstract: The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.

Abstract: A process for producing aldehydes, which comprises reacting a mono-olefinic compound with carbon monoxide and hydrogen in the presence of a Group VIII transition metal compound of a bisphosphite compound of the following formula (1) or (2)

Abstract: In order to achieve reliable welding, by reducing welding scars, of a flat conductor to another bonding member by an ultrasonic welding machine, a curved beveled portion facing a bonding member, a plurality of indented grooves running at a right angle to the direction of vibration of the horn tip and flat surfaces, which come in contact with a bonding member, are formed at either one of or both of the horn tip and the anvil, wherein the curved beveled portions, the indented grooves and the flat surfaces are formed facing opposite a low strength conductive member, and the indented grooves are formed at a width that is smaller than that of the flat surfaces provided between the individual indented grooves and curved beveled portions are formed at the edges where the indented grooves meet the flat surfaces.

Abstract: In order to standardize the conductors of a flat cable by changing an electrical resistance value of resistors provided in a bonding area where the flat cable is connected to lead wires and setting a specific value for the electrical resistance value of the entire signal transmission apparatus such as an air bag, the air bag circuit is provided with a flat cable, having a specific electrical resistance value and lead wires. The electrical resistance value of the entire circuit is set at a specific value by selecting the electrical resistance value of the resistors provided the a bonding area between the flat cable and the lead wires.

Abstract: A liquid developing method and a liquid developing apparatus that use a highly-concentrated liquid developing agent to develop an electrostatic latent imageA highly-concentrated liquid developing agent with a viscosity of 100 to 1,000 mPa.s can be used. Therefore, a film of developing agent from 5 to 40 .mu.m thick can be formed on the surface of the developing roller or developing belt (510) and this provides a soft contact with the photosensitive member surface where the electrostatic latent image has been formed. If the surface of the photosensitive member does not have good release properties, a film of pre-wet liquid can be formed on the surface of the photosensitive member (10).

Abstract: A NAND-cell type EEPROM includes an array of memory cells connected to bit lines. Each cell includes one transistor with a floating gate and a control gate electrode, wherein electrons are tunneled to or from the floating gate to write a data thereinto. A sense/latch circuit is connected to the bit lines, and selectively performs a sense operation and a latch operation of the write data. A program controller is provided for writing the data into a selected memory cell in a designated area, and for reading the data written in the selected cell to verify whether or not its resultant threshold voltage falls within an allowable range. If it is insufficient, the data is rewritten thereinto.

Abstract: A joint structure of a flat cable and joint terminals is provided. In this structure, bus bars are arranged in conformity with the arrangement pitch of the conductors. A bus bar holder is formed by securing the conforming side of the bus bars by a first bus bar resin layer formed of an insulating resin. The conductors are laminated and welded between terminal plates and bus bars held by the bus bar holder. An insulating coating layer of the flat cable is interposed between a first terminal resin layer and a first bus bar coating layer. The bus bar holder also includes a second bus bar resin layer formed of an insulating resin at the other side of the bus bars, and a tip coating layer remaining at the front edges of the conductors of the flat cable is interposed between the second terminal resin layer and the second bus bar resin layer. Furthermore, an insertion groove into which the tip coating layer is inserted is formed on the second bus bar resin layer or the second terminal resin layer.

Abstract: A non-volatile semiconductor memory device includes a semiconductor substrate, a memory cell including source and drain regions formed in a surface region of the semiconductor substrate, and a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate sequentially stacked on the semiconductor substrate, the memory cell being capable of electrically rewriting data by exchanging charges between the charge storage layer and the semiconductor substrate, and a means for applying a high potential to the semiconductor substrate and an intermediate potential to the control gate in a first data erase operation, and applying a high potential to the semiconductor substrate and a low potential to the control gate in second and subsequent data erase operations, thereby removing electrons from the charge storage layer.

Abstract: A magnetic recorder in which magnetic signals are transmitted between a magnetic head device and a magnetic tape, comprises a capstan shaft for driving the magnetic tape when the magnetic tape is pressed against the capstan shaft, so that the magnetic tape runs on the magnetic head device. A pinch roller presses the magnetic tape against the capstan shaft. A main chassis has the magnetic head and the capstan shaft mounted thereon. The magnetic tape and the pinch roller are mounted on a side chassis, with the slide chassis being movable relatively to the main chassis in a feed path between a first position in which the magnetic tape is wound on the magnetic head device for transmitting the magnetic signals therebetween, and a second position in which the magnetic tape is separated apart from the magnetic head device.

Abstract: A voltage multiplier circuit for raising an input voltage to a predetermined voltage is characterized in that a plurality of multiplier cells for raising an input voltage to be outputted, and a connection switching circuit for switching a connection state of these multiplier cells are provided, and the connection switching circuit connects multiplier cell groups formed by connecting one or a plurality of the multiplier cells, in parallel to an output, and varies the number of the multiplier cells of the multiplier cell groups and that of the multiplier cell groups.

Abstract: A non-volatile semiconductor memory device includes a semiconductor substrate, a memory cell including source and drain regions formed in a surface region of the semiconductor substrate, and a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate sequentially stacked on the semiconductor substrate, the memory cell being capable of electrically rewriting data by exchanging charges between the charge storage layer and the semiconductor substrate, and a means for applying a high potential to the semiconductor substrate and an intermediate potential to the control gate in a first data erase operation, and applying a high potential to the semiconductor substrate and a low potential to the control gate in second and subsequent data erase operations, thereby removing electrons from the charge storage layer.