Abstract: A resistive memory device has a structure in which a source, a channel layer, a drain, and a resistive memory layer are sequentially formed in a particular direction, with a gate electrode formed around the channel layer. The source, channel layer, and drain may be vertically stacked on a substrate, and the gate electrode may be formed completely around the channel layer.

Abstract: Graphene semiconductor device, a method of manufacturing a graphene semiconductor device, an organic light emitting display and a memory, include forming a multilayered member including a sacrificial substrate, a sacrificial layer, and a semiconductor layer deposited in sequence, forming a transfer substrate on the semiconductor layer, forming a first laminate including the transfer substrate and the semiconductor layer by removing the sacrificial layer to separate the sacrificial substrate from the semiconductor layer, forming a second laminate by forming a graphene layer on a base substrate, combining the first laminate and the second laminate such that the semiconductor layer contacts the graphene layer, and removing the transfer substrate.

Abstract: It is provided a method of manufacturing a display device for which the damage caused to the display panel due to processing at high temperatures is reduced. The method of manufacturing a display device includes: preparing a carrier substrate including a surface treated region; laying a mother substrate on the carrier substrate; progressing a process of forming a thin film on the mother substrate; and separating the carrier substrate from the mother substrate by using the surface treated region as an initial separation point. Bonding is formed between the carrier substrate and the mother substrate during forming the thin film over the areas that are not surface treated. The two substrates may be separated by disposing permeating oil on the surface treated region wherefrom oil permeates through the remaining regions by osmotic pressure. This way damage caused to the display panel during thin film processing is reduced.

Abstract: Semiconductor packages are provided. The semiconductor packages may include an upper package including a plurality of upper semiconductor devices connected to an upper package substrate. The semiconductor packages may also include a lower package including a lower semiconductor device connected to a lower package substrate. The upper and lower packages may be connected to each other.

Abstract: In one embodiment, a memory device includes a first electrode layer on a substrate; a data storing layer on the first electrode layer; and a second electrode layer on the data storing layer. At least one of the first and second electrode layers may be formed of a material having a conduction band offset that varies with an applied voltage. One of the first and second electrode layers may be connected to a bit line and the other may be connected to a word line. The first electrode layer may include one of graphene and metastable oxide. The second electrode layer may include one of graphene and metastable oxide.

Abstract: A resistive switching device includes a first material layer between a first electrode and a second electrode. The first material layer has a first region and a second region parallel to the first region. The first region corresponds to a conducting path formed in the first material layer, and is configured to switch from a low-resistance state to a high-resistance state in response to an applied voltage that is greater than or equal to a first voltage. The second region is configured to switch to a first resistance value that is less than a resistance value of the first region in the high-resistance state when the applied voltage is greater than or equal to a second voltage. The first region remains constant or substantially constant when the second region has the first resistance value.

Abstract: A two-terminal switching device includes a resistive switching element, a diode, and a resistive circuit. The resistive switching element switches between low and high resistance states based on a switching signal and maintain a switched resistance state until another switching signal is received. The diode is connected to the resistive switching element and blocks the switching signal from being transmitted to an output terminal. The resistive circuit allows the switching signal blocked by the diode to flow to the reference potential.

Abstract: An apparatus for processing an image, including: a body; a lens module disposed on the body; and a control ring disposed on the lens module, wherein the control ring is configured to change a setting value of a setting item.

Abstract: According to example embodiments, a resistance switching material element includes a resistance switching material layer between a first electrode and a second electrode, and a self-rectifying layer provided between the resistance switching material layer and one of the first and second electrodes. The second electrode may be on the first electrode.

Abstract: According to an example embodiment, a method of operating a semiconductor device includes applying a first voltage to the variable resistance device so as to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value, sensing first current flowing through the variable resistance device to which the first voltage is applied, determining a second voltage used to change the resistance value of the variable resistance device from the second resistance value to the first resistance value based on a distribution of the sensed first current, and applying the determined second voltage to the variable resistance device.

Abstract: Hybrid resistive memory devices and methods of operating and manufacturing the same, include at least two resistive memory units. At least one of the at least two resistive memory units is a resistive memory unit configured to operate in a long-term plasticity state.

Abstract: A frequency tuning apparatus may include an oscillator and a memory element connected to the oscillator. The memory element may have a variable resistance. An oscillation frequency of the oscillator may vary according to a resistance state of the memory element. The oscillator may be a ring oscillator. The memory element may be connected to an input terminal or a power terminal of the oscillator.

Abstract: Graphene semiconductor device, a method of manufacturing a graphene semiconductor device, an organic light emitting display and a memory, include forming a multilayered member including a sacrificial substrate, a sacrificial layer, and a semiconductor layer deposited in sequence, forming a transfer substrate on the semiconductor layer, forming a first laminate including the transfer substrate and the semiconductor layer by removing the sacrificial layer to separate the sacrificial substrate from the semiconductor layer, forming a second laminate by forming a graphene layer on a base substrate, combining the first laminate and the second laminate such that the semiconductor layer contacts the graphene layer, and removing the transfer substrate.

Abstract: Methods of operating semiconductor devices that include variable resistance devices, the methods including writing first data to a semiconductor device by applying a reset pulse voltage to the variable resistance device so that the variable resistance device is switched from a first resistance state to a second resistance state, and writing second data to the semiconductor device by applying a set pulse voltage to the variable resistance device so that the variable resistance device is switched from the second resistance state to the first resistance state to the second resistance state. The reset pulse voltage is higher than the set pulse voltage, and a resistance in the second resistance state is greater than in the first resistance state.

Abstract: The reinforcing component for a refrigerator, which is formed by mixing a base material as a synthetic resin material and a supplement component formed by arranging reinforcing fibers according to a pultrusion method, and combined with one or more portions of on one portion of an inner side of an outer case of the refrigerator to contact with foam, a corner of the bottom of the refrigerator or in a mechanic chamber of the refrigerator, an outer plate or an inner plate of a door of the refrigerator, and the interior of a side wall forming an inner space of the refrigerator can reduce the weight of the refrigerator while maintaining the strength.

Abstract: Resistive random access memory (RRAM) devices, and methods of manufacturing the same, include a RRAM device having a switching device, and a storage node connected to the switching device, wherein the storage node includes a first electrode, a metal oxide layer, and a second electrode sequentially stacked. The metal oxide layer contains a semiconductor material element affecting resistance of the storage node.

Abstract: Semiconductor devices including variable resistance materials and methods of operating the semiconductor devices. The semiconductor devices use variable resistance materials with resistances that vary according to applied voltages as channel layers.

Abstract: Example embodiments, relate to a non-volatile memory element and a memory device including the same. The non-volatile memory element may include a memory layer having a multi-layered structure between two electrodes. The memory layer may include first and second material layers and may show a resistance change characteristic due to movement of ionic species therebetween. The first material layer may be an oxygen-supplying layer. The second material layer may be an oxide layer having a multi-trap level.

Abstract: A substrate and an electronic device including the substrate are described. The substrate includes a first surface configured such that a semiconductor package or a semiconductor die is installable thereon, and a second surface facing the first surface, wherein, with respect to a central plane disposed between the first surface and the second surface at equal distances therefrom, a coefficient of thermal expansion in a first portion between the first surface and the central plane is configured to be higher than a coefficient of thermal expansion in a second portion between the second surface and the central plane configured to be. By using the substrate, undesirable overall shape deformation during semiconductor installation may be reduced or relieved.

Abstract: Semiconductor packages are provided. The semiconductor packages may include an upper package including a plurality of upper semiconductor devices connected to an upper package substrate. The semiconductor packages may also include a lower package including a lower semiconductor device connected to a lower package substrate. The upper and lower packages may be connected to each other.