Patents by Inventor Young Bae Kim

Young Bae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9007670
    Abstract: Disclosed are injection moldings, an injection-molding apparatus and a method thereof. The injection-molding apparatus comprises: a cavity mold having a cavity; a core mold having a core surface to form a molding space for injection moldings when being joined to the cavity mold; a heating unit for heating the cavity mold or the core mold; a cooling unit for cooling the cavity mold or the core mold; and a patterning stamp having a micrometer or nanometer sized pattern and provided on an inner surface of the molding space. According to the injection-molding apparatus, a micrometer or nanometer sized pattern is formed on a surface of injection moldings so as to have a super-hydrophobic characteristic and an optical characteristic, and a micrometer or nanometer sized pattern of a complex structure can be implemented.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: April 14, 2015
    Assignee: LG Electronics Inc.
    Inventors: Hyun-Woo Jun, Young-Bae Kim, Chang-Il Jung, Seok-Jae Jeong, Hyung-Pyo Yoon
  • Patent number: 9001551
    Abstract: In a method of operating a semiconductor device, a resistance value of a variable resistance element is changed from a first resistance value to a second resistance value by applying a first voltage to the variable resistance element; and a first current that flows through the variable resistance element is sensed. A second voltage for changing the resistance value of the variable resistance element from the second resistance value to the first resistance value is modulated based on a dispersion of the first current, and the first voltage is re-applied to the variable resistance element based on a dispersion of the first current.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Man Chang, Young-bae Kim, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee, Chang-jung Kim, Myoung-jae Lee, Kyung-min Kim
  • Patent number: 8988892
    Abstract: A substrate and an electronic device including the substrate are described. The substrate includes a first surface configured such that a semiconductor package or a semiconductor die is installable thereon, and a second surface facing the first surface, wherein, with respect to a central plane disposed between the first surface and the second surface at equal distances therefrom, a coefficient of thermal expansion in a first portion between the first surface and the central plane is configured to be higher than a coefficient of thermal expansion in a second portion between the second surface and the central plane configured to be. By using the substrate, undesirable overall shape deformation during semiconductor installation may be reduced or relieved.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: March 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young-bae Kim
  • Patent number: 8970042
    Abstract: A circuit board is provided including a core insulation film having a thickness and including a first surface and an opposite second surface, an upper stack structure and a lower stack structure. The upper stack structure has a thickness and has an upper conductive pattern having a thickness and an overlying upper insulation film stacked on the first surface of the core insulation film. The lower stack structure has a thickness and has a lower conductive pattern having a thickness and an overlying lower insulation film stacked on the second surface of the core insulation film. A ratio P of a sum of the thicknesses of the upper conductive pattern and the lower conductive pattern to a sum of the thicknesses of the core insulation film, the upper stack structure and the lower stack structure is in a range from about 0.05 to about 0.2.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: March 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bok-Sik Myung, Chul-Woo Kim, Kyung-Tae Na, Young-Bae Kim, Yong-Hoon Kim, Hee-Seok Lee
  • Patent number: 8963308
    Abstract: Semiconductor packages are provided. The semiconductor packages may include an upper package including a plurality of upper semiconductor devices connected to an upper package substrate. The semiconductor packages may also include a lower package including a lower semiconductor device connected to a lower package substrate. The upper and lower packages may be connected to each other.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: February 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heung-Kyu Kwon, Young-Bae Kim, Yun-Hee Lee
  • Publication number: 20150041894
    Abstract: A method of fabricating a semiconductor device capable of increasing a breakdown voltage without an additional epitaxial layer or buried layer with respect to a high-voltage horizontal MOSFET.
    Type: Application
    Filed: August 6, 2014
    Publication date: February 12, 2015
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Francois Hebert, I-Shan Sun, Young Bae Kim, Young Ju Kim, Kwang Il Kim, In Taek Oh, Jin Woo Moon
  • Patent number: 8947905
    Abstract: A method of driving a nonvolatile memory device including applying a reset voltage to a unit memory cell, reading a reset current of the unit memory cell, confirming whether the reset current is within a first current range, if the reset current is not within the first current range, changing the reset voltage and applying a changed reset voltage or applying again the reset voltage to the unit memory cell after applying a set voltage to the unit memory cell, if the reset current is within the first current range, confirming whether a difference between the present reset current and an immediately previous set current is within a second current range, and, if the difference is not within the second current range, applying the reset voltage or applying again the reset voltage to the unit memory cell after applying a set voltage to the unit memory cell.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: February 3, 2015
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Man Chang, Young-bae Kim, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee, Chang-jung Kim, Myoung-jae Lee, Kyung-min Kim
  • Publication number: 20150004364
    Abstract: A glass film laminate includes a carrier glass including a rough surface, a smooth surface surrounding the rough surface, the rough surface having a relatively large surface roughness and the smooth surface having a relatively small surface roughness, and a passage rough surface connected to the rough surface; and a glass film laminated on the rough surface and the smooth surface of the carrier glass.
    Type: Application
    Filed: April 29, 2014
    Publication date: January 1, 2015
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Young-Bae KIM, Jong-Seong KIM, Jong-Hwan LEE
  • Publication number: 20140374724
    Abstract: The present invention relates to a novel indole-based compound having superior hole injection and transport capabilities, light-emitting capabilities, and the like, and an organic electroluminescent device which comprises the indole-based compound in one or more organic layers thereof so as to thereby achieve improved characteristics, such as light-emitting efficiency, driving voltage, and lifespan characteristics.
    Type: Application
    Filed: December 7, 2012
    Publication date: December 25, 2014
    Applicant: DOOSAN CORPORATION
    Inventors: Hoe Moon Kim, Sung Moo Kim, Young Bae Kim, Tae Hyung Kim, Ho Cheol Park, Chang Jun Lee, Young Mi Baek, Jin Yong Shin
  • Publication number: 20140353749
    Abstract: A semiconductor power device and a method of fabricating the same are provided. The semiconductor power device involving: a first conductivity type semiconductor substrate; an epitaxial layer formed on the semiconductor substrate; a second conductivity type well formed in the semiconductor substrate and the epitaxial layer; a drain region formed in the well; an oxide layer that insulates a gate region from the drain region; a first conductivity type buried layer formed in the well; a second conductivity type drift region surrounding the buried layer; and a second conductivity type TOP region formed between the buried layer and the oxide layer.
    Type: Application
    Filed: December 23, 2013
    Publication date: December 4, 2014
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Francois HEBERT, Young Bae KIM, Jin Woo MOON, Kyung Ho LEE
  • Patent number: 8902632
    Abstract: Hybrid resistive memory devices and methods of operating and manufacturing the same, include at least two resistive memory units. At least one of the at least two resistive memory units is a resistive memory unit configured to operate in a long-term plasticity state.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 2, 2014
    Assignees: Samsung Electronics Co., Ltd., Gwangju Institute of Science and Technology
    Inventors: Young-bae Kim, Hyun-sang Hwang, Chang-jung Kim
  • Publication number: 20140306270
    Abstract: A junction field-effect transistor (JFET) device is provided. The JFET includes a drain region, a source region, and a junction gate region disposed between the drain region and the source region, and the source region includes two or more source terminals.
    Type: Application
    Filed: January 23, 2014
    Publication date: October 16, 2014
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Young Bae KIM, In Taek OH, Kyung Ho LEE, Kwang Il KIM
  • Publication number: 20140306285
    Abstract: Provided is a semiconductor power device. The semiconductor power device includes a well disposed in a substrate, a gate overlapping the well, a source region disposed at one side of the gate, a buried layer disposed in the well, and a drain region or a drift region contacting the buried layer.
    Type: Application
    Filed: December 20, 2013
    Publication date: October 16, 2014
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Young Bae KIM, Jin Woo MOON, Francois HEBERT
  • Patent number: 8861253
    Abstract: A method of operating a semiconductor device that includes a variable resistance device, the method including applying a first voltage to the variable resistance device so as to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value; sensing first current flowing through the variable resistance device to which the first voltage is applied; determining whether the first current falls within a predetermined range of current; and if the first current does not fall within the first range of current, applying an additional first voltage that is equal to the first voltage to the variable resistance device.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: October 14, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Man Chang, Young-bae Kim, Chang-jung Kim, Myoung-jae Lee, Ji-hyun Hur, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee
  • Patent number: 8834771
    Abstract: The present invention relates to an appliance having a micro-pattern (190b) for displaying a pattern or a character, and a method for fabricating a structure having a micro-pattern (190b), and more particularly, to a method for displaying a pattern or a character more effectively. To achieve above object, the appliance of the present invention includes a body, a structure provided to an outside or an inside of the body, and a micro-pattern (190b) for changing a light incident thereon from an outside of the micro-pattern to a light of a predetermined color to display a predetermined character or a predetermined pattern on the structure.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: September 16, 2014
    Assignee: LG Electronics Inc.
    Inventors: Young Bae Kim, Young Kyu Kim
  • Publication number: 20140246643
    Abstract: A memory device may include a first electrode and a second electrode spaced apart from the first electrode. The memory device may further include a memory element disposed between the first electrode and the second electrode and a switching element disposed between the first electrode and the second electrode. The switching element may be configured to control signal access to the memory element. The memory device may further include a barrier layer disposed between the memory element and the switching element, the barrier layer including an insulation material.
    Type: Application
    Filed: February 27, 2014
    Publication date: September 4, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young-bae KIM, Kyung-min KIM, Sung-ho KIM, Seung-ryul LEE, Man CHANG, Eun-ju CHO, Sae-jin KIM, Chang-jung KIM
  • Patent number: 8773888
    Abstract: According to an example embodiment, a method of operating a semiconductor device having a variable resistance device includes: applying a first voltage to the variable resistance device to change a resistance value of the variable resistance device from a first resistance value to a second resistance value that is different from the first resistance value; sensing a first current flowing through the variable resistance device to which the first voltage is applied; determining a second voltage used for changing the variable resistance device from the second resistance value to the first resistance value, based on a dispersion of the sensed first current; and applying the determined second voltage to the variable resistance device.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Man Chang, Young-bae Kim, Chang-jung Kim, Myoung-jae Lee, Seong-jun Park, Ji-hyun Hur, Dong-soo Lee, Chang-bum Lee, Seung-ryul Lee
  • Patent number: 8772750
    Abstract: A non-volatile memory element includes: a memory layer disposed between a first electrode and a second electrode; and a buffer layer disposed between the memory layer and the first electrode. The memory layer includes a first material layer and a second material layer. The first material layer and the second material layer are configured to exchange ionic species to change a resistance state of the memory layer.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-bum Lee, Chang-jung Kim, Young-bae Kim, Myoung-jae Lee, Ji-hyun Hur, Dong-soo Lee, Man Chang, Seung-ryul Lee
  • Publication number: 20140167260
    Abstract: Semiconductor packages are provided. The semiconductor packages may include an upper package including a plurality of upper semiconductor devices connected to an upper package substrate. The semiconductor packages may also include a lower package including a lower semiconductor device connected to a lower package substrate. The upper and lower packages may be connected to each other.
    Type: Application
    Filed: February 24, 2014
    Publication date: June 19, 2014
    Inventors: Heung-Kyu Kwon, Young-Bae Kim, Yun-Hee Lee
  • Publication number: 20140168495
    Abstract: An apparatus for processing an image, including: a body; a lens module disposed on the body; and a control ring disposed on the lens module, wherein the control ring is configured to change a setting value of a setting item.
    Type: Application
    Filed: February 25, 2014
    Publication date: June 19, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-jong Cho, Young-bae Kim, Se-hyun Park, Ja-yong Koo, Mun-cheol Choi, Yun-ho Lee