Abstract: A method of manufacturing a semiconductor structure is disclosed. The method includes the following operations. An insulation region is formed in a substrate to define an active region in the substrate. A gate structure is formed across the active region. A source or drain region is formed in the active region and adjoins the insulation region. A resist protective dielectric film is formed, wherein the resist protective dielectric film overlaps an interface between the source or drain region and the insulation region, and exposes a portion of the source or drain region and a portion of the gate structure.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active area including a channel region sandwiched between two source/drain regions; an insulation region surrounding the active area from a top view; and a dielectric layer disposed over and in contact with an interface between the insulation region and the source/drain regions. A method of manufacturing the same is also disclosed.

Abstract: A solid-state image sensor having a first region and a second region adjacent to the first region along a first direction is provided. The solid-state image sensor includes a first unit pattern disposed in the first region. The solid-state image sensor also includes a second unit pattern disposed in the second region and corresponding to the first unit pattern. The first unit pattern and the second unit pattern each includes normal pixels and an auto-focus pixel array. The normal pixels and the auto-focus pixel array in the first unit pattern form a first arrangement, the normal pixels and the auto-focus pixel array in the second unit pattern form a second arrangement, and the first arrangement and the second arrangement are symmetric with respect to the first axis of symmetry.

Abstract: A solid-state image sensor having a first region and a second region adjacent to the first region along a first direction is provided. The solid-state image sensor includes a first unit pattern disposed in the first region. The solid-state image sensor also includes a second unit pattern disposed in the second region and corresponding to the first unit pattern. The first unit pattern and the second unit pattern each includes normal pixels and an auto-focus pixel array. The normal pixels and the auto-focus pixel array in the first unit pattern form a first arrangement, the normal pixels and the auto-focus pixel array in the second unit pattern form a second arrangement, and the first arrangement and the second arrangement are symmetric with respect to the first axis of symmetry.

Abstract: An optical device is provided. The optical device includes a substrate and a plurality of optical structures. The substrate includes a plurality of photoelectric conversion elements. The optical structures are disposed above the substrate. Each optical structure corresponds to one photoelectric conversion element. Each optical structure includes a first portion and a second portion. The first portion has a first glass transition temperature. The second portion has a second glass transition temperature. The second portion guides the incident light into the photoelectric conversion element. The first glass transition temperature is higher than the second glass transition temperature.

Abstract: The solid-state image sensor includes a semiconductor substrate having first and second photoelectric conversion elements, a color filter layer, and a hybrid layer. The isolation structure is disposed between the first and second photoelectric conversion elements. The color filter layer is disposed above the semiconductor substrate. The hybrid layer is disposed between the semiconductor substrate and the color filter layer. The hybrid layer includes a first partition structure, a second partition structure, and a transparent layer. The first partition structure is disposed to correspond to the isolation structure. The second partition structure is surrounded by the first partition structure. The transparent layer is between the first partition structure and the second partition structure. The refractive index of the first partition structure and the refractive index of the second partition structure are lower than the refractive index of the transparent layer.

Abstract: An image sensor includes: a group of autofocus sensor units; neighboring sensor units adjacent to and surrounding the group of autofocus sensor units, wherein each of the neighboring sensor units has a first side close to the group of autofocus sensor units, and a second side away from the group of autofocus sensor units. The image sensor further includes: a first light shielding structure disposed between the group of autofocus sensor units and the neighboring sensor units; a first extra light shielding structure laterally extending from the first light shielding structure and disposed on at least one of the first side and the second side of one or more of the neighboring sensor units.

Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a semiconductor substrate having photoelectric conversion elements. The photoelectric conversion elements form an N×N pixel array, where N is a positive integer larger than or equal to 3. The solid-state image sensor also includes a modulation layer disposed above the photoelectric conversion elements. The solid-state image sensor further includes a light-adjusting structure disposed on the modulation layer and corresponding to the N×N pixel array. The N×N pixel array includes a first pixel region having at least one first pixel. The N×N pixel array also includes a second pixel region adjacent to the first pixel region in a first direction and in a second direction different from the first direction and having second pixels. The aperture ratio of the first pixel and the aperture ratio of the second pixel are different.

Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a plurality of photoelectric conversion elements. The solid-state image sensor also includes a first color filter layer disposed above the photoelectric conversion elements and a second color filter layer disposed adjacent to the first color filter layer, which respectively have a plurality of first color filter segments and a plurality of second color filter segments. Moreover, the solid-state image sensor includes a first metal grid structure disposed between the first color filter layer and the second color filter layer. The solid-state image sensor also includes a second metal grid structure disposed between the first color filter segments and between the second color filter segments. The bottom of the first metal grid structure has a first grid width, and the bottom of the second metal grid structure has a second grid width narrower than the first grid width.

Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a plurality of photoelectric conversion elements. The solid-state image sensor also includes a color filter layer disposed above the photoelectric conversion elements. The color filter layer has a plurality of color filter segments. The solid-state image sensor further includes a partition grid disposed between the color filter segments. Moreover, the solid-state image sensor includes a patterned structure disposed on the color filter layer. The patterned structure has a plurality of patterned segments. The solid-state image sensor also includes a transparent layer disposed on the color filter layer and the partition grid. The transparent layer surrounds the patterned segments. At least one patterned segment is disposed on the partition grid.

Abstract: An image sensing device is provided. The image sensing device includes: a micro lens, a first optical layer, a second optical layer, and an anti-reflection layer. The first optical layer is formed on the micro lens. The second optical layer is formed on the first optical layer. An interface is formed between the first optical layer and the second optical layer, and the interface is beveled. The anti-reflection layer is formed on the second optical layer.

Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a plurality of photoelectric conversion elements. The solid-state image sensor also includes a modulation layer disposed above the photoelectric conversion elements, and the modulation layer has a plurality of modulation segments. The modulation layer includes a plurality of first sub-layers and a plurality of second sub-layers having different refractive indexes. From the top view of the modulation layer, the modulation segments form a first group and a second group, and the second group is adjacent to the first group. The arrangement of the first sub-layers and the second sub-layers in the first group is different from the arrangement of the first sub-layers and the second sub-layers in the second group.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a substrate comprising sidewalls that define a trench. A capacitor comprising a plurality of conductive layers and a plurality of dielectric layers that define a trench segment is disposed within the trench. A width of the trench segment continuously increases from a front-side surface of the substrate in a direction towards a bottom surface of the trench.

Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a plurality of photoelectric conversion elements. The solid-state image sensor also includes a first color filter layer disposed above the photoelectric conversion elements and having a plurality of first color filter segments. The solid-state image sensor further includes a second color filter layer disposed adjacent to the first color filter layer and having a plurality of second color filter segments. The solid-state image sensor includes a first grid structure disposed between the first color filter layer and the second color filter layer. The first grid structure has a first grid height. The solid-state image sensor also includes a second grid structure disposed between the first color filter segments and between the second color filter segments. The second grid structure has a second grid height that is lower than or equal to the first grid height.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a pillar structure abutting a trench capacitor. A substrate has sidewalls that define a trench. The trench extends into a front-side surface of the substrate. The trench capacitor includes a plurality of capacitor electrode layers and a plurality of capacitor dielectric layers that respectively line the trench and define a cavity within the substrate. The pillar structure is disposed within the substrate. The pillar structure has a first width and a second width less than the first width. The first width is aligned with the front-side surface of the substrate and the second width is aligned with a first point disposed beneath the front-side surface.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a source region and a drain region arranged in a semiconductor substrate, where the source region is laterally separated from the drain region. A gate stack is arranged over the semiconductor substrate and between the source region and the drain region. A cap layer is arranged over the gate stack, where a bottom surface of the cap layer contacts a top surface of the gate stack. Sidewall spacers are arranged along sides of the gate stack and the cap layer. A resist protective oxide (RPO) layer is disposed over the cap layer, where the RPO layer extends along sides of the sidewalls spacers to the semiconductor substrate. A contact etch stop layer is arranged over the RPO layer, the source region, and the drain region.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a pillar structure abutting a trench capacitor. A substrate has sidewalls that define a trench. The trench extends into a front-side surface of the substrate. The trench capacitor includes a plurality of capacitor electrode layers and a plurality of capacitor dielectric layers that respectively line the trench and define a cavity within the substrate. The pillar structure is disposed within the substrate. The pillar structure has a first width and a second width less than the first width. The first width is aligned with the front-side surface of the substrate and the second width is aligned with a first point disposed beneath the front-side surface.

Abstract: A Schottky diode device includes a substrate having a first conductivity type, a first well region having a second conductivity type disposed in the substrate, and a first doped region having the second conductivity type in the first well region, wherein the first doped region includes a first portion and a second portion, and the first portion and the second portion have different doping concentrations. The first portion includes a region having at least four sides, from a top-view perspective, abutting the second portion.

Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a source region and a drain region arranged in a semiconductor substrate, where the source region is laterally separated from the drain region. A gate stack is arranged over the semiconductor substrate and between the source region and the drain region. A cap layer is arranged over the gate stack, where a bottom surface of the cap layer contacts a top surface of the gate stack. Sidewall spacers are arranged along sides of the gate stack and the cap layer. A resist protective oxide (RPO) layer is disposed over the cap layer, where the RPO layer extends along sides of the sidewalls spacers to the semiconductor substrate. A contact etch stop layer is arranged over the RPO layer, the source region, and the drain region.