Abstract: A method of fabricating an electrostatic discharge protection structure includes the following steps. Firstly, a semiconductor substrate is provided. Plural isolation structures, a well region, a first conductive region and a second conductive region are formed in the semiconductor substrate. The well region contains first type conducting carriers. The first conductive region and the second conductive region contain second type conducting carriers. Then, a mask layer is formed on the surface of the semiconductor substrate, wherein a part of the first conductive region is exposed. Then, a first implantation process is performed to implant the second type conducting carriers into the well region by using the mask layer as an implantation mask, so that a portion of the first type conducting carriers of the well region is electrically neutralized and a first doped region is formed under the exposed part of the first conductive region.

Abstract: A method including measuring a first distance to a surface of an integrated circuit substrate or a portion of an integrated circuit package by measuring an angle to it from two known points; introducing a material onto the surface; measuring a second distance to a surface of the film from the two known points; and determining a thickness of the introduced material by subtracting the second distance from the first distance.

Abstract: The disclosure provides an infrared absorption material, a method for fabricating the same, and a thermal isolation structure employing the same. The infrared absorption material includes a tungsten bronze complex having a formula of M1xM2yWOz, wherein 0.6?x?0.8, 0.2?y?0.33, 0.8?x+y<1, and 2?z?3; M1 is Li, or Na; and, M2 is K, Rb, or Cs. In particular, the tungsten bronze complex consists of a cubic tungsten bronze (CTB) and a hexagonal tungsten bronze (HTB).

Abstract: A method of fabricating an electrostatic discharge protection structure includes the following steps. Firstly, a semiconductor substrate is provided. Plural isolation structures, a well region, a first conductive region and a second conductive region are formed in the semiconductor substrate. The well region contains first type conducting carriers. The first conductive region and the second conductive region contain second type conducting carriers. Then, a mask layer is formed on the surface of the semiconductor substrate, wherein a part of the first conductive region is exposed. Then, a first implantation process is performed to implant the second type conducting carriers into the well region by using the mask layer as an implantation mask, so that a portion of the first type conducting carriers of the well region is electrically neutralized and a first doped region is formed under the exposed part of the first conductive region.

Abstract: A CMOS device includes a substrate, a pMOS transistor and an nMOS transistor formed on the substrate, and a gated diode. The gated diode includes a floating gate formed on the substrate in between the pMOS transistor and the nMOS transistor and a pair of a p-doped region and an n-doped region formed in the substrate and between the pMOS transistor and the nMOS transistor. The n-doped region is formed between the floating gate and the nMOS transistor, and the p-doped region is formed between the floating gate and the pMOS transistor.

Abstract: A fin type ESD protection device includes at least one first fin, at least one second fin, and at least one gate structure. The first fin is disposed on a semiconductor substrate, and a source contact contacts the first fin. The second fin is disposed on the semiconductor substrate, and a drain contact contacts the second fin. The first fin and the second fin extend in a first direction respectively, and the first fin is separated from the second fin. The gate structure is disposed between the source contact and the drain contact. The first fin is separated from the drain contact, and the second fin is separated from the source contact.

Abstract: A protection method for an electronic device includes generating a control command using a processor of the electronic device when it is determined to acquire information of a current user of the electronic device. The electronic device is controlled to acquire the information of the current user and to acquire data of the electronic device according to the control command. The acquired information is stored. The acquired information and the acquired data is transmitted to the server.

Abstract: A hinge module for an electronic device includes a main body and an upper cover. The hinge module includes a biaxial hinge and a pad. The biaxial hinge includes a first rotary shaft, a second rotary shaft and a connecting member. One end of the first rotary shaft is fixed to the main body, and another end of the first rotary shaft being pivotally connected with the connecting member. One end of the second rotary shaft is fixed to the upper cover, and another end of the second rotary shaft is pivotally connected with the connecting member. The pad is disposed at the connecting member of the biaxial hinge. When the upper cover rotates with respect to the main body, the connecting member and the pad rotates using the first rotary shaft as a rotation axis.

Abstract: A low-haze tin oxide film and a manufacturing method thereof are provided. The method includes: applying a mixed solution on a substrate and heating the substrate to form a tin oxide film. The mixed solution contains a tin source, an oxidizing agent, and a solvent.

Abstract: A polyimide copolymer represented by formula (I) or formula (II) is provided. In formula (I) or formula (II), B is a cycloaliphatic group or aromatic group, A is an aromatic group, R is hydrogen or phenyl, and m and n are 20-50. The invention also provides a method for fabricating a patterned metal oxide layer.

Abstract: In a method for selecting objects of an electronic device, a touch operation performed on a touch screen of the electronic device is detected. A selection region on the touch screen is determined according to a touch operation that is detected from the touch screen. The selection region is scaled according to one or more predetermined ratios when contact points of the touch operation move on the touch screen. Objects displayed on the touch screen are selected according to the determined selection region.

Abstract: An electronic device includes a display unit, a touch-sensing module and a processing unit. The display unit displays a user interface. The user interface includes a first seek bar and a second seek bar. The touch-sensing module senses a first dragging event and a second dragging event of the first seek bar, and a third dragging event of the second seek bar corresponding to a touching object. The processing unit implements the user interface. Furthermore, the first seek bar is disabled and the second seek bar is enabled by the processing unit according to a first distance of the first dragging event and a second distance of the second dragging event when the touching object remains in a predetermined area for a predetermined period. The file is enabled according to the final position of the third dragging event.

Abstract: A semiconductor electrostatic discharge (ESD) protection apparatus comprises at least one elementary transistor with a first conductivity type, a well region with a second conductivity type, a guard ring with the second conductivity type and a semiconductor interval region. The elementary transistor is formed in the well region. The guard ring surrounds the at least one elementary transistor. The semiconductor interval region is disposed between the elementary transistor and the guard ring in order to surrounds the elementary transistor, wherein the semiconductor interval region is an undoped region, a doped region with the first conductivity type or a doped region with the second conductivity type that has a doping concentration substantially less than that of the well region.

Abstract: A CMOS device includes a substrate, a pMOS transistor and an nMOS transistor formed on the substrate, and a gated diode. The gated diode includes a floating gate formed on the substrate in between the pMOS transistor and the nMOS transistor and a pair of a p-doped region and an n-doped region formed in the substrate and between the pMOS transistor and the nMOS transistor. The n-doped region is formed between the floating gate and the nMOS transistor, and the p-doped region is formed between the floating gate and the pMOS transistor.

Abstract: Methods of inhibiting a phosphodiesterase (PDE) 7 enzyme such as PDE7A1 and methods for treating diseases associated with PDE7 using one or more trans-aconitic acid compounds, which can be isolated from plants.

Abstract: Embodiments according to the present invention relate generally to PAG bilayer and PAG-doped unilayer structures using sacrificial polymer layers that incorporate a photoacid generator having a concentration gradient therein. Said PAG concentration being higher in a upper portion of such structures than in a lower portion thereof. Embodiments according to the present invention also relate to a method of using such bilayers and unilayers to form microelectronic structures having a three-dimensional space, and methods of decomposition of the sacrificial polymer within the aforementioned layers.

Abstract: A method including measuring a first distance to a surface of an integrated circuit substrate or a portion of an integrated circuit package by measuring an angle to it from two known points; introducing a material onto the surface; measuring a second distance to a surface of the film from the two known points; and determining a thickness of the introduced material by subtracting the second distance from the first distance.

Abstract: Provided is a metal oxide multi-layered structure for infrared blocking, which includes a first metal oxide film, a second metal oxide film, a third metal oxide film, and a metal nanoparticle layer. The third metal oxide film is disposed between the first metal oxide film and the second metal oxide film. The metal nanoparticle layer is disposed between the second metal oxide film and the third metal oxide film.

Abstract: The disclosure provides an infrared absorption material, a method for fabricating the same, and a thermal isolation structure employing the same. The infrared absorption material includes a tungsten bronze complex having a formula of M1xM2yWOz, wherein 0.6?x?0.8, 0.2?y?0.33, 0.8?x+y<1, and 2<z?3; M1 is Li, or Na; and, M2 is K, Rb, or Cs. In particular, the tungsten bronze complex consists of a cubic tungsten bronze (CTB) and a hexagonal tungsten bronze (HTB).

Abstract: A hinge module for an electronic device includes a main body and an upper cover. The hinge module includes a biaxial hinge and a pad. The biaxial hinge includes a first rotary shaft, a second rotary shaft and a connecting member. One end of the first rotary shaft is fixed to the main body, and another end of the first rotary shaft being pivotally connected with the connecting member. One end of the second rotary shaft is fixed to the upper cover, and another end of the second rotary shaft is pivotally connected with the connecting member. The pad is disposed at the connecting member of the biaxial hinge. When the upper cover rotates with respect to the main body, the connecting member and the pad rotates using the first rotary shaft as a rotation axis.