Patents by Inventor Yu-Chun Chen

Yu-Chun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190057994
    Abstract: In some embodiments, the present disclosure relates to an integrated chip having an inter-layer dielectric (ILD) structure along a first surface of a substrate having a photodetector. An etch stop layer is over the ILD structure, and a reflector is surrounded by the etch stop layer and the ILD structure. The reflector has a curved surface facing the substrate at a location directly over the photodetector. The curved surface is coupled between a first sidewall and a second sidewall of the reflector. The reflector has larger thicknesses along the first sidewall and the second sidewall than at a center of the reflector between the first sidewall and the second sidewall.
    Type: Application
    Filed: March 26, 2018
    Publication date: February 21, 2019
    Inventors: Po-Han Huang, Jiech-Fun Lu, Yu-Chun Chen
  • Publication number: 20190035674
    Abstract: An integrated circuit includes a first insulation layer, a bottom plate, a first patterned dielectric layer, a medium plate, a second patterned dielectric layer, and a top plate. The first patterned dielectric layer is disposed on the bottom plate. The medium plate is disposed on the first patterned dielectric layer. At least a part of the first patterned dielectric layer and the medium plate and a part of the bottom plate are disposed in a first trench penetrating the first insulation layer. The bottom plate, the first patterned dielectric layer, and the medium plate constitute a first metal-insulator-metal (MIM) capacitor. The second patterned dielectric layer is disposed on the medium plate. The top plate is disposed on the second patterned dielectric layer. The medium plate, the second patterned dielectric layer, and the top plate constitute a second MIM capacitor. The bottom plate is electrically connected with the top plate.
    Type: Application
    Filed: August 20, 2017
    Publication date: January 31, 2019
    Inventors: Chiu-Jung Chiu, Hung-Chan Lin, Yu-Chun Chen
  • Publication number: 20180182900
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate having a tunneling well, a tunneling oxide layer, a charge storage layer and a control gate. The tunneling oxide layer is disposed on the tunneling well. The tunneling oxide layer includes a first tunneling oxide segment having a first thickness, a second tunneling oxide segment having a second thickness, and a third tunneling oxide segment having a third thickness, and the first thickness, the second thickness and the third thickness are different from each other. The charge storage layer is disposed on the tunneling oxide layer, and the control gate is disposed on the charge storage layer.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 28, 2018
    Inventors: Ya-Sheng Feng, Chi-Cheng Huang, Ping-Chia Shih, Hung-Wei Lin, Yu-Chun Chen, Ling-Hsiu Chou, An-Hsiu Cheng
  • Patent number: 10008615
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate having a tunneling well, a tunneling oxide layer, a charge storage layer and a control gate. The tunneling oxide layer is disposed on the tunneling well. The tunneling oxide layer includes a first tunneling oxide segment having a first thickness, a second tunneling oxide segment having a second thickness, and a third tunneling oxide segment having a third thickness, and the first thickness, the second thickness and the third thickness are different from each other. The charge storage layer is disposed on the tunneling oxide layer, and the control gate is disposed on the charge storage layer.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: June 26, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ya-Sheng Feng, Chi-Cheng Huang, Ping-Chia Shih, Hung-Wei Lin, Yu-Chun Chen, Ling-Hsiu Chou, An-Hsiu Cheng
  • Publication number: 20180068460
    Abstract: A liquid level detecting system and method thereof are provided in present application. Aforementioned system acquires an image containing transparent container and labeling element, analyzes the image portion of the labeling element which effected by the tested liquid in the transparent container so as to determine the liquid level of the tested liquid. Comparing with the imaging recognition technique for measuring liquid level of prior art, the system and method thereof of present application is able to determine the liquid level of the transparent liquid in transparent container effectively.
    Type: Application
    Filed: September 1, 2017
    Publication date: March 8, 2018
    Inventors: Kuo-Tsung Huang, Yu-Chun Chen
  • Patent number: 9748558
    Abstract: The present invention provides a method for preparing an electrode material, comprising providing an acidic plating bath; adding titanium dioxide in the form of powder, metal salt, and reductant to said acidic plating bath to obtain a precursor; and heat treating said precursor to obtain an electrode material. When the electrode material obtained by said method is applied to batteries, the batteries have not only high capacity, but also long lifetime.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: August 29, 2017
    Assignee: Taiwan Hopax Chems. Mfg. Co., Ltd.
    Inventors: Chia-Chin Chang, Yu-Chun Chen, Chun-Wei Huang, Ru-Shi Liu, Li-Jane Her
  • Patent number: 9748222
    Abstract: A fin type ESD protection device includes at least one first fin, at least one second fin, and at least one gate structure. The first fin is disposed on a semiconductor substrate, and a source contact contacts the first fin. The second fin is disposed on the semiconductor substrate, and a drain contact contacts the second fin. The first fin and the second fin extend in a first direction respectively, and the first fin is separated from the second fin. The gate structure is disposed between the source contact and the drain contact. The first fin is separated from the drain contact, and the second fin is separated from the source contact.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: August 29, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Chun Chen, Ping-Chen Chang, Tien-Hao Tang, Kuan-Cheng Su
  • Publication number: 20170194511
    Abstract: A non-volatile memory (NVM) device includes a substrate, a charge trapping structure, a first gate electrode and a spacer. The charge trapping structure is disposed on the substrate. The first gate electrode is disposed on the charge trapping structure. The spacer is disposed on at least one sidewall of the first gate electrode and the charge trapping structure. Wherein, the charge trapping structure has a lateral size substantially greater than that of the first gate electrode.
    Type: Application
    Filed: January 27, 2016
    Publication date: July 6, 2017
    Inventors: Yu-Chun Chen, Chun-Hung Cheng, Yu-Chieh Lin, Ya-Sheng Feng, Ping-Chia Shih, Ling-Hsiu Chou
  • Publication number: 20170163576
    Abstract: The present invention provides an electronic device including a display device, and a processor. When the content of a packet message of the instant messaging software is provided with specific content, the processor filters the specific content from the content of the packet message to serve as the main content. When the ratio of a specific language of the main content to the main content is greater than a first predetermined value, the processor displays a specific input interface corresponding to the specific language on the display device.
    Type: Application
    Filed: March 24, 2016
    Publication date: June 8, 2017
    Inventors: Yu-Chun CHEN, Huang-Kai CHEN
  • Publication number: 20170123753
    Abstract: A method for playing back sound information in an electronic device includes setting a first trigger condition for starting a recording function, and the data which records sound is stored into an attached storage device. When a predetermined operation is detected, the sound data pertaining to a predetermined or selected time period is extracted and stored. Through the method the electronic device can play back the extracted sound data.
    Type: Application
    Filed: October 19, 2016
    Publication date: May 4, 2017
    Inventor: YU-CHUN CHEN
  • Patent number: 9627210
    Abstract: A method of fabricating an electrostatic discharge protection structure includes the following steps. Firstly, a semiconductor substrate is provided. Plural isolation structures, a well region, a first conductive region and a second conductive region are formed in the semiconductor substrate. The well region contains first type conducting carriers. The first conductive region and the second conductive region contain second type conducting carriers. Then, a mask layer is formed on the surface of the semiconductor substrate, wherein a part of the first conductive region is exposed. Then, a first implantation process is performed to implant the second type conducting carriers into the well region by using the mask layer as an implantation mask, so that a portion of the first type conducting carriers of the well region is electrically neutralized and a first doped region is formed under the exposed part of the first conductive region.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: April 18, 2017
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Chang-Tzu Wang, Yu-Chun Chen, Tien-Hao Tang
  • Patent number: 9610268
    Abstract: Methods of inhibiting a phosphodiesterase (PDE) 7 enzyme such as PDE7A1 and methods for treating diseases associated with PDE7 using one or more trans-aconitic acid compounds, which can be isolated from plants.
    Type: Grant
    Filed: October 13, 2014
    Date of Patent: April 4, 2017
    Assignee: Academia Sinica
    Inventors: Shui-Tein Chen, I-Shu Lee, Yu-Chun Chen
  • Patent number: 9576117
    Abstract: A protection method for an electronic device includes generating a control command using a processor of the electronic device when it is determined to acquire information of a current user of the electronic device. The electronic device is controlled to acquire the information of the current user and to acquire data of the electronic device according to the control command. The acquired information is stored. The acquired information and the acquired data is transmitted to the server.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: February 21, 2017
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventor: Yu-Chun Chen
  • Patent number: 9565628
    Abstract: Apparatus and method are provided for small cell energy saving. In one novel aspect, switch-off-request is broadcasted by the small cell detecting the low-load condition. The small cells upon receiving the switch-off-request message enter the frozen state, which prevents the small cells from switching off. In another novel aspect, the small cell in the low-load condition request measurement reports from the UEs. The UEs replies with the measurement-reports message, which includes the detected neighboring IDs and the UE's traffic load. The low-load small cell includes the information derived from the measurement-reports in the switch-off-request message. In another novel aspect, the small cell broadcasts the switch-on-request message. Upon receiving switch-on-acknowledge messages from switched-off neighboring small cells, the small cell selects one or more target cells to send the cell-activation-request.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: February 7, 2017
    Assignee: MEDIATEK INC.
    Inventors: Yi-Han Chiang, Yu-Chun Chen, Kun-Lin Ho, Po-Han Huang, Po-Han Chiang, Chen-Yi Chang, Wan-Jiun Liao, Shiang-Jiun Lin
  • Publication number: 20160359186
    Abstract: A method of direct electrochemical oxidation is provided to modify carbon felts of a flow battery. Redox reactions are used for modification. Therein, voltage is directly conducted to the cell stack. The carbon felts of the cell stack are uniformly contacted with electrolytes for processing electrochemical reactions. As a result, modification is done to generate oxygen-containing functional groups (—COOH, —OH) on surfaces of the carbon felts. Thus, the present invention has the following advantages: Operation and procedure are easy and quick. Experimental parameters and conditions can be easily regulated and replaced without dismantling a device used for modification. The device used can withstand a wide range of voltage and current. Modification effect can be obtained with low cost yet without high-temperature treatments.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 8, 2016
    Inventors: Ning-Yih Hsu, Yi-Sin Chou, Heng-Wei Chiang, Yuan-Ming Chang, Kuan-Hsiang Chen, Yu-Chun Chen, Hwa-Jou Wei
  • Publication number: 20160351558
    Abstract: A fin type ESD protection device includes at least one first fin, at least one second fin, and at least one gate structure. The first fin is disposed on a semiconductor substrate, and a source contact contacts the first fin. The second fin is disposed on the semiconductor substrate, and a drain contact contacts the second fin. The first fin and the second fin extend in a first direction respectively, and the first fin is separated from the second fin. The gate structure is disposed between the source contact and the drain contact. The first fin is separated from the drain contact, and the second fin is separated from the source contact.
    Type: Application
    Filed: May 3, 2016
    Publication date: December 1, 2016
    Inventors: Yu-Chun Chen, Ping-Chen Chang, Tien-Hao Tang, Kuan-Cheng Su
  • Patent number: 9466598
    Abstract: A semiconductor structure suitable for ESD protection application is provided. The semiconductor structure includes a first well, a second well, a third well, a first fin, a second fin, an anode, a cathode and a first doping region. The first well and the second well are disposed in the third well. The first fin is disposed on the first well. The second fin is disposed on the second well. The anode is disposed on the first fin. The cathode is disposed on the second fin. The first doping region is disposed under the first fin, and separates the first fin from the first well. The first well, the second well, the first fin and the second fin have a first doping type. The third well and the first doping region have a second doping type.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: October 11, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Cheng Liao, Yu-Chun Chen, Ping-Chen Chang, Tien-Hao Tang
  • Patent number: 9457000
    Abstract: Ophthalmic irrigating solutions are disclosed. The ophthalmic irrigating solution comprises: a) ?-polyglutamic acid (?-PGA) and/or salt thereof in an amount effective to increase the viscosity of the irrigating solution, and b) an ophthalmically acceptable aqueous vehicle for the ?-PGA and/or salt thereof. Also disclosed is a method of irrigating ocular tissues of a patient, in which the method comprises introducing to the ocular tissues of the patient an ophthalmic irrigating solution comprising ?-PGA) and/or salt thereof in an amount sufficient to irrigate the ocular tissues of the patient.
    Type: Grant
    Filed: June 16, 2013
    Date of Patent: October 4, 2016
    Assignee: NATIONAL HEALTH RESEARCH INSTITUTES
    Inventors: Yu-Chun Chen, Wen-Yu Su, Yen-Hsien Lee, Ko-Hua Chen, Feng-Huei Lin
  • Publication number: 20160268137
    Abstract: A method of fabricating an electrostatic discharge protection structure includes the following steps. Firstly, a semiconductor substrate is provided. Plural isolation structures, a well region, a first conductive region and a second conductive region are formed in the semiconductor substrate. The well region contains first type conducting carriers. The first conductive region and the second conductive region contain second type conducting carriers. Then, a mask layer is formed on the surface of the semiconductor substrate, wherein a part of the first conductive region is exposed. Then, a first implantation process is performed to implant the second type conducting carriers into the well region by using the mask layer as an implantation mask, so that a portion of the first type conducting carriers of the well region is electrically neutralized and a first doped region is formed under the exposed part of the first conductive region.
    Type: Application
    Filed: May 20, 2016
    Publication date: September 15, 2016
    Inventors: CHANG-TZU WANG, YU-CHUN CHEN, TIEN-HAO TANG
  • Patent number: 9441952
    Abstract: A method including measuring a first distance to a surface of an integrated circuit substrate or a portion of an integrated circuit package by measuring an angle to it from two known points; introducing a material onto the surface; measuring a second distance to a surface of the film from the two known points; and determining a thickness of the introduced material by subtracting the second distance from the first distance.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: September 13, 2016
    Assignee: Intel Corporation
    Inventors: Nilanjan Ghosh, Zhiyong Wang, Yu-Chun Chen, Shuhong Liu