Patents by Inventor Yu-Hsien Lin

Yu-Hsien Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220148920
    Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.
    Type: Application
    Filed: January 21, 2022
    Publication date: May 12, 2022
    Inventors: Chun-Hsien Huang, Hong-Mao Lee, Hsien-Lung Yang, Yu-Kai Chen, Wei-Jung Lin
  • Patent number: 11297734
    Abstract: A heat dissipation module for optical transceiver is provided. The heat dissipation module for optical transceiver includes a liquid cooling device, a casing assembly and an elastic fastener. The liquid cooling device includes a liquid cooling tube and a base, and the liquid cooling tube is in connection with the base. The casing assembly includes a top plate. The top plate includes a top surface, a bottom surface and an opening. The opening is through the top surface and the bottom surface. At least one part of the liquid cooling device is extended into the opening and protruded over the bottom surface. The elastic fastener is configured for fastening the liquid cooling device on the casing assembly, and the liquid cooling device is pluggably fastened to the casing assembly.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 5, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hsien Lin
  • Publication number: 20210381421
    Abstract: A fluid connector assembly includes a housing, an elastic member and a floating component. The housing has an opening. The elastic member is disposed in the opening of the housing. The floating component is movably supported by the elastic member and includes a fluid passage and a first guiding structure. The fluid passage is configured to be connected to a fluid device. The first guiding structure is configured to engage with a second guiding structure of the fluid device.
    Type: Application
    Filed: May 3, 2021
    Publication date: December 9, 2021
    Inventors: Yu-Jei HUANG, Yu-Hsien LIN
  • Publication number: 20210280695
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
    Type: Application
    Filed: May 20, 2021
    Publication date: September 9, 2021
    Inventors: Ryan Chia-Jen Chen, Li-Wei Yin, Tzu-Wen Pan, Cheng-Chung Chang, Shao-Hua Hsu, Yi-Chun Chen, Yu-Hsien Lin, Ming-Ching Chang
  • Patent number: 11114549
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: September 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ryan Chia-Jen Chen, Ming-Ching Chang, Yi-Chun Chen, Yu-Hsien Lin, Li-Wei Yin, Tzu-Wen Pan, Cheng-Chung Chang, Shao-Hua Hsu
  • Publication number: 20210007243
    Abstract: A heat dissipation module for optical transceiver is provided. The heat dissipation module for optical transceiver includes a liquid cooling device, a casing assembly and an elastic fastener. The liquid cooling device includes a liquid cooling tube and a base, and the liquid cooling tube is in connection with the base. The casing assembly includes a top plate. The top plate includes a top surface, a bottom surface and an opening. The opening is through the top surface and the bottom surface. At least one part of the liquid cooling device is extended into the opening and protruded over the bottom surface. The elastic fastener is configured for fastening the liquid cooling device on the casing assembly, and the liquid cooling device is pluggably fastened to the casing assembly.
    Type: Application
    Filed: June 30, 2020
    Publication date: January 7, 2021
    Inventor: Yu-Hsien Lin
  • Publication number: 20200388497
    Abstract: First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 10, 2020
    Inventors: Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Po-Chun Liu, Stan Chen
  • Patent number: 10755936
    Abstract: First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: August 25, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Po-Chun Liu, Stan Chen
  • Patent number: 10522413
    Abstract: Methods are disclosed herein for fabricating semiconductor devices having shared source/drain contacts. An exemplary semiconductor device includes a high-k/metal gate stack disposed over a substrate. The high-k/metal gate stack is disposed between a first source/drain feature and a second source/drain feature. A first spacer set is disposed along sidewalls of the high-k/metal gate stack. A first interlevel dielectric (ILD) layer is disposed over the substrate. Upper portions of the first spacer set that extend above the first ILD layer have a tapered width. A second spacer set is disposed on the upper portions of the first spacer set and over the first ILD layer. A second ILD layer is disposed over the first ILD layer. A contact feature extends through the second ILD layer to the first source/drain feature and the second source/drain feature. The contact feature spans uninterrupted between the first source/drain feature and the second source/drain feature.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: December 31, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Jhih Kuo, Yu-Hsien Lin, Hung-Chang Hsieh, Jhun Hua Chen
  • Patent number: 10398493
    Abstract: A heating system includes a power supply module, a regulatory module, electrically connected to the power supply module, for modulating the power supply module, and a heating module. The heating module includes a positioning device and a conductive device. The heating module is electrically connected to the power supply module and the regulatory module, and the conductive device is tightly wound around the positioning device.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: September 3, 2019
    Assignee: National Cheng Kung University
    Inventors: Sheng-Jye Hwang, Huy-Tien Bui, Yu-Hsien Lin, Yi-San Chang, Huei-Huang Lee, Durn-Yuan Huang, Xi-Zhang Lin
  • Publication number: 20190252193
    Abstract: First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.
    Type: Application
    Filed: April 26, 2019
    Publication date: August 15, 2019
    Inventors: Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Po-Chun Liu, Stan Chen
  • Patent number: 10354510
    Abstract: A detection system for detecting a moving object crossing a border includes a sense device and a positioning device. The sense device is disposed on a moving object and has a first position module. The first position module generates a first position signal based on the sense device. The positioning device is signally connected with the sense device and has a calculating module, a second position module, a detecting module, and a warning module. The positioning device receives the first position signal. The calculating module sets a border. The second position module generates a second position signal based on the positioning device. The detecting module determines if the sense device is out of the border based on the first position signal and the second position signal. The warning module sends out a warning signal.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: July 16, 2019
    Assignee: Harbinger Technology Corporation
    Inventors: Yuan-Tung Hung, Der-Hsin Chou, Kou-Sou Huang, Yu-Hsien Lin
  • Patent number: 10325912
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: June 18, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ryan Chia-Jen Chen, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang
  • Publication number: 20190165137
    Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.
    Type: Application
    Filed: March 1, 2018
    Publication date: May 30, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ryan Chia-Jen CHEN, Ming-Ching CHANG, Yi-Chun CHEN, Yu-Hsien LIN, Li-Wei YIN, Tzu-Wen PAN, Cheng-Chung CHANG, Shao-Hua HSU
  • Publication number: 20190130721
    Abstract: A detection system for detecting a moving object crossing a border includes a sense device and a positioning device. The sense device is disposed on a moving object and has a first position module. The first position module generates a first position signal based on the sense device. The positioning device is signally connected with the sense device and has a calculating module, a second position module, a detecting module, and a warning module. The positioning device receives the first position signal. The calculating module sets a border. The second position module generates a second position signal based on the positioning device. The detecting module determines if the sense device is out of the border based on the first position signal and the second position signal. The warning module sends out a warning signal.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventors: Yuan-Tung HUNG, Der-Hsin CHOU, Kou-Sou HUANG, Yu-Hsien LIN
  • Publication number: 20190131297
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: RYAN CHIA-JEN CHEN, LI-WEI YIN, TZU-WEN PAN, YI-CHUN CHEN, CHENG-CHUNG CHANG, SHAO-HUA HSU, YU-HSIEN LIN, MING-CHING CHANG
  • Publication number: 20190131298
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: November 30, 2018
    Publication date: May 2, 2019
    Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
  • Patent number: 10276392
    Abstract: First, second, and third trenches are formed in a layer over a substrate. The third trench is substantially wider than the first and second trenches. The first, second, and third trenches are partially filled with a first conductive material. A first anti-reflective material is coated over the first, second, and third trenches. The first anti-reflective material has a first surface topography variation. A first etch-back process is performed to partially remove the first anti-reflective material. Thereafter, a second anti-reflective material is coated over the first anti-reflective material. The second anti-reflective material has a second surface topography variation that is smaller than the first surface topography variation. A second etch-back process is performed to at least partially remove the second anti-reflective material in the first and second trenches. Thereafter, the first conductive material is partially removed in the first and second trenches.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Po-Chun Liu, Stan Chen
  • Publication number: 20190123198
    Abstract: An integrated circuit device includes a gate stack disposed over a substrate. A first L-shaped spacer is disposed along a first sidewall of the gate stack and a second L-shaped spacer is disposed along a second sidewall of the gate stack. The first L-shaped spacer and the second L-shaped spacer include silicon and carbon. A first source/drain epitaxy region and a second source/drain epitaxy region are disposed over the substrate. The gate stack is disposed between the first source/drain epitaxy region and the second source/drain epitaxy region. An interlevel dielectric (ILD) layer disposed over the substrate. The ILD layer is disposed between the first source/drain epitaxy region and a portion of the first L-shaped spacer disposed along the first sidewall of the gate stack and between the second source/drain epitaxy region and a portion of the second L-shaped spacer disposed along the second sidewall of the gate stack.
    Type: Application
    Filed: December 20, 2018
    Publication date: April 25, 2019
    Inventors: Te-Jen Pan, Yu-Hsien Lin, Hsiang-Ku Shen, Wei-Han Fan, Yun Jing Lin, Yimin Huang, Tzu-Chung Wang
  • Publication number: 20190115262
    Abstract: Methods are disclosed herein for fabricating semiconductor devices having shared source/drain contacts. An exemplary semiconductor device includes a high-k/metal gate stack disposed over a substrate. The high-k/metal gate stack is disposed between a first source/drain feature and a second source/drain feature. A first spacer set is disposed along sidewalls of the high-k/metal gate stack. A first interlevel dielectric (ILD) layer is disposed over the substrate. Upper portions of the first spacer set that extend above the first ILD layer have a tapered width. A second spacer set is disposed on the upper portions of the first spacer set and over the first ILD layer. A second ILD layer is disposed over the first ILD layer. A contact feature extends through the second ILD layer to the first source/drain feature and the second source/drain feature. The contact feature spans uninterrupted between the first source/drain feature and the second source/drain feature.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 18, 2019
    Inventors: Ming-Jhih Kuo, Yu-Hsien Lin, Hung-Chang Hsieh, Jhun Hua Chen