Patents by Inventor Yu-Hua Chen

Yu-Hua Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11854961
    Abstract: A package substrate includes a substrate, an insulating protective layer and an interposer. The substrate has a first surface and a second surface opposing to the first surface. The substrate includes a plurality of first conductive pads embedded in the first surface. The insulating protective layer is disposed on the first surface of the substrate. The insulating protective layer has an opening for exposing the first conductive pads embedded in the first surface of the substrate. The interposer has a top surface and a bottom surface opposing to the top surface. The interposer includes a plurality of conductive vias and a plurality of second conductive pads located on the bottom surface. The interposer is located in a recess defined by the opening of the insulating protective layer and the first surface of the substrate. Each of the second conductive pads is electrically connected to corresponding first conductive pad.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: December 26, 2023
    Assignees: Industrial Technology Research Institute, Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Wei-Chung Lo, Tao-Chih Chang, Yu-Min Lin, Sheng-Tsai Wu
  • Patent number: 11811145
    Abstract: An antenna module includes an antenna box and a first connection wire. The antenna box can include a first antenna, a second antenna, a first connection terminal, a second connection terminal and a housing. The first and second antennas are located in the housing and the housing has a first opening collectively exposing a portion of the first connection terminal and a portion of the second connection terminal. Each of the first and second antennas is adapted to receive or transmit wireless signals according to one of a plurality of wireless communication standards and the first and second antennas are electrically connected to the first and second connection terminals, respectively. The wireless communication standards can be different from each other.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: November 7, 2023
    Assignee: TAOGLAS GROUP HOLDINGS LIMITED
    Inventors: Tsai-Yi Yang, Yung-Sheng Tseng, Bo-Yuan Chang, Sheng-Shen Chang, Yu-Hua Chen, Shih-Shih Chien, En-Chin Wei
  • Patent number: 11791256
    Abstract: A package substrate includes a substrate, an interposer and an insulating protective layer. The substrate has a first surface and a second surface opposing to the first surface. The first surface includes a plurality of first conductive pads. The interposer is disposed on the first surface of the substrate such that the first conductive pads are partially covered by the interposer. The interposer includes a plurality of penetrating conductive vias electrically connected to the substrate. The insulating protective layer is disposed on the first surface of the substrate and surrounding the interposer. The insulating protective layer includes at least one penetrating conductive column, wherein a first width of the respective penetrating conductive column is greater than a second width of each of the penetrating conductive vias of the interposer.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: October 17, 2023
    Assignees: Industrial Technology Research Institute, Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Wei-Chung Lo, Dyi-Chung Hu, Chang-Hong Hsieh
  • Publication number: 20230123293
    Abstract: An antenna module includes an antenna box and a first connection wire. The antenna box can include a first antenna, a second antenna, a first connection terminal, a second connection terminal and a housing. The first and second antennas are located in the housing and the housing has a first opening collectively exposing a portion of the first connection terminal and a portion of the second connection terminal. Each of the first and second antennas is adapted to receive or transmit wireless signals according to one of a plurality of wireless communication standards and the first and second antennas are electrically connected to the first and second connection terminals, respectively. The wireless communication standards can be different from each other.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 20, 2023
    Inventors: Tsai-Yi Yang, Yung-Sheng Tseng, Bo-Yuan Chang, Sheng-Shen Chang, Yu-Hua Chen, Shih-Shih Chien, En-Chin Wei
  • Patent number: 11532543
    Abstract: A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: December 20, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Yu-Hua Chen
  • Publication number: 20220375919
    Abstract: A method of manufacturing package structure with following steps is disclosed herein. An insulating composite layer is formed on a metal layer of a carrier board. A chip packaging module including a sealant and a first chip embedded therein is disposed on the insulating composite layer, in which the first chip has a plurality of conductive pads. A first circuit layer module including a dielectric layer and a circuit layer is formed on the chip packaging module, in which the circuit layer is on the dielectric layer and electrically connected to the conductive pads through a conductive vias in the dielectric layer. A second chip is disposed on the first circuit layer module. A second circuit layer module is formed on the first circuit layer module and the second chip. A protecting layer is formed on the second circuit layer module.
    Type: Application
    Filed: August 8, 2022
    Publication date: November 24, 2022
    Inventors: Kai-Ming YANG, Chen-Hao LIN, Cheng-Ta KO, John Hon-Shing LAU, Yu-Hua CHEN, Tzyy-Jang TSENG
  • Patent number: 11476592
    Abstract: An antenna module includes an antenna box and a first connection wire. The antenna box can include a first antenna, a second antenna, a first connection terminal, a second connection terminal and a housing. The first and second antennas are located in the housing and the housing has a first opening collectively exposing a portion of the first connection terminal and a portion of the second connection terminal. Each of the first and second antennas is adapted to receive or transmit wireless signals according to one of a plurality of wireless communication standards and the first and second antennas are electrically connected to the first and second connection terminals, respectively. The wireless communication standards can be different from each other.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: October 18, 2022
    Assignee: TAOGLAS GROUP HOLDINGS LIMITED
    Inventors: Tsai-Yi Yang, Yung-Sheng Tseng, Bo-Yuan Chang, Sheng-Shen Chang, Yu-Hua Chen, Shih-Shih Chien, En-Chin Wei
  • Patent number: 11445617
    Abstract: A package structure is disclosed herein. The package structure includes an insulating composite layer, a sealant disposed on the insulating composite layer, a first chip embedded in the sealant and having a plurality of first conductive pads exposed through the sealant, a circuit layer module having a plurality of circuit layers and a plurality of dielectric layers having a plurality of conductive vias, a second chip embedded in the circuit layer module and has a plurality of second conductive pads electrically connected to the circuit layers through the conductive vias, and a protecting layer having a plurality of openings disposed on the circuit layer module, in which the openings expose a portion of the circuit layer module.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: September 13, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Kai-Ming Yang, Chen-Hao Lin, Cheng-Ta Ko, John Hon-Shing Lau, Yu-Hua Chen, Tzyy-Jang Tseng
  • Publication number: 20220287182
    Abstract: An embedded component structure includes a board, an electronic component, and a dielectric material layer. The board has a through cavity. The board includes an insulating core layer and a conductive member. The insulating core layer has a first surface and a second surface opposite thereto. The through cavity penetrates the insulating core layer. The conductive member extends from a portion of the first surface along a portion of the side wall of the through cavity to a portion of the second surface. The electronic component includes an electrode. The electronic component is disposed in the through cavity. The dielectric material layer is at least filled in the through cavity. The connection circuit layer covers and contacts the conductive member and the electrode. A manufacturing method of an embedded component structure is also provided.
    Type: Application
    Filed: May 27, 2022
    Publication date: September 8, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Yu-Hua Chen, Chun-Hsien Chien, Wen-Liang Yeh, Ra-Min Tain
  • Patent number: 11420706
    Abstract: A stem includes a stem body, a column and a locking device. The stem body is provided with a perforation. The column is disposed at one end of the stem body and provided with a first aperture, the perforation is in communication with the first aperture. The locking device is disposed in the perforation and includes a clamping part, two sliding blocks and a first fixing member, the clamping part is located between the sliding blocks, and the first fixing member penetrates the clamping part and the sliding blocks. When the first fixing member moves toward the inside of the perforation, the first fixing member drives the sliding blocks to approach each other and squeeze the clamping part, such that the clamping part moves in a direction toward the first aperture. According to this, the assembly and disassembly procedures of the present invention are quite simple and easy to operate.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: August 23, 2022
    Assignee: Gogoro Inc.
    Inventors: Hsun-Hsueh Lin, Ting-Ping Ku, Yu-Hua Chen, Liang-Yi Hsu
  • Patent number: 11410940
    Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: August 9, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Cheng-Ta Ko, Yu-Hua Chen, Tzyy-Jang Tseng, Ra-Min Tain
  • Patent number: 11366381
    Abstract: A mask structure and a manufacturing method of the mask structure are provided. The mask structure includes a transparent substrate, a patterned metal layer, and a plurality of microlens structures. The patterned metal layer is disposed on the transparent substrate and exposing a portion of the transparent substrate. The microlens structures are disposed on the transparent substrate exposed by a portion of the patterned metal layer and being in contact with the portion of the patterned metal layer.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: June 21, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Shih-Lian Cheng, Yu-Hua Chen, Cheng-Ta Ko, Jui-Jung Chien, Wei-Tse Ho
  • Patent number: 11251350
    Abstract: A light-emitting diode package including a carrier structure, a patterned conductive layer, at least one chip, a dielectric layer, at least one first conductive via, a build-up circuit structure, and at least one light-emitting diode is provided. The patterned conductive layer is disposed on the carrier structure. The chip is disposed on the carrier structure. The dielectric layer is disposed on the carrier structure and encapsulates the chip and the patterned conductive layer. The first conductive via penetrates the dielectric layer and is electrically connected to the patterned conductive layer. The build-up circuit structure is disposed on the dielectric layer and electrically connected to the first conductive via. The light-emitting diode is disposed on the build-up circuit structure.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: February 15, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Yi-Cheng Lin, Yu-Hua Chen, Chun-Hsien Chien, Chien-Chou Chen, Cheng-Hui Wu
  • Publication number: 20210398894
    Abstract: A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.
    Type: Application
    Filed: August 16, 2021
    Publication date: December 23, 2021
    Applicant: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Yu-Hua Chen
  • Patent number: 11139234
    Abstract: A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: October 5, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Wei-Ti Lin, Chun-Hsien Chien, Yu-Hua Chen
  • Publication number: 20210276657
    Abstract: A stem includes a stem body, a column and a locking device. The stem body is provided with a perforation. The column is disposed at one end of the stem body and provided with a first aperture, the perforation is communicated with the first aperture. The locking device is disposed in the perforation and includes a clamping part, two sliding blocks and a first fixing member, the clamping part is located between the sliding blocks, and the first fixing member penetrates the clamping part and the sliding blocks. When the first fixing member moves toward inside of the perforation, the first fixing member drives the sliding blocks to approach each other and squeeze the clamping part, such that the clamping part moves in a direction toward the first aperture. According to this, the assembly and disassembly procedures of the present invention are quite simple and easy to operate.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 9, 2021
    Inventors: Hsun-Hsueh Lin, Ting-Ping Ku, Yu-Hua Chen, Liang-Yi Hsu
  • Publication number: 20210193608
    Abstract: A manufacturing method of a circuit board element including the following steps is provided: placing a circuit substrate on a carrier, wherein the circuit substrate includes an insulating layer and a circuit layer disposed thereon, a protective layer disposed on the circuit layer and having a plurality of openings exposing thereof, and a plurality of solder balls disposed on the protective layer and embedded in the openings; forming a trench penetrating the circuit substrate to expose the carrier; forming a photoresist material layer to cover the circuit substrate and filling the spaces between each of the solder balls and the protective layer and is filling in the trench to cover the carrier; curing a portion of the photoresist material layer filled in the spaces to form a dielectric layer; removing a portion of the photoresist material layer filled in the trench to expose the carrier; and removing the carrier.
    Type: Application
    Filed: March 9, 2021
    Publication date: June 24, 2021
    Applicant: Unimicron Technology Corp.
    Inventors: Yu-Chung Hsieh, Chun-Hsien Chien, Yu-Hua Chen
  • Publication number: 20210159191
    Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
    Type: Application
    Filed: February 8, 2021
    Publication date: May 27, 2021
    Inventors: Pu-Ju LIN, Cheng-Ta KO, Yu-Hua CHEN, Tzyy-Jang TSENG, Ra-Min TAIN