Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a first surface including a plurality of conductive pads and a second surface; an insulating protective layer formed on the first surface of the substrate; an interposer embedded in and exposed from the insulating protective layer; and at least a passive component provided on the first surface of the substrate. The insulating protective layer includes at least an opening for exposing at least one of the conductive pads, and the at least the passive component is directly provided on the conductive pad exposed from the opening.

Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: A method for manufacturing a circuit board structure is provided. First, a first circuit layer is formed on a carrier. Then, a first dielectric layer is formed on the carrier and the first circuit layer. Thereafter, at least one first hole is formed in the first dielectric layer to expose a portion of the first circuit layer. Then, a second dielectric layer is formed on the first dielectric layer and the first circuit layer. Thereafter, at least one trench and at least one second hole are formed in the second dielectric layer, in which the trench exposes a portion of the first dielectric layer, and the second hole exposes the portion of the first circuit layer. The second hole is disposed in the first hole. Then, a metal layer is formed to fill the trench and the second hole.

Abstract: A method for manufacturing a circuit board structure is provided. First, a first circuit layer is formed on a carrier. Then, a first dielectric layer is formed on the carrier and the first circuit layer. Thereafter, at least one first hole is formed in the first dielectric layer to expose a portion of the first circuit layer. Then, a second dielectric layer is formed on the first dielectric layer and the first circuit layer. Thereafter, at least one trench and at least one second hole are formed in the second dielectric layer, in which the trench exposes a portion of the first dielectric layer, and the second hole exposes the portion of the first circuit layer. The second hole is disposed in the first hole. Then, a metal layer is formed to fill the trench and the second hole.

Abstract: A chip package structure including a molding compound, a carrier board, a chip, a plurality of conductive pillars and a circuit board is provided. The carrier board includes a substrate and a redistribution layer. The substrate has a first surface and a second surface. The redistribution layer is disposed on the first surface. The chip and the conductive pillars are disposed on the redistribution layer. The molding compound covers the chip, the conductive pillars, and the redistribution layer. The circuit board is connected with the carrier board, wherein the circuit board is disposed on the molding compound, such that the chip is located between the substrate and the circuit board, and the chip and the redistribution layer are electrically connected with the circuit board through the conductive pillars. Heat generated by the chip is transmitted through the substrate from the first surface to the second surface to dissipate.

Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate may include an interposer having at least one conductive through via, a photo-sensitive dielectric layer formed on one side of the interposer, and at least one conductive via formed in the photo-sensitive dielectric layer and electrically connected to the conductive through via. By means of a photo lithography process with high alignment accuracy, at least one via with an extremely small diameter can be formed on the photo-sensitive dielectric layer and align with the conductive through via. Therefore, the conductive through via can have its diameter reduced as required, without considering the alignment with the at least one via. Accordingly, the interconnection density of the conductive through via on the interposer is increased.

Abstract: An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a substrate, a conductive through via, a dielectric layer, and a conductive layer. The substrate has a first surface and a second surface opposite to each other. The conductive through via is disposed in the substrate and extended from the first surface beyond the second surface. The dielectric layer is disposed on the substrate, wherein the dielectric layer has an opening exposing a portion of the conductive through via. The top surface of the conductive through via protrudes from the bottom surface of the opening. The conductive layer is disposed in the opening and connected to the conductive through via.

Abstract: A polymer and a pharmaceutical composition employing the same are disclosed. The polymer includes a first repeating unit, a second repeating unit, and a third repeating unit. In particular, the first repeating unit is the second repeating unit is wherein R1 is C1-6 alkyl group; and the third repeating unit is wherein X is and Y is a hydrophilic polymeric moiety.

Abstract: A method for manufacturing an interposer includes the following steps. Conductive beads is filled in a blind via of a substrate and a solder layer of each conductive bead is melted so as to form a solder post in the blind via. A metal ball of each conductive bead is inlaid in the corresponding solder post such that the solder post and the metal balls inlaid therein construct a conductive though via. Two surfaces of the substrate are planarized such that two ends of the conductive through via are exposed to the two surfaces of the substrate respectively and are flush with the two surfaces of the substrate respectively. A redistribution layer is manufactured at each surface of the substrate such that the two ends of each conductive through via connect the redistribution layers respectively. Besides, an interposer and a chip package structure applied the interposer are also provided.

Abstract: A circulation member positioning structure for a ball screw includes a nut and a circulation member. The nut has a threaded channel, a socket, and a positioning notch. The socket is provided on a wall of the threaded channel and the positioning notch is provided on a wall of socket. The circulation member has a circulation portion, a circulation track a positioning protrusion. The circulation portion is provided in the socket of the nut. The circulation track is distributed over one lateral of the circulation portion and connects with the threaded channel of the nut. The positioning protrusion is provided on an opposite lateral of the circulation portion for being engaged with the positioning notch of the nut. Thereby, the circulation member positioning structure helps to simplify the assembling work of the circulation member and to remain the nut small. despite the insertion of the circulation member.

Abstract: A method for manufacturing an interposer includes the following steps. Conductive beads is filled in a blind via of a substrate and a solder layer of each conductive bead is melted so as to form a solder post in the blind via. A metal ball of each conductive bead is inlaid in the corresponding solder post such that the solder post and the metal balls inlaid therein construct a conductive though via. Two surfaces of the substrate are planarized such that two ends of the conductive through via are exposed to the two surfaces of the substrate respectively and are flush with the two surfaces of the substrate respectively. A redistribution layer is manufactured at each surface of the substrate such that the two ends of each conductive through via connect the redistribution layers respectively. Besides, an interposer and a chip package structure applied the interposer are also provided.

Abstract: A polymer composition including a polymer having a hydroxyl group and a histidine or a histidine derivative grafted to the polymer having a hydroxyl group. A polymer material is also provided, including a polymer composition which includes a polymer having a hydroxyl group, and a histidine or a histidine derivative grafted to the polymer having a hydroxyl group.

Abstract: A bowed stringed instrument bowing exercise apparatus includes a base having at least one connecting portion, a cross bar having a first end and a second end opposite to each other and at least one connecting portion between the first and second ends, and the cross bar being installed at the connecting portion through the first end, and a track rod having an end portion provided for fixing or slidably connecting the connecting portion. When the track rod is operated, an operator experience and learn how to play the bowing motion steadily by hand to train the operator's coordination and control on how to bow strings to produce different tones.

Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: A bowed stringed instrument bowing exercise apparatus includes a base having at least one connecting portion, a cross bar having a first end and a second end opposite to each other and at least one connecting portion between the first and second ends, and the cross bar being installed at the connecting portion through the first end, and a track rod having an end portion provided for fixing or slidably connecting the connecting portion. When the track rod is operated, an operator experience and learn how to play the bowing motion steadily by hand to train the operator's coordination and control on how to bow strings to produce different tones.

Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: The present disclosure provides a brush polymer, including: a linear polymer main chain; and brush structural side chains, including: a hydrophobic molecular branch, and a hydrophilic molecular branch and/or an anti-biofilm/or an anti-microbial molecular branch, wherein the linear polymer main chain is conjugated to the side chains by covalent bonds formed between a hydroxyl group and a reactive functional group, wherein the reactive functional group includes: isocyanate, carboxyl, or epoxy. The present disclosure also provides a medical application of the brush polymer.

Abstract: A plane light source including a circuit substrate, a plurality of sets of side-view light-emitting devices (LEDs), and a diffusive light-guiding layer is provided. The side-view LEDs are arranged in array over the circuit substrate and are electrically connected with the circuit substrate. The diffusive light-guiding layer covers the side-view LEDs, wherein the diffusive light-guiding layer includes a plurality of diffusive light-guiding units arranged in array and connected to each other. Each of the diffusive light-guiding units is respectively corresponded to illumination coverage of one set of side-view LEDs. Each set of side-view LEDs at least includes two side-view LEDs for emitting light respectively along two different directions and towards into one single diffusive light-guiding units.

Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.