Patents by Inventor Yu-Hua Chen

Yu-Hua Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9485874
    Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate may include an interposer having at least one conductive through via, a photo-sensitive dielectric layer formed on one side of the interposer, and at least one conductive via formed in the photo-sensitive dielectric layer and electrically connected to the conductive through via. By means of a photo lithography process with high alignment accuracy, at least one via with an extremely small diameter can be formed on the photo-sensitive dielectric layer and align with the conductive through via. Therefore, the conductive through via can have its diameter reduced as required, without considering the alignment with the at least one via. Accordingly, the interconnection density of the conductive through via on the interposer is increased.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: November 1, 2016
    Assignees: Industrial Technology Research Institute, Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Wei-Chung Lo, Dyi-Chung Hu, Chang-Hong Hsieh
  • Publication number: 20160268206
    Abstract: An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a substrate, a conductive through via, a dielectric layer, and a conductive layer. The substrate has a first surface and a second surface opposite to each other. The conductive through via is disposed in the substrate and extended from the first surface beyond the second surface. The dielectric layer is disposed on the substrate, wherein the dielectric layer has an opening exposing a portion of the conductive through via. The top surface of the conductive through via protrudes from the bottom surface of the opening. The conductive layer is disposed in the opening and connected to the conductive through via.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 15, 2016
    Inventors: Dyi-Chung Hu, Yin-Po Hung, Ra-Min Tain, Yu-Hua Chen
  • Publication number: 20160190050
    Abstract: A method for manufacturing an interposer includes the following steps. Conductive beads is filled in a blind via of a substrate and a solder layer of each conductive bead is melted so as to form a solder post in the blind via. A metal ball of each conductive bead is inlaid in the corresponding solder post such that the solder post and the metal balls inlaid therein construct a conductive though via. Two surfaces of the substrate are planarized such that two ends of the conductive through via are exposed to the two surfaces of the substrate respectively and are flush with the two surfaces of the substrate respectively. A redistribution layer is manufactured at each surface of the substrate such that the two ends of each conductive through via connect the redistribution layers respectively. Besides, an interposer and a chip package structure applied the interposer are also provided.
    Type: Application
    Filed: December 28, 2014
    Publication date: June 30, 2016
    Inventors: Ra-Min Tain, Dyi-Chung Hu, Yu-Hua Chen
  • Publication number: 20160184437
    Abstract: A polymer and a pharmaceutical composition employing the same are disclosed. The polymer includes a first repeating unit, a second repeating unit, and a third repeating unit. In particular, the first repeating unit is the second repeating unit is wherein R1 is C1-6 alkyl group; and the third repeating unit is wherein X is and Y is a hydrophilic polymeric moiety.
    Type: Application
    Filed: December 24, 2015
    Publication date: June 30, 2016
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jui-Hsiang Chen, Yu-Hua Chen, Chia-Chen Tsai, Tse-Min Teng, Ting-Yu Shih, Chia-Chun Wang, Chia-wei Hong, Jennline Sheu, Hui-Ling Cheng, Shu-Feng Chen, Hung-Jui Huang, Shu-Ling Wang
  • Publication number: 20160186845
    Abstract: A circulation member positioning structure for a ball screw includes a nut and a circulation member. The nut has a threaded channel, a socket, and a positioning notch. The socket is provided on a wall of the threaded channel and the positioning notch is provided on a wall of socket. The circulation member has a circulation portion, a circulation track a positioning protrusion. The circulation portion is provided in the socket of the nut. The circulation track is distributed over one lateral of the circulation portion and connects with the threaded channel of the nut. The positioning protrusion is provided on an opposite lateral of the circulation portion for being engaged with the positioning notch of the nut. Thereby, the circulation member positioning structure helps to simplify the assembling work of the circulation member and to remain the nut small. despite the insertion of the circulation member.
    Type: Application
    Filed: November 4, 2015
    Publication date: June 30, 2016
    Inventors: Ming-Yao LIN, Yu-Hua CHEN, Hui-Chen CHEN, Tsung-Hsien TSAI
  • Patent number: 9368442
    Abstract: A method for manufacturing an interposer includes the following steps. Conductive beads is filled in a blind via of a substrate and a solder layer of each conductive bead is melted so as to form a solder post in the blind via. A metal ball of each conductive bead is inlaid in the corresponding solder post such that the solder post and the metal balls inlaid therein construct a conductive though via. Two surfaces of the substrate are planarized such that two ends of the conductive through via are exposed to the two surfaces of the substrate respectively and are flush with the two surfaces of the substrate respectively. A redistribution layer is manufactured at each surface of the substrate such that the two ends of each conductive through via connect the redistribution layers respectively. Besides, an interposer and a chip package structure applied the interposer are also provided.
    Type: Grant
    Filed: December 28, 2014
    Date of Patent: June 14, 2016
    Assignee: Unimicron Technology Corp.
    Inventors: Ra-Min Tain, Dyi-Chung Hu, Yu-Hua Chen
  • Publication number: 20160113905
    Abstract: A polymer composition including a polymer having a hydroxyl group and a histidine or a histidine derivative grafted to the polymer having a hydroxyl group. A polymer material is also provided, including a polymer composition which includes a polymer having a hydroxyl group, and a histidine or a histidine derivative grafted to the polymer having a hydroxyl group.
    Type: Application
    Filed: December 22, 2015
    Publication date: April 28, 2016
    Inventors: Ting-Yu Shih, Tse-Min Teng, Chia-Chun Wang, Yu-Hua Chen, Jui-Hsiang Chen, Mei-Ju Yang, Shu-Fang Chiang, Yen-Chun Chen, Chia-Ni Chang
  • Patent number: 9302151
    Abstract: A bowed stringed instrument bowing exercise apparatus includes a base having at least one connecting portion, a cross bar having a first end and a second end opposite to each other and at least one connecting portion between the first and second ends, and the cross bar being installed at the connecting portion through the first end, and a track rod having an end portion provided for fixing or slidably connecting the connecting portion. When the track rod is operated, an operator experience and learn how to play the bowing motion steadily by hand to train the operator's coordination and control on how to bow strings to produce different tones.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: April 5, 2016
    Inventor: Yu-Hua Chen
  • Publication number: 20150364457
    Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.
    Type: Application
    Filed: June 15, 2015
    Publication date: December 17, 2015
    Applicant: Invensas Corporation
    Inventors: Shou-Lung Chen, Ching-Wen Hsaio, Yu-Hua Chen, Jeng-Dar Ko, Chih-Ming Tzeng, Jyh-Rong Lin, Shan-Pu Yu
  • Publication number: 20150190674
    Abstract: A bowed stringed instrument bowing exercise apparatus includes a base having at least one connecting portion, a cross bar having a first end and a second end opposite to each other and at least one connecting portion between the first and second ends, and the cross bar being installed at the connecting portion through the first end, and a track rod having an end portion provided for fixing or slidably connecting the connecting portion. When the track rod is operated, an operator experience and learn how to play the bowing motion steadily by hand to train the operator's coordination and control on how to bow strings to produce different tones.
    Type: Application
    Filed: November 17, 2014
    Publication date: July 9, 2015
    Inventor: YU-HUA CHEN
  • Patent number: 9059181
    Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: June 16, 2015
    Assignee: Invensas Corporation
    Inventors: Shou-Lung Chen, Ching-Wen Hsaio, Yu-Hua Chen, Jeng-Dar Ko, Chih-Ming Tzeng, Jyh-Rong Lin, Shan-Pu Yu
  • Patent number: 8968765
    Abstract: The present disclosure provides a brush polymer, including: a linear polymer main chain; and brush structural side chains, including: a hydrophobic molecular branch, and a hydrophilic molecular branch and/or an anti-biofilm/or an anti-microbial molecular branch, wherein the linear polymer main chain is conjugated to the side chains by covalent bonds formed between a hydroxyl group and a reactive functional group, wherein the reactive functional group includes: isocyanate, carboxyl, or epoxy. The present disclosure also provides a medical application of the brush polymer.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: March 3, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Jui-Hsiang Chen, Jean-Dean Yang, Yu-Hua Chen, Ting-Yu Shih, Chia-wei Hong, Chao-Chen Tien
  • Patent number: 8915634
    Abstract: A plane light source including a circuit substrate, a plurality of sets of side-view light-emitting devices (LEDs), and a diffusive light-guiding layer is provided. The side-view LEDs are arranged in array over the circuit substrate and are electrically connected with the circuit substrate. The diffusive light-guiding layer covers the side-view LEDs, wherein the diffusive light-guiding layer includes a plurality of diffusive light-guiding units arranged in array and connected to each other. Each of the diffusive light-guiding units is respectively corresponded to illumination coverage of one set of side-view LEDs. Each set of side-view LEDs at least includes two side-view LEDs for emitting light respectively along two different directions and towards into one single diffusive light-guiding units.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: December 23, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Chao-Kai Hsu, Yu-Hua Chen, Wei-Chung Lo
  • Publication number: 20140217587
    Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.
    Type: Application
    Filed: November 18, 2013
    Publication date: August 7, 2014
    Applicant: Invensas Corporation
    Inventors: Shou-Lung Chen, Ching-Wen Hsaio, Yu-Hua Chen, Jeng-Dar Ko, Chih-Ming Tzeng, Jyh-Rong Lin, Shan-Pu Yu
  • Patent number: 8777437
    Abstract: A light-emitting module includes a substrate having a first surface and a second surface, at least one light-emitting device disposed on the first surface of the substrate, and an optical reflection layer disposed on the first surface of the substrate and surrounding the light-emitting device for receiving a portion of light emitted from the light-emitting device and reflecting the portion of light. The substrate can be rigid or flexible.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: July 15, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Zhi-Cheng Hsiao, Chao-Kai Hsu, Yu-Hua Chen
  • Publication number: 20140186415
    Abstract: A polymer composition including a polymer having a hydroxyl group and a histidine or a histidine derivative grafted to the polymer having a hydroxyl group. A polymer material is also provided, including a polymer composition which includes a polymer having a hydroxyl group, and a histidine or a histidine derivative grafted to the polymer having a hydroxyl group.
    Type: Application
    Filed: December 18, 2013
    Publication date: July 3, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Ting-Yu SHIH, Tse-Min TENG, Chia-Chun WANG, Yu-Hua CHEN, Jui-Hsiang CHEN, Mei-Ju YANG, Shu-Fang CHIANG, Yen-Chun CHEN, Chia-Ni CHANG
  • Publication number: 20140117557
    Abstract: A package substrate and a method for forming the package substrate are disclosed. The package substrate includes an interposer having a plurality of conductive through vias and a first insulating layer formed on the sidewalls of the conductive through vias, a second insulating layer formed on one side of the interposer, and a plurality of conductive vias formed in the second insulating layer and electrically connected to the conductive through vias. By increasing the thickness of the first insulating layer, the face diameter of the conductive through vias can be reduced, and the layout density of the conductive through vias in the interposer can thus be increased.
    Type: Application
    Filed: August 13, 2013
    Publication date: May 1, 2014
    Applicants: UNIMICRON TECHNOLOGY CORPORATION, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Hua CHEN, Wei-Chung LO, Dyi-Chung HU, Chang-Hong HSIEH
  • Publication number: 20140102777
    Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate may include an interposer having at least one conductive through via, a photo-sensitive dielectric layer formed on one side of the interposer, and at least one conductive via formed in the photo-sensitive dielectric layer and electrically connected to the conductive through via. By means of a photo lithography process with high alignment accuracy, at least one via with an extremely small diameter can be formed on the photo-sensitive dielectric layer and align with the conductive through via. Therefore, the conductive through via can have its diameter reduced as required, without considering the alignment with the at least one via. Accordingly, the interconnection density of the conductive through via on the interposer is increased.
    Type: Application
    Filed: August 26, 2013
    Publication date: April 17, 2014
    Applicants: Unimicron Technology Corporation, Industrial Technology Research Institute
    Inventors: Yu-Hua CHEN, Wei-Chung LO, Dyi-Chung HU, Chang-Hong HSIEH
  • Publication number: 20140084413
    Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a top surface and a bottom surface opposing the top surface; an insulating protective layer formed on the top surface of the substrate; an interposer embedded in and exposed from the insulating protective layer; and passive components provided on or embedded in the interposer. By integrating the passive components into the package substrate, when a chip is provided on the interposer, the conductive path between the chip and the passive components can be shortened, and the pins of the chip have a stable voltage. Therefore, the overall electrical performance is enhanced.
    Type: Application
    Filed: August 13, 2013
    Publication date: March 27, 2014
    Applicants: UNIMICRON TECHNOLOGY CORPORATION, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Hua CHEN, Wei-Chung LO, Dyi-Chung HU, Chang-Hong HSIEH
  • Patent number: D768945
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: October 11, 2016
    Inventor: Yu-Hua Chen