Patents by Inventor Yu-Hung Lin

Yu-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210296518
    Abstract: Systems and methods of generating electrical power for a portable electronic device from a photovoltaic power system are described herein. In some embodiments, a photovoltaic module comprises an interior surface and an exterior surface. The interior photovoltaic cells may be disposed in photovoltaic stripes on the interior surface and exterior photovoltaic cells may be disposed on the exterior surface. Substantially opaque materials are employed to provide a photovoltaic-powered portable electric device with an improved appearance.
    Type: Application
    Filed: March 17, 2021
    Publication date: September 23, 2021
    Inventors: Mohamed Bouchoucha, John M. Kenkel, Wen-Yu Wu, Yu-Hung Lin
  • Publication number: 20210281037
    Abstract: In an embodiment, a device includes: a first reflective structure including first doped layers of a semiconductive material, alternating ones of the first doped layers being doped with a p-type dopant; a second reflective structure including second doped layers of the semiconductive material, alternating ones of the second doped layers being doped with a n-type dopant; an emitting semiconductor region disposed between the first reflective structure and the second reflective structure; a contact pad on the second reflective structure, a work function of the contact pad being less than a work function of the second reflective structure; a bonding layer on the contact pad, a work function of the bonding layer being greater than the work function of the second reflective structure; and a conductive connector on the bonding layer.
    Type: Application
    Filed: April 26, 2021
    Publication date: September 9, 2021
    Inventors: Chen-Hua Yu, An-Jhih Su, Chia-Nan Yuan, Shih-Guo Shen, Der-Chyang Yeh, Yu-Hung Lin, Ming Shih Yeh
  • Patent number: 11049813
    Abstract: A semiconductor device includes a semiconductor substrate comprising a contact region, a silicide present on the contact region, a dielectric layer present on the semiconductor substrate, the dielectric layer comprising an opening to expose a portion of the contact region, a conductor present in the opening, a barrier layer present between the conductor and the dielectric layer, and a metal layer present between the barrier layer and the dielectric layer, wherein a Si concentration of the silicide is varied along a height of the silicide.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: June 29, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hung Lin, Chi-Wen Liu, Horng-Huei Tseng
  • Patent number: 10992100
    Abstract: In an embodiment, a device includes: a first reflective structure including first doped layers of a semiconductive material, alternating ones of the first doped layers being doped with a p-type dopant; a second reflective structure including second doped layers of the semiconductive material, alternating ones of the second doped layers being doped with a n-type dopant; an emitting semiconductor region disposed between the first reflective structure and the second reflective structure; a contact pad on the second reflective structure, a work function of the contact pad being less than a work function of the second reflective structure; a bonding layer on the contact pad, a work function of the bonding layer being greater than the work function of the second reflective structure; and a conductive connector on the bonding layer.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: April 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, An-Jhih Su, Chia-Nan Yuan, Shih-Guo Shen, Der-Chyang Yeh, Yu-Hung Lin, Ming Shih Yeh
  • Publication number: 20210118807
    Abstract: A semiconductor device includes a semiconductor substrate, a contact region present in the semiconductor substrate, and a silicide present on a textured surface of the contact region. A plurality of sputter ions is present between the silicide and the contact region. Since the surface of the contact region is textured, the contact area provided by the silicide is increased accordingly, thus the resistance of an interconnection structure in the semiconductor device is reduced.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 22, 2021
    Inventors: Yu-Hung Lin, Chi-Wen Liu, Horng-Huei Tseng
  • Patent number: 10985058
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer. The metal oxide layer has an oxygen gradient, such that a percentage of oxygen increases from a top surface of the metal oxide layer to a bottom surface of the metal oxide layer. The metal oxide layer unpins the Fermi level of the interface between the metal plug and the substrate, which is exhibited by a lowered Schottky barrier height (SBH) and increased oxygen vacancy states between the V.B. and the C.B. of the metal oxide layer, which decreases the intrinsic resistivity between the metal plug and the substrate as compared to a semiconductor device that lacks such a metal oxide layer.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: April 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Hung Lin, You-Hua Chou, Sheng-Hsuan Lin, Chih-Wei Chang
  • Patent number: 10957640
    Abstract: A semiconductor structure includes a conductive structure, a dielectric layer, and a plurality of conductive features. The dielectric layer is present on the conductive structure. The dielectric layer has a plurality of through holes therein, and at least one of the through holes exposes the conductive structure. The conductive features are respectively present in the through holes. At least one of the conductive features has a bottom surface and at least one sidewall. The bottom surface and the sidewall of the conductive feature intersect to form an interior angle. The interior angles of adjacent two of the conductive features have a difference less than or substantially equal to about 3 degrees.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: March 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yu-Hung Lin, Chun-Hsien Huang, I-Tseng Chen
  • Publication number: 20210075386
    Abstract: An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.
    Type: Application
    Filed: July 6, 2020
    Publication date: March 11, 2021
    Inventors: Yu-Hung Lin, Kuan-Ta Chen
  • Publication number: 20210050254
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.
    Type: Application
    Filed: November 2, 2020
    Publication date: February 18, 2021
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Patent number: 10858200
    Abstract: An object orientation device includes a shaking stand and a slide provided on the shaking stand; the slide includes a sliding groove and a retaining member on the sliding groove. A retaining member is parallel to and extends along a sliding direction, and has a retaining surface parallel to a side wall of the sliding groove. The retaining surface and the side wall form an orientation space which is parallel to the sliding direction. After asymmetric objects are on the slide and shaken by the shaking stand, each object has a first end restricted into the orientation space, and has a seat orientation and moves towards a predetermined direction. Such object orientation device allows objects to be aligned in the slide and have consistent seat orientations; a printing equipment can print on the same position of each object. Additionally, a system and a method of orientation and printing are provided.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: December 8, 2020
    Assignee: RONG CHANG METAL CO., LTD.
    Inventor: Yu-Hung Lin
  • Patent number: 10861791
    Abstract: A semiconductor device includes a semiconductor substrate, a contact region present in the semiconductor substrate, and a silicide present on a textured surface of the contact region. A plurality of sputter ions is present between the silicide and the contact region. Since the surface of the contact region is textured, the contact area provided by the silicide is increased accordingly, thus the resistance of a interconnection structure in the semiconductor device is reduced.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: December 8, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hung Lin, Chi-Wen Liu, Horng-Huei Tseng
  • Patent number: 10840105
    Abstract: A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a gate structure over a substrate and forming a spacer on a sidewall of the gate structure. The method for manufacturing a semiconductor structure further includes forming a hard mask structure on a top surface of the gate structure and on an upper portion of the spacer but not on a bottom portion of the spacer.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: November 17, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Hung Lin, Hon-Lin Huang, Rueijer Lin, Shih-Chi Lin, Sheng-Hsuan Lin
  • Patent number: 10825724
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: November 3, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Hung Lin, Sheng-Hsuan Lin, Chih-Wei Chang, You-Hua Chou
  • Patent number: 10798336
    Abstract: A cable connection element for reducing signal transmission loss includes a front clad, a base and a connection terminal. The connection terminal has a first core-holding portion formed on a front end thereof, a second core-holding portion formed on a rear end thereof, a core-clamping portion formed between the first and second core-holding portions, and a pin formed on a rear end of the second core-holding portion. The second core-holding portion is fixed inside the base. The front clad is connected with the base to enclose the first core-holding portion therein. When a core of a cable penetrates the front clad, the core is held by the core-clamping portion and is electrically connected therewith, such that signals from the core can be transmitted to the pin through the core-clamping portion and the second core-holding portion. Accordingly, signal transmission loss arising from capacitance effect can be improved.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: October 6, 2020
    Assignee: SIGNAL CABLE SYSTEM CO., LTD.
    Inventors: Jui-Huang Chung, Yu-Hung Lin
  • Publication number: 20200305467
    Abstract: The invention discloses a method for improving immunity in shrimps, by administering an extract of cocoa rind to a shrimp body to improve immunity of the shrimp body. The extract of cocoa rind is obtained by extracting a dried sample of cocoa rind by an aqueous ethanol solution with a concentration of ethanol being 90-98%. The dried sample of cocoa rind has a water content of 2-5%.
    Type: Application
    Filed: July 10, 2019
    Publication date: October 1, 2020
    Inventors: WEN-TENG CHENG, WAN-LIN TSAI, HSIN-WEI KUO, YU-FEN LIU, CHIN-CHYUAN CHANG, YU-HUNG LIN
  • Patent number: 10756017
    Abstract: Contact structures and methods of forming contacts structures are contemplated by this disclosure. A structure includes a dielectric layer over a substrate, an adhesion layer, a silicide, a barrier layer, and a conductive material. The dielectric layer has an opening to a surface of the substrate. The adhesion layer is along sidewalls of the opening. The silicide is on the surface of the substrate. The barrier layer is on the adhesion layer and the silicide, and the barrier layer directly adjoins the silicide. The conductive material is on the barrier layer in the opening.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Mei-Hui Fu, Sheng-Hsuan Lin
  • Publication number: 20200163577
    Abstract: The present invention provides a circuit applied to a bio-information acquisition system, wherein the circuit includes a terminal, an output circuit, a feedback circuit and a calibration circuit. In the operations of the circuit, the terminal is arranged to receive an input signal, the output circuit is configured to generate an output signal according to the input signal, the feedback circuit is configured to receive the output signal to generate a current signal to the terminal, and the calibration circuit is configured to generate a control signal to control the feedback circuit to determine a level of the current signal according to the output signal.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 28, 2020
    Inventors: Chih-Hsin Chen, Yu-Hung Lin
  • Publication number: 20200013719
    Abstract: A semiconductor device includes a semiconductor substrate comprising a contact region, a silicide present on the contact region, a dielectric layer present on the semiconductor substrate, the dielectric layer comprising an opening to expose a portion of the contact region, a conductor present in the opening, a barrier layer present between the conductor and the dielectric layer, and a metal layer present between the barrier layer and the dielectric layer, wherein a Si concentration of the silicide is varied along a height of the silicide.
    Type: Application
    Filed: September 19, 2019
    Publication date: January 9, 2020
    Inventors: Yu-Hung Lin, Chi-Wen Liu, Horng-Huei Tseng
  • Publication number: 20200014169
    Abstract: In an embodiment, a device includes: a first reflective structure including first doped layers of a semiconductive material, alternating ones of the first doped layers being doped with a p-type dopant; a second reflective structure including second doped layers of the semiconductive material, alternating ones of the second doped layers being doped with a n-type dopant; an emitting semiconductor region disposed between the first reflective structure and the second reflective structure; a contact pad on the second reflective structure, a work function of the contact pad being less than a work function of the second reflective structure; a bonding layer on the contact pad, a work function of the bonding layer being greater than the work function of the second reflective structure; and a conductive connector on the bonding layer.
    Type: Application
    Filed: December 3, 2018
    Publication date: January 9, 2020
    Inventors: Chen-Hua Yu, An-Jhih Su, Chia-Nan Yuan, Shih-Guo Shen, Der-Chyang Yeh, Yu-Hung Lin, Ming Shih Yeh
  • Publication number: 20200006223
    Abstract: A semiconductor structure includes a conductive structure, a dielectric layer, and a plurality of conductive features. The dielectric layer is present on the conductive structure. The dielectric layer has a plurality of through holes therein, and at least one of the through holes exposes the conductive structure. The conductive features are respectively present in the through holes. At least one of the conductive features has a bottom surface and at least one sidewall. The bottom surface and the sidewall of the conductive feature intersect to form an interior angle. The interior angles of adjacent two of the conductive features have a difference less than or substantially equal to about 3 degrees.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 2, 2020
    Inventors: Yu-Hung Lin, Chun-Hsien Huang, I-Tseng Chen