Abstract: Disclosed are a method for adjusting a signal of a display panel, a time controller integrated circuit, a display panel, and a storage medium. The method includes: converting first data into a first data voltage signal using a first data voltage, in response to a set condition being reached, sending the first data voltage signal to a chip on film integrated circuit, the chip on film integrated circuit identifies the first data voltage signal to obtain a second data; acquiring the second data from the chip on film integrated circuit, determining that the chip on film integrated circuit fails to identify the first data in response to the second data being different from the first data; and adjusting the first data voltage until a second data voltage signal converted from the first data using a second data voltage after adjustment being successfully identified by the chip on film integrated circuit.

Abstract: A soft-switching power converter includes a main switch, an energy-releasing switch, and an inductive coupled unit. The main switch is a controllable switch. The energy-releasing switch is coupled to the main switch. The inductive coupled unit is coupled to the main switch and the energy-releasing switch. The inductive coupled unit includes a first inductance, a second inductance coupled to the first inductance, and an auxiliary switch unit. The auxiliary switch unit is coupled to the second inductance to form a closed loop. The main switch and the energy-releasing switch are alternately turned on and turned off. The auxiliary switch unit is controlled to start turning on before the main switch is turned on so as to provide at least one current path.

Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.

Abstract: An apparatus and a method for executing a customized production line using an artificial intelligence development platform, a computing device and a computer readable storage medium are provided. The apparatus includes: a production line executor configured to generate a native form of the artificial intelligence development platform based on a file set, the native form to be sent to a client accessing the artificial intelligence development platform so as to present a native interactive page of the artificial intelligence development platform; and a standardized platform interface configured to provide an interaction channel between the production line executor and the artificial intelligence development platform. The production line executor is further configured to generate an intermediate result by executing processing logic defined in the file set and to process the intermediate result by interacting with the artificial intelligence development platform via the standardized platform interface.

Abstract: The present invention disclosure also relates to a pharmaceutical composition that ccomprises the compound as an active ingredient.

Abstract: Various embodiments of the teachings herein include an image processing system comprising: a video stream processing device configured to receive a video stream, segment the video stream into multiple frames of pictures arranged in chronological order, and distribute the multiple frames of pictures to edge computing devices in a connected edge computing device group; and a picture collecting device configured to receive pictures from the edge computing device group. The individual edge computing devices in the edge computing device group are each configured to subject the received pictures to target identification, and send the pictures marked with a region in which an identified target is located. The picture collecting device is further configured to restore in chronological order as a video stream the received pictures marked with target identification results.

Abstract: A write assist circuit can include a control circuit and a voltage generator. The control circuit can be configured to receive memory address information associated with a memory write operation for memory cells. The voltage generator can be configured to provide a reference voltage to one or more bitlines coupled to the memory cells. The voltage generator can include two capacitive elements, where during the memory write operation, (i) one of the capacitive elements can be configured to couple the reference voltage to a first negative voltage, and (ii) based on the memory address information, both capacitive elements can be configured to cumulatively couple the reference voltage to a second negative voltage that is lower than the first negative voltage.

Abstract: The present invention discloses a brain machine interface decoding method based on spiking neural network, comprising: (1) constructing a liquid state machine model based on a spiking neural network, the liquid state machine model consists of an input layer, an middle layer and an output layer, wherein, a connection weight from the input layer to the middle layer is Whh, a loop connection weight inside the middle layer is Whh, a readout weight from the middle layer to the output layer is Wyh; (2) Inputting a neuron spike train signal, and training each weight with the following strategy: (2-1) Using STDP without supervision to train the connection weight Whh from the input layer to the middle layer; (2-2) Setting the loop connection weight Whh inside the middle layer by means of distance model and random connection, and obtaining a middle layer liquid information R(t); (2-3) Using ridge regression with supervision to train the readout weight Wyh from the middle layer to the output layer, and establishing a ma

Abstract: Disclosed is an express tricycle target object, falling within the field of intelligent connected vehicle (ICV) test equipment. A base plate, vehicle body support plates, two lateral support plates, a vehicle head support plate, several locking mechanisms and skins are included. The vehicle body support plates, the lateral support plates and the vehicle head support plate are assembled into the shape of the express tricycle target object via the locking mechanisms, and different parts of the skins are arranged with wave-absorbing sponges to reduce a radar cross section or with metal substances to enhance a radar cross section, to solve the problem of the insufficient coverage of traffic accident scenes in current tests of the active safety performance of ICVs.

Abstract: The present disclosure provides an extreme ultraviolet (EUV) lithography system including a radiation source and an EUV control system integrated with the radiation source. The EUV control system includes a 3-dimensional diagnostic module (3DDM) designed to collect a laser beam profile of a laser beam from the radiation source in a 3-dimensional (3D) mode, an analysis module designed to analyze the laser beam profile, a database designed to store the laser beam profile, and an EUV control module designed to adjust the radiation source. The analysis module is coupled with the database and the EUV control module. The database is coupled with the 3DDM and the analysis module. The EUV control module is coupled with the analysis module and the radiation source.

Abstract: A package structure includes a first redistribution circuit structure, a second redistribution circuit structure, a semiconductor die, a waveguide structure, and an antenna. The semiconductor die is sandwiched between and electrically coupled to the first redistribution circuit structure and the second redistribution circuit structure. The waveguide structure is located aside and electrically coupled to the semiconductor die, wherein the waveguide structure includes a part of the first redistribution circuit structure, a part of the second redistribution circuit structure and a plurality of first through vias each connecting to the part of the first redistribution circuit structure and the part of the second redistribution circuit structure. The antenna is located on the semiconductor die, wherein the second redistribution circuit structure is sandwiched between the antenna and the semiconductor die, and the antenna is electrically communicated with the semiconductor die through the waveguide structure.

Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

Abstract: A laser fusion welding device includes a 1.9 ?m laser light source, a control unit and a light spot adjusting device. The control unit is configured to control the laser light source and the light spot adjusting device to adjust a laser power density at an object to be subjected to fusion welding. The 1.9 ?m laser light source has output power of 100-500 W. The control unit includes a time control unit, a power control unit and a light spot control unit. The time control unit is configured to control a turn-on time of the laser light source. The power control unit is configured to control the output power of the laser light source. The light spot control unit is configured to control the light spot adjusting device to adjust a size of a light spot at the object to be subjected to fusion welding.

Abstract: Systems and methods for indicating positioning information in wireless communication systems are disclosed. In one aspect, a method includes receiving, by a wireless communication device from a network, network timing error information; and reporting, by the wireless communication device to the network, downlink measurement results and User Equipment (UE) timing error information, wherein, the network timing error information comprises at least one of Transmission and Reception Point (TRP) transmission Timing Error Group (TEG) information and TRP reception TEG information; the UE timing error information comprises at least one of UE transmission TEG information and UE reception TEG information.

Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, a grant is received from a network node. The grant allocates a set of sidelink data resources. One or more sidelink data transmissions are performed on the set of sidelink data resources. A second feedback information associated with the one or more sidelink data transmissions is received and/or detected. An uplink resource is derived. A first feedback information is transmitted on the uplink resource to the network node. The first feedback information is set based upon the second feedback information.

Abstract: Disclosed are compounds of Formula (I), methods of using the compounds for inhibiting ALK2 activity and pharmaceutical compositions comprising such compounds. The compounds are useful in treating, preventing or ameliorating diseases or disorders associated with ALK2 activity such as cancer.

Abstract: A chip packaging structure and a method for fabricating the same are provided. The chip package structure includes a conductive substrate, a dam and a metal shielding layer. The conductive substrate includes a substrate, vias and electrodes. The substrate has first and second board surfaces opposite to each other. The vias penetrate through the first board surface and the second board surface, and a part of the vias is disposed in a first die-bonding region on which a chip is to be arranged. The electrodes extend from the first board surface to the second board surface through the vias. The dam is formed on the first board surface to surround the first die-bonding region, and the dam has a height higher than that of the chip. The metal shielding layer covers the dam and a part of the first board surface that do not overlap with the electrodes.

Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.

Abstract: A semiconductor package and a manufacturing method are provided. The semiconductor package includes a first die disposed on and electrically coupled to a first redistribution structure and laterally covered by a first insulating encapsulation, a second die disposed over the first die and laterally covered by a second insulating encapsulation, a second redistribution structure interposed between and electrically coupled to the first and second dies, a third redistribution structure disposed on the second die and opposite to the second redistribution structure, and at least one thermal-dissipating feature embedded in a dielectric layer of the third redistribution structure and electrically isolated from a patterned conductive layer of the third redistribution structure through the dielectric layer. Through substrate vias of the first die are physically connected to the second redistribution structure or the first redistribution structure.