Patents by Inventor Yu Pan

Yu Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230371043
    Abstract: A system and method for wireless communication are disclosed herein. Example implementations includes a wireless communication device determining one or more counters for a plurality of linked PDCCH (Physic Downlink Control Channel) candidates, wherein the plurality of linked PDCCH candidates are linked. The one or more counters are numbers of linked PDCCH candidates to be monitored, where each counter is an integer or a decimal. The counters may count individual candidates and/or combined candidates. The counters counting the PDCCH candidates may be the same number of different numbers. The wireless communication device may blindly determine downlink information using the counters and the linked PDCCH candidates.
    Type: Application
    Filed: June 13, 2023
    Publication date: November 16, 2023
    Applicant: ZTE CORPORATION
    Inventors: Yu PAN, Chuangxin JIANG, Shujuan ZHANG, Zhaohua LU
  • Publication number: 20230371042
    Abstract: Presented are systems and methods for indicating phase tracking reference signal-demodulation reference signal (PTRS-DMRS) association. A wireless communication device may receive a scheduling grant to trigger a first group of physical uplink shared channel (PUSCH) transmission occasions and a second group of PUSCH transmission occasions from a wireless communication node. The scheduling information carried by the scheduling grant may at least include port association information of PTRS-DMRS. The port association information may comprise a first port association for the first group of PUSCH transmission occasions and a second port association for the second group of PUSCH transmission occasions. The second port association may be at least associated with a portion of the scheduling information which is at least for the first group of PUSCH transmission occasions.
    Type: Application
    Filed: May 19, 2023
    Publication date: November 16, 2023
    Inventors: Meng MEI, Chuangxin JIANG, Zhaohua LU, Yu PAN, Yang ZHANG
  • Publication number: 20230366037
    Abstract: A prediction tool for judging drug sensitivity and long-term prognosis of liver cancer based on gene detection provided. The present application statistically analyzes an aerobic glycolysis pathway gene related to liver cancer prognosis in TCGA data, and adopts LASSO regression analysis to simplify a prognosis-related gene on this basis, so as to establish a prediction tool based on the aerobic glycolysis pathway gene, referred to as an aerobic glycolysis index. The index is validated in a plurality of public databases and clinical samples from a Sir Run Run Shaw Hospital, and it is found that the index can accurately predict sensitivity and long-term prognosis of liver cancer patients to sorafenib therapy. The present application can effectively screen liver cancer patients sensitive to the sorafenib therapy, and provides a new idea for precise and comprehensive treatment of the liver cancer patients.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 16, 2023
    Inventors: Junjie XU, Xiujun CAI, Yu PAN, Xiao LIANG, Shunjie XIA
  • Publication number: 20230369263
    Abstract: A semiconductor package includes a substrate, a redistribution circuit layer, and a protective layer. The redistribution circuit layer is over the substrate and includes a plurality of functional pads electrically connected to the substrate, and a dummy pad pattern electrically disconnected from the plurality of functional pads, wherein the dummy pad pattern includes a plurality of pad portions connected to one another. The protective layer is disposed over the redistribution circuit layer and comprising a plurality of first openings spaced apart from one another and respectively revealing the plurality of pad portions.
    Type: Application
    Filed: May 11, 2022
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kris Lipu Chuang, Hsiu-Jen Lin, Tzu-Sung Huang, Hsin-Yu Pan
  • Publication number: 20230361078
    Abstract: A semiconductor package includes a redistribution structure, at least one semiconductor device, a heat dissipation component, and an encapsulating material. The at least one semiconductor device is disposed on and electrically connected to the redistribution structure. The heat dissipation component is disposed on the redistribution structure and includes a concave portion for receiving the at least one semiconductor device and an extending portion connected to the concave portion and contacting the redistribution structure, wherein the concave portion contacts the at least one semiconductor device. The encapsulating material is disposed over the redistribution structure, wherein the encapsulating material fills the concave portion and encapsulates the at least one semiconductor device.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Chen, Chih-Hua Chen, Hsin-Yu Pan, Hao-Yi Tsai, Lipu Kris Chuang, Tin-Hao Kuo
  • Publication number: 20230347092
    Abstract: A mobile respirator has a respiratory device, a pipe, a breathing component, and a power bank. The pipe has two opposite ends respectively connected to the respiratory device and the breathing component, and the power bank is electrically connected to the respiratory device. A user can place the power bank and the respiratory device inside a backpack, and the pipe can be outstretched from the backpack. Thereby, the user can carry the backpack and wear the breathing component, so the user may breathe with assistance of the mobile respirator. By the power bank supplying electricity for the respiratory device, the mobile respirator is mobile outdoors and solves the trouble of dyspnea while exercising or staying outdoors.
    Type: Application
    Filed: April 17, 2023
    Publication date: November 2, 2023
    Applicant: GrowTrend Biomedical Co., Ltd.
    Inventors: Pei-Yin OU, Ching-Liang YU, Yun-Yueh LIU, Neng Yu PAN
  • Publication number: 20230343764
    Abstract: A package structure including a chip stacking structure, a thermal enhance component and a first insulating encapsulant is provided. The thermal enhance component is stacked over and thermally coupled to the chip stacking structure, wherein a first lateral dimension of the thermal enhance component is greater than a second lateral dimension of the chip stacking structure. The first insulating encapsulant laterally encapsulates the thermal enhance component and the chip stacking structure.
    Type: Application
    Filed: April 25, 2022
    Publication date: October 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lipu Kris Chuang, Hsin-Yu Pan, Tzu-Sung Huang
  • Publication number: 20230338678
    Abstract: A continuous positive airway pressure device has a shell, a diversion sound-absorbing foam pad, a blower, and a partition. The shell has an inlet and an outlet. The diversion sound-absorbing foam pad is disposed inside the shell and forms an airflow passage extending tortuously inside the shell. The blower is disposed on the diversion sound-absorbing foam pad and fluidly communicates with the airflow passage and the outlet of the shell. The partition covers the blower and the diversion sound-absorbing foam pad and has a leading hole fluidly communicating with the airflow passage and the inlet of the shell. After air flows into an interior space of the shell, the air flows through the airflow passage being tortuous and then flows out from the shell, which lengthens flow path of the air, reduces noises generated during the air flowing, and helps the air to flow more fluently.
    Type: Application
    Filed: April 14, 2023
    Publication date: October 26, 2023
    Applicant: GrowTrend Biomedical Co., Ltd.
    Inventors: Chin-Ni LEE, Pei-Yin OU, Neng Yu PAN, Ching-Liang YU
  • Patent number: 11786594
    Abstract: A spiky metal organic framework is provided in the present disclosure. The spiky metal organic framework is formed by a coordination reaction between at least one metal ion and an organic ligand, and includes a body and a plurality of spike-like structures. The body is a spherical shape, and a particle size of the body is 1 ?m to 3 ?m. The spike-like structures are distributed on a surface of the body, a diameter of each spike-like structure is 15 nm to 35 nm, and a length of each spike-like structure is 250 nm to 400 nm.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: October 17, 2023
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Hsing-Wen Sung, Po-Ming Chen, Wen-Yu Pan, Yang-Bao Miao, Po-Kai Luo
  • Publication number: 20230326522
    Abstract: Various embodiments of the present application are directed towards an integrated chip including a first conductive interconnect structure overlying a substrate. A first memory stack is disposed on the first conductive interconnect structure. A second conductive interconnect structure overlies the first memory stack. The second conductive interconnect structure is spaced laterally between opposing sidewalls of the first conductive interconnect structure. A third conductive interconnect structure is disposed on the first conductive interconnect structure. A top surface of the third conductive interconnect structure is vertically above the second conductive interconnect structure.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 12, 2023
    Inventors: Chang-Chih Huang, Jui-Yu Pan, Kuo-Chyuan Tzeng
  • Publication number: 20230307305
    Abstract: A semiconductor package includes a circuit board structure, a first redistribution layer structure and first bonding elements. The circuit board structure includes outermost first conductive patterns and a first mask layer adjacent to the outermost first conductive patterns. The first redistribution layer structure is disposed over the circuit board structure. The first bonding elements are disposed between and electrically connected to the first redistribution layer structure and the outermost first conductive patterns of the circuit board structure. In some embodiments, at least one of the first bonding elements covers a top and a sidewall of the corresponding outermost first conductive pattern.
    Type: Application
    Filed: May 31, 2023
    Publication date: September 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Wei Cheng, Jiun-Yi Wu, Hsin-Yu Pan, Tsung-Ding Wang, Yu-Min Liang, Wei-Yu Chen
  • Publication number: 20230307385
    Abstract: A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yang Yu, Jung-Wei Cheng, Yu-Min Liang, Jiun-Yi Wu, Yen-Fu Su, Chien-Chang Lin, Hsin-Yu Pan
  • Publication number: 20230307404
    Abstract: A package structure includes a die, a first redistribution circuit structure, a first redistribution circuit structure, a second redistribution circuit structure, an enhancement layer, first conductive terminals, and second conductive terminals. The first redistribution circuit structure is disposed on a rear side of the die and electrically coupled to thereto. The second redistribution circuit structure is disposed on an active side of the die and electrically coupled thereto. The enhancement layer is disposed on the first redistribution circuit structure. The first redistribution circuit structure is disposed between the enhancement layer and the die. The first conductive terminals are connected to the first redistribution circuit structure. The first redistribution circuit structure is between the first conductive terminals and the die. The second conductive terminals are connected to the second redistribution circuit structure.
    Type: Application
    Filed: March 28, 2022
    Publication date: September 28, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yu Kuo, Yu-Ching Lo, Wei-Jie Huang, Ching-Pin Yuan, Yi-Che Chiang, Kris Lipu Chuang, Hsin-Yu Pan, Yi-Yang Lei, Ching-Hua Hsieh, Kuei-Wei Huang
  • Patent number: 11769533
    Abstract: A semiconductor chip is provided. The semiconductor chip includes a SRAM cell, a logic cell, a signal line and a ground line. The SRAM cell includes a storage transmission gate, a read transmission gate and a latch circuit. The latch circuit is serially connected between the storage and read transmission gates, and includes a first inverter, a second inverter and a transmission gate connected to an output of the first inverter, an input of the second inverter and an output of the storage transmission gate. The logic cell disposed aside the SRAM cell is connected with the SRAM cell by first and second active structures. The signal and ground lines extend at opposite sides of the SRAM and logic cells, and are substantially parallel with the first and second active structures. The SRAM and logic cells are disposed between and electrically connected to the signal and ground lines.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: September 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hidehiro Fujiwara, Hsien-Yu Pan, Chih-Yu Lin, Yen-Huei Chen, Wei-Chang Zhao
  • Publication number: 20230300284
    Abstract: An image compensation circuit for controlling a luminance of a display panel is configured to: receive a plurality of image data; perform gamma tuning to convert the plurality of image data into a plurality of original gamma codes according to a plurality of first compensation values corresponding to a first operation mode; calculate a plurality of gamma difference values between the plurality of first compensation values and a plurality of second compensation values corresponding to a second operation mode; and calculate a plurality of output gamma codes corresponding to the second operation mode according to the plurality of original gamma codes by using the plurality of gamma difference values.
    Type: Application
    Filed: February 23, 2023
    Publication date: September 21, 2023
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Wei-Jhe Ma, Feng-Ting Pai, Jun-Yu Yang, Hsin-Yu Pan
  • Publication number: 20230301049
    Abstract: A method of forming a memory circuit includes generating a layout design of the memory circuit, and manufacturing the memory circuit based on the layout design. The generating of the layout design includes generating a first active region layout pattern corresponding to fabricating a first active region of a first pull down transistor, generating a second active region layout pattern corresponding to fabricating a second active region of a first pass gate transistor, and generating a first metal contact layout pattern corresponding to fabricating a first metal contact. The first metal contact layout pattern overlaps the cell boundary of the memory circuit and the first active region layout pattern. The first metal contact electrically coupled to a source of the first pull down transistor. The memory circuit being a four transistor (4T) memory cell including a first and second pass gate transistor, and a first and second pull down transistor.
    Type: Application
    Filed: April 20, 2023
    Publication date: September 21, 2023
    Inventors: Hidehiro FUJIWARA, Chih-Yu LIN, Hsien-Yu PAN, Yasutoshi OKUNO, Yen-Huei CHEN, Hung-Jen LIAO
  • Publication number: 20230300660
    Abstract: A wireless communication method includes sending, by a wireless communication node to a wireless communication device, a message requesting the wireless communication device to transmit a measurement report for positioning, wherein the measurement report includes a plurality of measurement instances, each of which is associated with a respective time stamp and includes one or more time-domain occasions.
    Type: Application
    Filed: May 23, 2023
    Publication date: September 21, 2023
    Inventors: Guozeng ZHENG, Chuangxin JIANG, Hao WU, Yu PAN, Bo GAO, Zhaohua LU
  • Publication number: 20230290639
    Abstract: Methods and apparatuses for forming low resistivity tungsten using tungsten nitride barrier layers are provided herein. Methods involve depositing extremely thin tungsten nitride barrier layers prior to depositing tungsten nucleation and bulk tungsten layers. Methods are applicable for fabricating tungsten word lines in 3D NAND fabrication as well as for fabricating tungsten-containing components of DRAM and logic fabrication. Apparatus included processing stations with multiple charge volumes to pressurize gases in close vicinity to a showerhead of a processing chamber for processing semiconductor substrates.
    Type: Application
    Filed: July 29, 2020
    Publication date: September 14, 2023
    Inventors: Lawrence Schloss, Anand Chandrashekar, Juwen Gao, Stephanie Noelle Sandra Sawant-Goubert, Yu Pan
  • Publication number: 20230282626
    Abstract: A high-bandwidth package-on-package (HBPoP) structure includes a first package structure and a second package structure disposed over the first package structure. The first package structure includes a first package substrate, a semiconductor die, an interposer, and a molding material. The first package substrate is formed of a silicon and/or ceramic material. The semiconductor die is disposed over the first package substrate. The interposer is disposed over the semiconductor die and is formed of a silicon and/or ceramic material. The molding material is disposed between the first package substrate and the interposer and surrounds the semiconductor die.
    Type: Application
    Filed: February 2, 2023
    Publication date: September 7, 2023
    Inventors: Tai-Yu CHEN, Bo-Jiun YANG, Tsung-Yu PAN, Yin-Fa CHEN, Ta-Jen YU, Bo-Hao MA, Wen-Sung HSU, Yao-Pang HSU
  • Publication number: 20230279870
    Abstract: A blower includes an upper housing and a lower housing. An air flow space and an air outlet passage are formed inside and communicate with each other. A fan is mounted in the upper housing and the lower housing. A driving shaft of a motor passes through the lower housing and is connected to the fan. The upper housing has a first annular rib with an arc-shaped surface at an edge of the air inlet opening. The upper housing has a second annular rib protruding on an inner bottom surface of the upper housing and adjacent to the air inlet opening. When an external fluid flows in the air inlet opening, the fluid can smoothly pass through the arc-shaped surface of the first annular rib. A part of the fluid is blocked by the second annular rib, and thus forms a vertical downward airflow curtain.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 7, 2023
    Inventors: Chin-Ni LEE, Neng Yu PAN, Ching-Liang YU