Patents by Inventor Yu Ping

Yu Ping has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11417838
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection and a second metal interconnection in the first IMD layer; forming a channel layer on the first metal interconnection and the second metal interconnection; forming a magnetic tunneling junction (MTJ) stack on the channel layer; and removing the MTJ stack to form a MTJ.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: August 16, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Wei Chen, Po-Kai Hsu, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20220246757
    Abstract: A semiconductor device includes a substrate, a dielectric layer, a source region, a drain region, and a metal structure. The substrate has a trench therein, and the dielectric layer is conformally formed over the substrate and the trench. The source region and the least one drain region are in the substrate. The metal structure is filled in the trench and surrounded by the dielectric layer, and the metal structure is disposed between the source region and the drain region. Moreover, the metal structure has a first metal portion and a second metal portion which has a height greater than a height of the first metal portion, and the first metal portion is disposed between the drain region and the second metal portion.
    Type: Application
    Filed: February 4, 2021
    Publication date: August 4, 2022
    Inventors: Yu-Ping CHEN, Jhen-Yu TSAI
  • Publication number: 20220238600
    Abstract: An MRAM structure includes a dielectric layer. A contact hole is disposed in the dielectric layer. A contact plug fills in the contact hole and protrudes out of the dielectric layer. The contact plug includes a lower portion and an upper portion. The lower portion fills in the contact hole. The upper portion is outside of the contact hole. The upper portion has a top side and a bottom side greater than the top side. The top side and the bottom side are parallel. The bottom side is closer to the contact hole than the top side. An MRAM is disposed on the contact hole and contacts the contact plug.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Hui Lee, I-Ming Tseng, Ying-Cheng Liu, Yi-An Shih, Yu-Ping Wang
  • Patent number: 11398557
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first well, a second well, an isolation structure, a first field plate, a gate structure, a drain structure, and a source structure. The first well and the second well adjoin each other. The first well and the second well are disposed in the substrate. The isolation structure is disposed on the first well. The first field plate is disposed on the isolation structure. The gate structure crosses the first well and the second well, and an opening is defined between the first field plate and the gate structure to expose an edge of the isolation structure adjacent to the gate structure. The drain structure is disposed in the first well. The source structure is disposed in the second well.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: July 26, 2022
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yi-Ching Chung, Jui-Chun Chang, Fu-Chun Tseng, Yu-Ping Ho
  • Patent number: 11387408
    Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction stack, wherein the material of top electrode layer is titanium nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: July 12, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Chin-Yang Hsieh, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, Jing-Yin Jhang, I-Ming Tseng, Yu-Ping Wang, Chien-Ting Lin, Kun-Chen Ho, Yi-Syun Chou, Chang-Min Li, Yi-Wei Tseng, Yu-Tsung Lai, Jun Xie
  • Patent number: 11374055
    Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region and a gate pattern extending from the first active region to the second active region, in which the gate pattern includes a H-shape according to a top view. Preferably, the gate pattern includes a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, and a third gate pattern connecting the first gate pattern and the second gate pattern along a second direction.
    Type: Grant
    Filed: February 16, 2020
    Date of Patent: June 28, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ya-Huei Tsai, Rai-Min Huang, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20220199897
    Abstract: A magnetoresistive random access memory, including a substrate, a conductive plug in the substrate, wherein the conductive plug has a notched portion on one side of the upper edge of the conductive plug, and a magnetic memory cell with a bottom electrode electrically connecting with the conductive plug, a magnetic tunnel junction on the bottom electrode and a top electrode on the magnetic tunnel junction, wherein the bottom surface of the magnetic memory cell and the top surface of the conductive plug completely align and overlap each other.
    Type: Application
    Filed: March 11, 2022
    Publication date: June 23, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20220179920
    Abstract: A method for monitoring a hydrostatic bearing that is in operation is provided. Frequency domain analysis, time domain analysis and principal components analysis are performed on an operation signal that results from the operation of the hydrostatic bearing, so as to build a Gaussian mixture model. Then, based on a difference between the Gaussian mixture model and a predetermined reference model, an operation state of the hydrostatic bearing can be determined in real time.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 9, 2022
    Inventors: TZU-CHI CHAN, JIA-HONG YU, YU-PING HONG
  • Patent number: 11355700
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) stack on a substrate; forming a top electrode on the MTJ stack; performing a first patterning process to remove the MTJ stack for forming a first MTJ; forming a first inter-metal dielectric (IMD) layer around the first MTJ; and performing a second patterning process to remove the first MTJ for forming a second MTJ and a third MTJ.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: June 7, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Hung-Yueh Chen, Yu-Ping Wang
  • Patent number: 11356792
    Abstract: A computer converts each content sources from textual content to speech comprising a separate audio selection. The computer applies, to each audio selection, one or more speech attributes to specify the audio attributes that select a respective position of the respective audio selection from among multiple positions within a multidimensional sound space and audibly distinguish one or more characteristics of the respective audio selection from other audio selections, wherein the respective position of the respective audio selection reflects a rank of the respective audio selection as ordered by interest to a user. The computer outputs a simultaneous stream of the multiple audio selections to an audio output device for stereo play of the audio selections within the multiple positions within the multidimensional sound space to the user, with the multiple positions reflecting the content sources ordered by interest.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: June 7, 2022
    Assignee: International Business Machines Corporation
    Inventors: Da Wei Zhang, Ke Chen, Yu Ping Sun, Hou Ping Jia, Xiaoguang Mo
  • Patent number: 11335729
    Abstract: The disclosure provides a semiconductor memory device including a substrate having a memory cell region and an alignment mark region; a dielectric layer covering the memory cell region and the alignment mark region; conductive vias in the dielectric layer within the memory cell region; an alignment mark trench in the dielectric layer within the alignment mark region; and storage structures disposed on the conductive vias, respectively. Each of the storage structures includes a bottom electrode defined from a bottom electrode metal layer, a magnetic tunnel junction (MTJ) structure defined from an MTJ layer, and a top electrode. A residual metal stack is left in the alignment mark trench. The residual metal stack includes a portion of the bottom electrode metal layer and a portion of the MTJ layer.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: May 17, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chia-Chang Hsu, Chen-Yi Weng, Hung-Chan Lin, Jing-Yin Jhang, Yu-Ping Wang
  • Patent number: 11309486
    Abstract: A magnetoresistive random access memory (MRAM) is provided in the present invention, including a conductive plug with a protruding portion extending outwardly on one side and a notched portion concaving inwardly on the other side of the upper edge of conductive plug, and a memory cell with a bottom electrode electrically connecting with the conductive plug, a magnetic tunnel junction (MTJ) on the bottom electrode, and a top electrode on the magnetic tunnel junction, wherein the bottom surface of memory cell completely overlaps the top surface of conductive plug.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: April 19, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20220102621
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a MRAM region of a substrate, forming a first inter-metal dielectric (IMD) layer around the MTJ, forming a patterned mask on a logic region of the substrate, performing a nitridation process to transform part of the first IMD layer to a nitride layer, forming a first metal interconnection on the logic region, forming a stop layer on the first IMD layer, forming a second IMD layer on the stop layer, and forming a second metal intercom in the second IMD layer to connect to the MTJ.
    Type: Application
    Filed: November 1, 2020
    Publication date: March 31, 2022
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Si-Han Tsai, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang, Yu-Ping Wang, Ju-Chun Fan, Ching-Hua Hsu, Yi-Yu Lin, Hung-Yueh Chen
  • Publication number: 20220059662
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first well, a second well, an isolation structure, a first field plate, a gate structure, a drain structure, and a source structure. The first well and the second well adjoin each other. The first well and the second well are disposed in the substrate. The isolation structure is disposed on the first well. The first field plate is disposed on the isolation structure. The gate structure crosses the first well and the second well, and an opening is defined between the first field plate and the gate structure to expose an edge of the isolation structure adjacent to the gate structure. The drain structure is disposed in the first well. The source structure is disposed in the second well.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 24, 2022
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yi-Ching CHUNG, Jui-Chun CHANG, Fu-Chun TSENG, Yu-Ping HO
  • Publication number: 20220059761
    Abstract: A method of fabricating a semiconductor device includes the steps of: providing a semiconductor structure including a memory region and a logic region. The semiconductor structure includes a first interlayer dielectric and at least one magnetoresistive random access memory (MRAM) cell disposed on the first interlayer dielectric, and the MRAM cell is disposed in the memory region; depositing a second interlayer dielectric covering the first interlayer dielectric and the at least one MRAM cell; depositing a mask layer conformally covering the second interlayer dielectric; perform a planarization process to remove the mask layer in the memory region; after the step of performing the planarization process, removing the mask layer in the logic region.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 24, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Hung-Yueh Chen, Chen-Yi Weng, Si-Han Tsai, Jing-Yin Jhang, Yu-Ping Wang
  • Publication number: 20220052110
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a first diffusion region and a second diffusion region extending along a first direction on a substrate, a first contact plug extending along a second direction from the first diffusion region to the second diffusion region on the substrate, a first gate pattern and a second gate pattern extending along the second direction adjacent to one side of the first contact plug, and a third gate pattern and a fourth gate pattern extending along the second direction adjacent to another side of the first contact plug.
    Type: Application
    Filed: September 13, 2020
    Publication date: February 17, 2022
    Inventors: I-Fan Chang, Hung-Yueh Chen, Rai-Min Huang, Jia-Rong Wu, Yu-Ping Wang
  • Patent number: 11251262
    Abstract: A capacitor and a manufacturing method thereof are provided. The capacitor includes a cup-shaped lower electrode, a capacitive dielectric layer, an upper electrode, and a support layer. The support layer includes an upper support layer surrounding an upper portion of the cup-shaped lower electrode, a middle support layer surrounding a middle portion of the cup-shaped lower electrode, and a lower support layer surrounding a lower portion of the cup-shaped lower electrode. Surfaces of the upper support layer, the middle support layer, and the lower support layer are covered by the capacitive dielectric layer.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: February 15, 2022
    Assignee: Winbond Electronics Corp.
    Inventors: Yu-Ping Hsiao, Wei-Chao Chou, Ming-Tang Chen, Cheol Soo Park
  • Patent number: 11224686
    Abstract: A filter material and a manufacturing method thereof are provided. The manufacturing method includes hydrophilizing the filter material by supercritical fluid processing technology, so as to filter out white blood cells in the blood.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: January 18, 2022
    Assignee: Sangtech Lab Inc.
    Inventors: Cheng-Sheng Liang, Po-Ju Lin, Yu-Ping Chen, Chun-Hung Chen, Pei-Chieh Chuang
  • Publication number: 20210407951
    Abstract: A semiconductor package structure includes a semiconductor device with an active surface, a conductive pillar on the conductive pad, an adhesion strengthening layer, and an encapsulant in contact with the adhesion strengthening layer. The conductive pillar has a side surface and a top surface. The adhesion strengthening layer is conformally disposed on the side surface of the conductive pillar and the active surface of the semiconductor device.
    Type: Application
    Filed: September 13, 2021
    Publication date: December 30, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Ping TSAI, Ming-Chi LIU, Yu-Ting LU, Kai-Chiang HSU, Che-Ting LIU
  • Publication number: 20210409891
    Abstract: A computer converts each content sources from textual content to speech comprising a separate audio selection. The computer applies, to each audio selection, one or more speech attributes to specify the audio attributes that select a respective position of the respective audio selection from among multiple positions within a multidimensional sound space and audibly distinguish one or more characteristics of the respective audio selection from other audio selections, wherein the respective position of the respective audio selection reflects a rank of the respective audio selection as ordered by interest to a user. The computer outputs a simultaneous stream of the multiple audio selections to an audio output device for stereo play of the audio selections within the multiple positions within the multidimensional sound space to the user, with the multiple positions reflecting the content sources ordered by interest.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 30, 2021
    Inventors: DA WEI ZHANG, KE CHEN, YU PING SUN, HOU PING JIA, XIAOGUANG MO