Patents by Inventor Yu-Yu Lin

Yu-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11082198
    Abstract: An optoelectronic module may include an optical receiver optically coupled with an optical fiber. The optical receiver may be configured to receive time synchronization signals from the optical fiber. The time synchronization signals may be frequency modulated, wavelength modulated, or amplitude modulated and may be received along with received data signals. A time synchronization signal detection module may be communicatively coupled to the optical receiver. The time synchronization signal detection module may be configured to receive the time synchronization signals that are transmitted through the optical fiber and detect frequency modulations, wavelength modulations, or amplitude modulations to recover the time synchronization signals.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 3, 2021
    Assignee: II-VI DELAWARE, INC.
    Inventors: Puhui Miao, Huade Shu, Leo Yu-yu Lin
  • Publication number: 20210214780
    Abstract: Methods of amplifying and determining a target nucleotide sequence are provided. The method of amplifying the target nucleotide sequence includes the following steps. A first adaptor and a second adaptor are linked to two ends of a double-stranded nucleic acid molecule with a target nucleotide sequence respectively to form a nucleic acid template, in which the first adaptor includes a Y-form adaptor or a hairpin adaptor and the second adaptor is a hairpin adaptor. Then, a PCR amplification cycle is performed on the nucleic acid template to obtain a PCR amplicon of the target nucleotide sequence.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 15, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Pei-Shin Jiang, Jenn-Yeh Fann, Hung-Chi Chien, Yu-Yu Lin, Chih-Lung Lin
  • Patent number: 11062197
    Abstract: A neuromorphic computing system includes a synapse array, a switching circuit, a sensing circuit and a processing circuit. The synapse array includes row lines, column lines and synapses. The processing circuit is coupled to the switching circuit and the sensing circuit and is configured to connect a particular column line in the column lines to the first terminal by using the switching circuit, obtain a first voltage value from the particular column line by using the sensing circuit when the particular line is connected to the first terminal, connect the particular column line to the second terminal by using the switching circuit, obtain a second voltage value from the particular column line by using the sensing circuit when the particular line is connected to the second terminal, and estimate a sum-of-product sensing value according to a voltage difference between the first voltage value and the second voltage value.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: July 13, 2021
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Yu Lin, Feng-Min Lee
  • Publication number: 20210151677
    Abstract: Metal oxide based memory devices and methods for manufacturing are described herein. A method for manufacturing a memory cell includes forming a bottom adhesion layer in a via formed in an insulating layer. Forming a bottom conductive plug in the bottom adhesion layer. Forming a top adhesion layer over the bottom adhesion layer and bottom conductive plug. Forming a top conductive plug in the top adhesion layer. Wherein the thickness of the bottom and top adhesion layers may be different from one another.
    Type: Application
    Filed: January 29, 2021
    Publication date: May 20, 2021
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Yu LIN, Feng-Min LEE
  • Patent number: 10957392
    Abstract: An array of variable resistance cells based on a programmable threshold transistor and a resistor connected in parallel is described, including 3D and split gate variations. An input voltage applied to the transistor, and the programmable threshold of the transistor, can represent variables of sum-of-products operations. Programmable threshold transistors in the variable resistance cells comprise charge trapping memory transistors, such as floating gate transistors or dielectric charge trapping transistors. The resistor in the variable resistance cells can comprise a buried implant resistor connecting the current-carrying terminals (e.g. source and drain) of the programmable threshold transistor. A voltage sensing sense amplifier is configured to sense the voltage generated by the variable resistance cells as a function of an applied current and the resistance of the variable resistance cells.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 23, 2021
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Feng-Min Lee, Yu-Yu Lin
  • Patent number: 10826618
    Abstract: A method of tuning optoelectronic transceivers in an optical network may include powering on a first optoelectronic transceiver, setting a channel wavelength of the first optoelectronic transceiver, transmitting a first request command from the first optoelectronic transceiver through the optical network to a second optoelectronic transceiver, and non-iteratively changing a channel wavelength of the first optoelectronic transceiver until a second request command is received from the second optoelectronic transceiver. The second request command may indicate to the first optoelectronic transceiver that the channel wavelength set by the first optoelectronic transceiver is able to travel through the optical network between the first optoelectronic transceiver and the second optoelectronic transceiver.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: November 3, 2020
    Assignee: II-VI Delaware Inc.
    Inventors: Huade Shu, Jing Li, Leo Yu-yu Lin, Xiaoyan Huang, Puhui Miao, Bin Ma
  • Publication number: 20200244371
    Abstract: A method of tuning optoelectronic transceivers in an optical network may include powering on a first optoelectronic transceiver, setting a channel wavelength of the first optoelectronic transceiver, transmitting a first request command from the first optoelectronic transceiver through the optical network to a second optoelectronic transceiver, and non-iteratively changing a channel wavelength of the first optoelectronic transceiver until a second request command is received from the second optoelectronic transceiver. The second request command may indicate to the first optoelectronic transceiver that the channel wavelength set by the first optoelectronic transceiver is able to travel through the optical network between the first optoelectronic transceiver and the second optoelectronic transceiver.
    Type: Application
    Filed: April 9, 2020
    Publication date: July 30, 2020
    Inventors: Huade Shu, Jing Li, Leo Yu-yu Lin, Xiaoyan Huang, Puhui Miao, Bin Ma
  • Patent number: 10719296
    Abstract: A device for generating sum-of-products data includes an array of variable resistance cells, variable resistance cells in the array each comprising a programmable threshold transistor and a resistor connected in parallel, the array including n columns of cells including strings of series-connected cells and m rows of cells. Control and bias circuitry are coupled to the array, including logic for programming the programmable threshold transistors in the array with thresholds corresponding to values of a weight factor Wmn for the corresponding cell. Input drivers are coupled to corresponding ones of the m rows of cells, the input drivers selectively applying inputs Xm to rows m. Column drivers are configured to apply currents In to corresponding ones of the n columns of cells. Voltage sensing circuits operatively coupled to the columns of cells.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: July 21, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Feng-Min Lee, Yu-Yu Lin
  • Patent number: 10720997
    Abstract: A method of tuning optoelectronic transceivers in an optical network may include powering on an optoelectronic transceiver, setting the channel wavelength of the optoelectronic transceiver, transmitting a request command from the optoelectronic transceiver through the optical network to another optoelectronic transceiver; and waiting to receive a second request command from the another optoelectronic transceiver.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: July 21, 2020
    Assignee: II-VI Delaware Inc.
    Inventors: Huade Shu, Jing Li, Leo Yu-yu Lin, Xiaoyan Huang, Puhui Miao, Bin Ma
  • Publication number: 20200220624
    Abstract: A method of tuning optoelectronic transceivers in an optical network may include powering on an optoelectronic transceiver, setting the channel wavelength of the optoelectronic transceiver, transmitting a request command from the optoelectronic transceiver through the optical network to another optoelectronic transceiver; and waiting to receive a second request command from the another optoelectronic transceiver.
    Type: Application
    Filed: January 30, 2019
    Publication date: July 9, 2020
    Inventors: Huade Shu, Jing Li, Leo Yu-yu Lin, Xiaoyan Huang, Puhui Miao, Bin Ma
  • Publication number: 20200175363
    Abstract: A method for accelerating a convolution of a kernel matrix over an input matrix for computation of an output matrix using in-memory computation involves storing in different sets of cells, in an array of cells, respective combinations of elements of the kernel matrix or of multiple kernel matrices. To perform the convolution, a sequence of input vectors from an input matrix is applied to the array. Each of the input vectors is applied to the different sets of cells in parallel for computation during the same time interval. The outputs from each of the different sets of cells generated in response to each input vector are sensed to produce a set of data representing the contributions of that input vector to multiple elements of an output matrix. The sets of data generated across the input matrix are used to produce the output matrix.
    Type: Application
    Filed: June 24, 2019
    Publication date: June 4, 2020
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Yu LIN, Feng-Min LEE
  • Patent number: 10637603
    Abstract: In an example, a communication module includes an optical transmitter, an optical receiver, and a periodical filter. The optical transmitter is configured to emit an outbound optical signal. The optical receiver is configured to receive an inbound optical signal. A first frequency of the outbound optical signal is offset from a second frequency of the inbound optical signal by an amount less than a channel spacing of a multiplexer/demultiplexer implemented in an optical communication system that includes the communication module. The periodical filter is positioned in optical paths of both the outbound optical signal and the inbound optical signal and has a transmission spectrum with periodic transmission peaks and troughs. The first frequency of the outbound optical signal may be aligned to one of the transmission peaks and the second frequency of the inbound optical signal may be aligned to one of the transmission troughs, or vice versa.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: April 28, 2020
    Assignee: Finisar Corporation
    Inventors: Leo Yu-Yu Lin, Huade Shu, Huiping Li, Li Zhang, Shanshan Zeng, Guangsheng Li
  • Patent number: 10635398
    Abstract: A device for generating sum-of-products data includes an array of variable resistance cells, variable resistance cells in the array each including a transistor and a programmable resistor connected in parallel, the array including n columns of cells including strings of series-connected cells and m rows of cells. Control and bias circuitry are coupled to the array, including logic for programming the programmable resistors in the array with resistances corresponding to values of a weight factor Wmn for the corresponding cell. Alternatively, the resistances can be programmed during manufacture. Input drivers are coupled to corresponding ones of the m rows of cells, the input drivers selectively applying inputs Xm to rows m. Column drivers are configured to apply currents In to corresponding ones of the n columns of cells. Voltage sensing circuits operatively coupled to the columns of cells.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: April 28, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Yu Lin, Feng-Min Lee
  • Patent number: 10622080
    Abstract: A non-volatile memory and its reading method are provided. The reading method includes: erasing a plurality of memory cells in a memory cell string; setting a target memory cell of the memory cells, setting an initial voltage, generating a plurality of programming voltages by gradually increasing the initial voltage based on a step value, sequentially performing a plurality of programming operations by the target memory cell according to the programming voltages, and verifying the target memory cell to obtain a first verifying current during the programming operations; setting a corresponding programming voltage as a target voltage through determining the first verifying current and a first reference current; and performing the programming operations on the memory cells other than the target memory cell according to the target voltage and setting the memory cell string as a reading reference memory cell string.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: April 14, 2020
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Yu-Yu Lin, Feng-Min Lee, Ming-Hsiu Lee
  • Patent number: 10558052
    Abstract: An adjusting mechanism and a head mounted display are provided. The adjusting mechanism includes a band, a rotating shaft, a knob, a driving member, and a holder. The rotating shaft has a first ring tooth around a central axis. The band is driven by the rotating shaft to move relative to the rotating shaft when the rotating shaft rotates around the central axis. The knob has a plurality of chutes. Each chute has a first section and a second section. The depth of each first section is deeper than the depth of each second section. The driving member has a second ring tooth, a plurality of guiding pins, and a plurality of pawls. The driving member is assembled to the knob, and the guiding pins are located in the chutes. The holder has a circular unidirectional tooth. The band limits the rotation of the holder relative to the band. The circular unidirectional tooth is configured to be coupled with these pawls to limit the rotation of the driving member relative to the holder in a single direction.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: February 11, 2020
    Assignee: HTC Corporation
    Inventors: Chun-Wei Chang, Ying-Chieh Huang, Yen-Cheng Lin, Yu-Yu Lin
  • Publication number: 20200034684
    Abstract: A neural network system includes a doping well having a first conductivity, a memory string having a plurality of memory cells each include a gate and a source/drain with a second conductivity disposed in the doping well, a buried channel layer having the second conductivity and disposed in the doping well, a word line driver used to apply input voltages corresponding to a plurality of input variations of terms in the sum-of-products operations, a voltage sensing circuit used to apply a constant current into the memory string and to sensing a voltage, a controller used to program/read the memory cells for acquiring a plurality of threshold voltages corresponds to weights of the terms in the sum-of-products operations. When programming/reading the threshold voltages, a first bias voltage is applied to the first doping well; and when sensing the voltage, a second bias voltage is applied to the first doping well.
    Type: Application
    Filed: December 17, 2018
    Publication date: January 30, 2020
    Inventors: Yu-Yu LIN, Feng-Min LEE
  • Patent number: 10528862
    Abstract: A neural network system includes a doping well having a first conductivity, a memory string having a plurality of memory cells each include a gate and a source/drain with a second conductivity disposed in the doping well, a buried channel layer having the second conductivity and disposed in the doping well, a word line driver used to apply input voltages corresponding to a plurality of input variations of terms in the sum-of-products operations, a voltage sensing circuit used to apply a constant current into the memory string and to sensing a voltage, a controller used to program/read the memory cells for acquiring a plurality of threshold voltages corresponds to weights of the terms in the sum-of-products operations. When programing/reading the threshold voltages, a first bias voltage is applied to the first doping well; and when sensing the voltage, a second bias voltage is applied to the first doping well.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: January 7, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Yu Lin, Feng-Min Lee
  • Publication number: 20190367632
    Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.
    Type: Application
    Filed: May 30, 2019
    Publication date: December 5, 2019
    Inventors: Tong-Hsuan CHANG, Mei-Chun YANG, Liahng-Yirn LIU, Jerry TING, Shu-Yen CHANG, Yen-Ying CHEN, Yu-Yu LIN, Shu-Lun TANG
  • Patent number: 10490744
    Abstract: A contact hole structure includes a substrate, an interlayer dielectric (ILD), a conductive layer and an insulating capping layer. The ILD is disposed on the substrate and has a first opening. The conductive layer is disposed in the ILD and aligns the first opening. The insulating capping layer has a spacer disposed on a first sidewall of the first opening, wherein the spacer contacts to the conductive layer and defines a second opening in the first opening, so as to expose a portion of the conductive layer.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: November 26, 2019
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Dai-Ying Lee, Po-Hao Tseng, Feng-Min Lee, Yu-Yu Lin, Kai-Chieh Hsu
  • Patent number: 10482953
    Abstract: A multi-state memory device includes a first memory element, a second memory element, a first controlling element and a second controlling element. The second memory element has a memory cell structure identical to that of the first memory element and connects to the first memory element in series. The first controlling element is connected to the first memory element either in series or in parallel. The second controlling element has a characteristic value identical to that of the first controlling element and is connected to the second memory element by a connection structure identical to that of the first controlling element. When the first memory element receives a first signal and a second signal through the first controlling element, a first state value and a second state value are generated correspondingly, and the characteristic value is greater than the first state value and less than the second state value.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: November 19, 2019
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Hsuan Lin, Yu-Yu Lin, Feng-Min Lee, Chao-Hung Wang, Po-Hao Tseng, Kai-Chieh Hsu