Abstract: A semiconductor device includes a resistor. The resistor includes two bottom electrodes adjacent to each other, a resistive layer, a top electrode and a conductive sidewall. The resistive layer is disposed on the two bottom electrodes. The top electrode is disposed on the resistive layer. The conductive sidewall surrounds the top electrode and is electrically connected to the top electrode and a bottom electrode of the two bottom electrodes. The top electrode overlaps the two bottom electrodes in the first direction, and extends above the two bottom electrodes along a second direction different from the first direction.

Abstract: A universal memory for In-Memory Computing and an operation method thereof are provided. The universal memory includes at least one write word line, at least one unit cell and at least one read word line. The unit cell includes a write transistor and a read transistor. The gate of the write transistor is connected to the write word line. The write transistor is a transistor with adjustable threshold voltage. The gate of the read transistor is connected to the drain or the source of the write transistor. The read word line is connected to the drain or the source of the read transistor. The universal memory is used for a training mode and an inference mode. In the training mode and the inference mode, a weight is stored at different locations of the unit cell.

Abstract: A memory device and an operation method thereof for performing a multiply-accumulate operation are provided. The memory device includes at least one memory string, a plurality of data lines and a string line. The memory string includes a plurality of unit cells having a plurality of stored values. The data lines are respectively connected to the unit cells to receive a plurality of data signals having a plurality of inputting values. When the data signals are inputted into the unit cells, a plurality of nodes among the unit cells are kept at identical voltages. The string line is connected to the memory string to receive a sensing signal and obtain a measured value representing a sum-of-product result of the inputting values and the stored values. The data signals and the sensing signal are received at different time.

Abstract: An in-memory computing (IMC) memory device and an IMC method are provided. The IMC memory device includes: a plurality of memory cells, the memory cells forming a plurality of computing layers; and a plurality of computing layer connectors, the computing layer connectors connecting between the computing layers. A first computing layer input is inputted into a first computing layer of the computing layers. The first computing layer generates a first computing layer output. A first computing layer connector of the computing layer connectors converts the first computing layer output into a second computing layer input. The first computing layer connector inputs the second computing layer input into a second computing layer of the computing layers. The computing layer connectors are a plurality of inverters, a plurality of voltage-to-voltage converters or a plurality of current-to-voltage converters.

Abstract: Disclosed is an image display format conversion method, comprising: a frame recognition step of performing a frame recognition process on a comic page image to obtain a plurality of comic frame images and frame position information; a frame sequence determination step of determining a frame viewing sequence according to a selected regional layout rule; and a frame reassembly step of reassembling and converting, based on the frame viewing sequence, the plurality of comic frame images into a digital media in an animation-like format or a scrolling-comic format.

Abstract: An in-memory-computing method for a memory device includes: storing weight values in cascaded computing cells each including first and second computing memory cells, wherein the first computing memory cells are cascaded in series into a first computing memory cell string and the second computing memory cells are cascaded in series into a second computing memory cell string: receiving input values by the first and the second computing memory cell strings; performing a first logic operation on the input values and the weight values by the first computing memory cell string to generate a first logic operation result, and performing a second logic operation on the input values and the weight values by the second computing memory cell string to generate a second logic operation result: and performing a third logic operation on the first and the second logic operation results to generate an output logic operation result.

Abstract: Methods of amplifying and determining a target nucleotide sequence are provided. The method of amplifying the target nucleotide sequence includes the following steps. A first adaptor and a second adaptor are linked to two ends of a double-stranded nucleic acid molecule with a target nucleotide sequence respectively to form a nucleic acid template, in which the first adaptor includes a Y-form adaptor or a hairpin adaptor and the second adaptor is a hairpin adaptor. Then, a PCR amplification cycle is performed on the nucleic acid template to obtain a PCR amplicon of the target nucleotide sequence.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: A memory device includes a plurality of computing memory cells, each of which stores a weight value, receives an input value and generates an output value. Each of the computing memory cells includes a transistor connected to a bit line and a word line, receiving a sensing current through the bit line and receiving an input voltage through the word line. When the sensing current flows through the transistor, the computing memory cell generates a first voltage difference corresponding to the output value. The output value is equal to a product of the input value and the weight value.

Abstract: A memory device and an operation method thereof for performing a multiply-accumulate operation are provided. The memory device includes at least one memory string, a plurality of data lines and a string line. The memory string includes a plurality of unit cells having a plurality of stored values. The data lines are respectively connected to the unit cells to receive a plurality of data signals having a plurality of inputting values. When the data signals are inputted into the unit cells, a plurality of nodes among the unit cells are kept at identical voltages. The string line is connected to the memory string to receive a sensing signal and obtain a measured value representing a sum-of-product result of the inputting values and the stored values. The data signals and the sensing signal are received at different time.

Abstract: An operation method of memory device, comprising: selecting a target block for performing an error correction operation; reading the target block row by row; transmitting the read data to an error correction circuit; and checking and correcting read data to generate a corrected data.

Abstract: An operation method of memory device, comprising: selecting a target block for performing an error correction operation; reading the target block row by row; transmitting the read data to an error correction circuit; and checking and correcting read data to generate a corrected data.

Abstract: A memory device and a method for operating the same are provided. The memory device includes a plurality of resistive memory cells and a control circuitry electrically connected to the plurality of resistive memory cells. The control circuitry provides operation modes to operate the plurality of resistive memory cells. The operation modes include a first program operation and a refresh operation. The first program operation includes applying a first program bias voltage to a selected resistive memory cell of the plurality of resistive memory cells to establish a low-resistance state in the selected resistive memory cell. The first program operation establishes a first threshold voltage in the memory device. The refresh operation includes applying a refresh bias voltage to the selected resistive memory cell to refresh the selected resistive memory cell. An absolute value of the refresh bias voltage is greater than the first threshold voltage.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: Metal oxide based memory devices and methods for manufacturing are described herein. A method for manufacturing a memory cell includes forming a bottom adhesion layer in a via formed in an insulating layer. Forming a bottom conductive plug in the bottom adhesion layer. Forming a top adhesion layer over the bottom adhesion layer and bottom conductive plug. Forming a top conductive plug in the top adhesion layer. Wherein the thickness of the bottom and top adhesion layers may be different from one another.

Abstract: A method for accelerating a convolution of a kernel matrix over an input matrix for computation of an output matrix using in-memory computation involves storing in different sets of cells, in an array of cells, respective combinations of elements of the kernel matrix or of multiple kernel matrices. To perform the convolution, a sequence of input vectors from an input matrix is applied to the array. Each of the input vectors is applied to the different sets of cells in parallel for computation during the same time interval. The outputs from each of the different sets of cells generated in response to each input vector are sensed to produce a set of data representing the contributions of that input vector to multiple elements of an output matrix. The sets of data generated across the input matrix are used to produce the output matrix.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: An online system receives impression data from one or more content publishers. The impression data describes impressions provided to users of the online system on behalf of an agent. The online system selects a randomly selected number of impressions in the received impression data. The online system generates an impressions block by encrypting impression data that describes the selected set of impressions using a unique cypher, and adds the impressions block to a blockchain. The online system further generates a cypher block by encrypting the cypher and an identifier of the impressions block to which the cypher applies using a public key provided by the agent to the online system. The online system adds the cypher block to the blockchain. The agent can recover the cypher from the cypher block based on a private key, and the agent can then recover the impression data using the recovered cypher.

Abstract: An optoelectronic module may include an optical receiver optically coupled with an optical fiber. The optical receiver may be configured to receive time synchronization signals from the optical fiber. The time synchronization signals may be frequency modulated, wavelength modulated, or amplitude modulated and may be received along with received data signals. A time synchronization signal detection module may be communicatively coupled to the optical receiver. The time synchronization signal detection module may be configured to receive the time synchronization signals that are transmitted through the optical fiber and detect frequency modulations, wavelength modulations, or amplitude modulations to recover the time synchronization signals.