Patents by Inventor Yuan Chou
Yuan Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10821719Abstract: A method for three-dimensional printing for forming a three-dimensional structure on a moving platform is provided. The three-dimensional structure includes a shell portion and a foamy filling portion. The method includes the following: a digital shell model of the three-dimensional structure is built. Next, the digital shell model is sliced into a plurality of cross-section information. Next, a corresponding liquid forming material is cured on the moving platform according to the cross-section information to form a plurality of shell layers. Next, foaming process is performed on the liquid forming material to form a foamy forming material. Next, the foamy forming material located within the corresponding shell layers is cured to form a plurality of foamy filling layers. Afterward, the shell layers and the foamy filling layers are alternately formed on the moving platform and stacked to form the three-dimensional structure. A three-dimensional printing apparatus adopting the method is also provided.Type: GrantFiled: October 22, 2014Date of Patent: November 3, 2020Assignees: XYZprinting, Inc., Kinpo Electronics, Inc., Cal-Comp Electronics & Communications Company LimitedInventors: Ming-Hsiung Ding, Ching-Yuan Chou
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Patent number: 10812057Abstract: A time detection circuit and a time detection method are provided. The time detection circuit includes an input signal processor and a time signal amplifier. The input signal processor receives a first input signal and a second input signal, calculates a time difference value between the first input signal and the second input signal, adjusts the time difference value by comparing the time difference value with a set reference value, and provides the adjusted time difference value. The time signal amplifier receives the adjusted time difference value, and amplifies the adjusted time difference value to generate an amplified time signal. The time signal amplifier operates in a linear operation region between a first time value and a second time value, and the set reference value is set according to the first time value and the second time value.Type: GrantFiled: December 26, 2019Date of Patent: October 20, 2020Assignee: Faraday Technology Corp.Inventors: Pei-Yuan Chou, Jinn-Shyan Wang, Chuen-Shiu Chen
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Publication number: 20200323080Abstract: A circuit board optimized for a denser component population within a standard size of footprint includes a mother board and a plurality of sub-board layers stacked on and connected to the mother board. Each of the sub-board layers has a plurality of daughter boards. The sub-board layers are composed of a first sub-board layer and a second sub-board layer. The daughter boards of the first sub-board layer are arranged on a side of the mother board, and the daughter boards of the second sub-board layer are arranged on the daughter boards of the first sub-board layer.Type: ApplicationFiled: May 7, 2019Publication date: October 8, 2020Inventors: HOU-YUAN CHOU, YI-CHIH WU
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Patent number: 10785873Abstract: A circuit board optimized for a denser component population within a standard size of footprint includes a mother board and a plurality of sub-board layers stacked on and connected to the mother board. Each of the sub-board layers has a plurality of daughter boards. The sub-board layers are composed of a first sub-board layer and a second sub-board layer. The daughter boards of the first sub-board layer are arranged on a side of the mother board, and the daughter boards of the second sub-board layer are arranged on the daughter boards of the first sub-board layer.Type: GrantFiled: May 7, 2019Date of Patent: September 22, 2020Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., I, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Hou-Yuan Chou, Yi-Chih Wu
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Patent number: 10753781Abstract: A three-dimensional printing device including a body, a tank, an origin target, a sensor, and a control module is provided. The tank is rotatably assembled on the body, and the tank is filled with a liquid forming material. The origin target is disposed on the tank and rotates along with the tank. The sensor is disposed on the body and located above the liquid forming material to sense a liquid level of the liquid forming material. The control module electrically connects the tank and the sensor and drives the tank to rotate. The sensor is located above a rotation path of the origin target, and the control module senses the origin target through the sensor and positions a rotation origin of the tank.Type: GrantFiled: September 17, 2018Date of Patent: August 25, 2020Assignees: XYZprinting, Inc., Kinpo Electronics, Inc.Inventors: Chen-Fu Huang, An-Hsiu Lee, Ching-Yuan Chou, Tsai-Yi Lin
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Patent number: 10747540Abstract: An apparatus is disclosed, the apparatus including a branch target cache memory configured to store one or more entries. Each entry of the one or more entries may include an address tag and a corresponding target address. The apparatus may also include a control circuit configured to check for at least one taken branch instruction in a group of one or more instructions fetched using a current address. The control circuit may be further configured to generate an address tag corresponding to the group of one or more instructions using another address used prior to the current address in response to a determination that the group of one or more instructions includes a taken branch instruction. In addition, the control circuit may be configured to store the corresponding address tag and a target address associated with the taken branch instruction in a particular entry in the branch target cache memory.Type: GrantFiled: November 1, 2016Date of Patent: August 18, 2020Assignee: Oracle International CorporationInventors: Yuan Chou, Manish Shah
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Publication number: 20200201771Abstract: A system for prefetching data for a processor includes a processor core, a memory configured to store information for use by the processor core, a cache memory configured to fetch and store information from the memory, and a prefetch circuit. The prefetch circuit may be configured to issue a multi-group prefetch request to retrieve information from the memory to store in the cache memory using a predicted address. The multi-group prefetch request may include a depth value indicative of a number of fetch groups to retrieve. The prefetch circuit may also be configured to generate an accuracy value based on a cache hit rate of prefetched information over a particular time interval, and to modify the depth value based on the accuracy value.Type: ApplicationFiled: March 2, 2020Publication date: June 25, 2020Inventors: Hyunjin Abraham Lee, Yuan Chou, John Pape
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Publication number: 20200189153Abstract: A manufacturing apparatus and a manufacturing method for a molded lens are provided. A substrate is located between a first molding core and a second molding core, and the first molding core is moved so that the substrate is formed into a lens. A distance sensor sends a plurality of press distance parameters of moving the first molding core, and the press distance parameters may form a press curve. The press curve and a reference press curve is compared for a difference by a processor and a comparator. The processor determines whether the difference is within an error range.Type: ApplicationFiled: June 20, 2019Publication date: June 18, 2020Applicant: Young Optics Inc.Inventors: Shiue-Li Liu, Ming-Yuan Chou, Tzu-Lun Wang
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Patent number: 10666235Abstract: A temperature compensated oscillation circuit is provided. The temperature compensated oscillation circuit generates a first delay voltage and a second delay voltage according to the first resistance value. A first order term of a temperature change function of the first resistance value is eliminated. The temperature compensated oscillation circuit generates a reference voltage according to a first reference resistance value and a second reference resistance value. A first order term of a temperature change function of the first reference resistance value is set to equal to a first order term of a temperature change function of the second reference resistance value. The second reference resistance value is adjusted such that variation of the reference voltage matches a second order term of the temperature change function of the first resistance value, thereby providing a clock that does not vary due to a variation in temperature.Type: GrantFiled: July 10, 2019Date of Patent: May 26, 2020Assignee: ITE Tech. Inc.Inventors: Chia-Yuan Chou, An-Chi Tsai
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Publication number: 20200126985Abstract: A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.Type: ApplicationFiled: December 19, 2019Publication date: April 23, 2020Inventors: Xiong-Fei Yu, Chun-Yuan Chou, Kuang-Yuan Hsu, Da-Yuan Lee, Jeff J. Xu
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Patent number: 10604586Abstract: A humanized monoclonal antibody against the CD34 surface antigen is provided in the present disclosure. The humanized monoclonal antibody includes a light chain variable region and a heavy chain variable region. In which, a nucleotide sequence encoding the amino acid sequence for the light chain variable region comprises a nucleotide sequence which encodes the amino acid sequence of SEQ ID No. 9 or an amino acid sequence with at least 80% sequence identity to the sequence of SEQ ID No. 9, and a nucleotide sequence encoding the amino acid sequence for the heavy chain variable region comprises a nucleotide sequence which encodes the amino acid sequence of SEQ ID No. 10 or an amino acid sequence with at least 80% sequence identity to the sequence of SEQ ID No. 10.Type: GrantFiled: May 8, 2017Date of Patent: March 31, 2020Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia-Yu Fan, Min-Yuan Chou
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Patent number: 10591896Abstract: The disclosure provides a printing layer trimming method and an electronic device using the same. The printing layer trimming method is suitable for the electronic device and includes steps as follows. An original layer is converted into a first printing layer. At least one data region of the first printing layer is identified to identify at least one blank region of the first printing layer. Then, the blank region of the first printing layer is trimmed off The trimmed first printing layer is further converted into a print head signal data and provided to a printing device to print a corresponding three-dimensional structure. The disclosure also provides another printing layer trimming method and an electronic device using the same for trimming a second printing layer generated according to a print head signal data and providing the second printing layer to a printing device to print a corresponding three-dimensional structure.Type: GrantFiled: September 7, 2015Date of Patent: March 17, 2020Assignees: XYZprinting, Inc., Kinpo Electronics, Inc., Cal-Comp Electronics & Communications Company LimitedInventors: Ching-Yuan Chou, Ting-Yu Lu
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Publication number: 20200070426Abstract: A 3D printing method of improving effectiveness of pouring materials for a stereolithography 3D printer (2) is provided. The stereolithography 3D printer (2) controls a moving module (22) to start to move a material tank (23) when a condition to supply for refilling satisfies, controls a material-providing module (26) to start to pour light-curable materials (41) into the material tank (23), and controls a light module (21) and a curing platform (24) to print multiple layers of slice physical models layer (42) by layer according to multiple layers of print data after completion of pouring the light-curable materials (42) and moving, the multiple layers of slice physical models (42) constitutes a 3D physical model. Thus, the waiting time after supplementing to the light-curable materials can be effectively reduced, and the time required by execution of 3D printing can be reduced as well.Type: ApplicationFiled: April 3, 2019Publication date: March 5, 2020Inventor: Ching-Yuan CHOU
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Publication number: 20200070411Abstract: A method of making surfaces smooth or flat for 3D printing applied to a stereolithography 3D printer (2) is provided. The method is to control a modeling plane of a curing platform (24) to contact light-curable materials (41) in a material tank (23), moving the modeling tank (23) by a moving module (22) for making the light-curable materials (41) in the modeling tank (23) flow, and control a light module (21) to irradiate the curing platform (24) according to print data for manufacturing one layer of slice physical model on the modeling plane. The method can effectively reduce the defects on the surface of a physical model, and improve a printing quality of the physical models.Type: ApplicationFiled: January 25, 2019Publication date: March 5, 2020Inventor: Ching-Yuan CHOU
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Patent number: 10579531Abstract: A system for prefetching data for a processor includes a processor core, a memory configured to store information for use by the processor core, a cache memory configured to fetch and store information from the memory, and a prefetch circuit. The prefetch circuit may be configured to issue a multi-group prefetch request to retrieve information from the memory to store in the cache memory using a predicted address. The multi-group prefetch request may include a depth value indicative of a number of fetch groups to retrieve. The prefetch circuit may also be configured to generate an accuracy value based on a cache hit rate of prefetched information over a particular time interval, and to modify the depth value based on the accuracy value.Type: GrantFiled: August 30, 2017Date of Patent: March 3, 2020Assignee: Oracle International CorporationInventors: Hyunjin Abraham Lee, Yuan Chou, John Pape
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Patent number: 10522544Abstract: A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.Type: GrantFiled: May 1, 2019Date of Patent: December 31, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Xiong-Fei Yu, Chun-Yuan Chou, Kuang-Yuan Hsu, Da-Yuan Lee, Jeff J. Xu
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Publication number: 20190368913Abstract: A three-dimensional printing device including a body, a tank, an origin target, a sensor, and a control module is provided. The tank is rotatably assembled on the body, and the tank is filled with a liquid forming material. The origin target is disposed on the tank and rotates along with the tank. The sensor is disposed on the body and located above the liquid forming material to sense a liquid level of the liquid forming material. The control module electrically connects the tank and the sensor and drives the tank to rotate. The sensor is located above a rotation path of the origin target, and the control module senses the origin target through the sensor and positions a rotation origin of the tank.Type: ApplicationFiled: September 17, 2018Publication date: December 5, 2019Applicants: XYZprinting, Inc., Kinpo Electronics, Inc.Inventors: Chen-Fu Huang, An-Hsiu Lee, Ching-Yuan Chou, Tsai-Yi Lin
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Patent number: 10474578Abstract: An system for prefetching data for a processor includes a processor core, a memory, a cache memory, and a prefetch circuit. The memory may be configured to store information for use by the processor core. The cache memory may be configured to issue a fetch request for information from the memory for use by the processor core. The prefetch circuit may be configured to issue a prefetch request for information from the memory to store in the cache memory using a predicted address, and to monitor, over a particular time interval, an amount of fetch requests from the cache memory and prefetch requests from the prefetch circuit. The prefetch circuit may also be configured to disable prefetch requests from the memory for a subsequent time interval in response to a determination that the amount satisfies a threshold amount.Type: GrantFiled: August 30, 2017Date of Patent: November 12, 2019Assignee: Oracle International CorporationInventors: Hyunjin Abraham Lee, Yuan Chou, John Pape
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Patent number: 10470308Abstract: A circuit board assembly comprising a printed circuit main board and a printed circuit sub-board, to avoid layout constraints, can support components on either board. The printed circuit main board includes first signal layer, and first and second through holes in the first signal layer. A first wire electrically couples a first electronic component and the first through hole. A second signal layer with third and fourth through holes is found on the printed circuit sub-board. The third through hole is electrically coupled to the first through hole, and the fourth through hole is electrically coupled to the second through hole.Type: GrantFiled: November 9, 2018Date of Patent: November 5, 2019Assignees: HONGFUJIN PRECISION INDUSTRY (WUHAN) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Hou-Yuan Chou, Ming-Fang Chen, Yi-Chih Wu
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Patent number: 10460241Abstract: A server and a cloud computing resource optimization method thereof for big data cloud computing architecture are provided. The server runs a dynamic scaling system to perform the following operations: receiving a task message; executing a profiling procedure to generate a profile based on an to-be-executed task recorded in the task message; executing a classifying procedure to determine a task classification of the to-be-executed task; executing a prediction procedure to obtain a plurality of predicted execution times corresponding to a plurality of computing node numbers, a computing node type and a system parameter of the to-be-executed task; executing an optimization procedure to determine a practical computing node number of the to-be-executed task; and transmitting an optimization output message to a management server to make the management server allocate at least one data computing system to execute a program file of the to-be-executed task.Type: GrantFiled: December 7, 2016Date of Patent: October 29, 2019Assignee: Institute For Information IndustryInventors: Jerry Chi-Yuan Chou, Shih-Yu Lu, Chen-Chun Chen, Chan-Yi Lin, Hsin-Tse Lu