Patents by Inventor Yuan Lu

Yuan Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220093800
    Abstract: A semiconductor device and method of manufacturing the semiconductor device are provided. An exemplary semiconductor device comprises a fin disposed over a substrate, wherein the fin includes a channel region and a source/drain region; a gate structure disposed over the substrate and over the channel region of the fin; a source/drain feature epitaxially grown in the source/drain region of the fin, wherein the source/drain feature includes a top epitaxial layer and a lower epitaxial layer formed below the top epitaxial layer, and the lower epitaxial layer includes a wavy top surface; and a contact having a wavy bottom surface matingly engaged with the wavy top surface of the lower epitaxial layer of the source/drain feature.
    Type: Application
    Filed: December 6, 2021
    Publication date: March 24, 2022
    Inventors: Chia-Ta Yu, Yen-Chieh Huang, Wei-Yuan Lu, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20220010441
    Abstract: A method for electrolysis of water and a method for preparing a catalyst for electrolysis of water are provided. The method for electrolysis of water includes using a high entropy alloy as a catalyst. Further, the method for preparing a catalyst for electrolysis of water includes the steps of placing a substrate in an aqueous electrolyte containing a high entropy alloy precursor and performing an electroplating process on the substrate to form a high entropy alloy catalyst on the substrate.
    Type: Application
    Filed: September 22, 2021
    Publication date: January 13, 2022
    Applicants: National Tsing Hua University, Chang Chun Plastics Co., Ltd., Chang Chun Petrochemical Co., Ltd., DAIREN CHEMICAL CORP.
    Inventors: Chun-Lun Huang, Shih-Yuan Lu
  • Patent number: 11222951
    Abstract: A method of semiconductor fabrication includes providing a semiconductor structure having a substrate and first, second, third, and fourth fins above the substrate. The method further includes forming an n-type epitaxial source/drain (S/D) feature on the first and second fins, forming a p-type epitaxial S/D feature on the third and fourth fins, and performing a selective etch process on the semiconductor structure to remove upper portions of the n-type epitaxial S/D feature and the p-type epitaxial S/D feature such that more is removed from the n-type epitaxial S/D feature than the p-type epitaxial S/D feature.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: January 11, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Chun-An Lin, Wei-Yuan Lu, Guan-Ren Wang, Peng Wang
  • Patent number: 11215929
    Abstract: A photoresist apparatus and a method are provided. The photoresist apparatus includes a pre-baking apparatus. The pre-baking apparatus includes: a hot-plate, a first cover over the hot-plate, a second cover over the first cover, a first heating element extending along a topmost surface of the first cover, and a second heating element extending along a topmost surface of the second cover.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: January 4, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jui Kuo, De-Yuan Lu, Chen-Hua Yu, Ming-Tan Lee
  • Patent number: 11211295
    Abstract: A method for fabricating a semiconductor device having a substantially undoped channel region includes providing a substrate having a fin extending from the substrate. An in-situ doped layer is formed on the fin. By way of example, the in-situ doped layer may include an in-situ doped well region formed by an epitaxial growth process. In some examples, the in-situ doped well region includes an N-well or a P-well region. After formation of the in-situ doped layer on the fin, an undoped layer is formed on the in-situ doped layer, and a gate stack is formed over the undoped layer. The undoped layer may include an undoped channel region formed by an epitaxial growth process. In various examples, a source region and a drain region are formed adjacent to and on either side of the undoped channel region.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: December 28, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hsiung Tsai, Wei-Yuan Lu
  • Patent number: 11211455
    Abstract: Embodiments of mechanisms for forming dislocations in source and drain regions of finFET devices are provided. The mechanisms involve recessing fins and removing the dielectric material in the isolation structures neighboring fins to increase epitaxial regions for dislocation formation. The mechanisms also involve performing a pre-amorphous implantation (PAI) process either before or after the epitaxial growth in the recessed source and drain regions. An anneal process after the PAI process enables consistent growth of the dislocations in the source and drain regions. The dislocations in the source and drain regions (or stressor regions) can form consistently to produce targeted strain in the source and drain regions to improve carrier mobility and device performance for NMOS devices.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: December 28, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Hsiung Tsai, Wei-Yuan Lu, Chien-Tai Chan, Wei-Yang Lee, Da-Wen Lin
  • Publication number: 20210395191
    Abstract: Provided here are nitric oxide-releasing compounds that include at least two different NO donor functional groups of the same class. In some embodiments, such nitric oxide-releasing compounds are macromolecules such as dendrimer and co-condensed silica. Pharmaceutical compositions, wound dressings, kits and methods of treatments are also provided herein.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Inventors: Mark Schoenfisch, Yuan Lu, Nathan Stasko, Jian Bao
  • Publication number: 20210380755
    Abstract: A material comprising an epoxy/elastomer adduct, a polymeric particle, from about 0.05 to about 20 weight percent of an epoxy/diacid adduct, and optionally, an amine reaction product.
    Type: Application
    Filed: October 29, 2019
    Publication date: December 9, 2021
    Inventors: David Kosal, Michael Czaplicki, Yuan Lu
  • Patent number: 11195951
    Abstract: A semiconductor device and method of manufacturing the semiconductor device are provided. An exemplary semiconductor device comprises a fin disposed over a substrate, wherein the fin includes a channel region and a source/drain region; a gate structure disposed over the substrate and over the channel region of the fin; a source/drain feature epitaxially grown in the source/drain region of the fin, wherein the source/drain feature includes a top epitaxial layer and a lower epitaxial layer formed below the top epitaxial layer, and the lower epitaxial layer includes a wavy top surface; and a contact having a wavy bottom surface matingly engaged with the wavy top surface of the lower epitaxial layer of the source/drain feature.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: December 7, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ta Yu, Yen-Chieh Huang, Wei-Yuan Lu, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 11186681
    Abstract: The invention generally relates to compositions comprising degradable polymers and methods of making degradable polymers. Specifically, the disclosed degradable polymers comprise a biodegradable polymer backbone, a nitric oxide linker moiety, and a nitric oxide molecule. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: November 30, 2021
    Assignee: The University of North Carolina at Chapel Hill
    Inventors: Mark Schoenfisch, Lei Yang, Yuan Lu
  • Patent number: 11167268
    Abstract: A catalyst includes a carbon black support and active metal particles. A surface of the carbon black support has a relative atomic percentage of oxygen atoms ranged from 2 atom % to 12 atom %. The active metal particles are distributed on the carbon black support. Each of the active metal particles includes rhodium metal and rhodium oxide. A method for manufacturing the catalyst and a method for hydrogenating an aromatic epoxy compound are also provided herein.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: November 9, 2021
    Assignee: National Tsing Hua University
    Inventors: Chung-Sung Tan, Wei-Yuan Lu
  • Patent number: 11158740
    Abstract: A method includes forming a metal-oxide-semiconductor field-effect transistor (MOSFET). The Method includes performing an implantation to form a pre-amorphization implantation (PAI) region adjacent to a gate electrode of the MOSFET, forming a strained capping layer over the PAI region, and performing an annealing on the strained capping layer and the PAI region to form a dislocation plane. The dislocation plane is formed as a result of the annealing, with a tilt angle of the dislocation plane being smaller than about 65 degrees.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: October 26, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Wei-Yuan Lu
  • Publication number: 20210324227
    Abstract: The present teachings contemplate a method for sealing comprising providing a substrate that includes a plurality of pores, locating a polymerizable composition onto a surface of the substrate, the polymerizable composition including a monofunctional, difunctional or multifunctional methylene malonate or a cyanoacrylate, and initiating polymerization of the composition, wherein polymerization is initiated by the use of an initiator or by the presence of a latent activating agent.
    Type: Application
    Filed: September 19, 2017
    Publication date: October 21, 2021
    Inventors: David Sweet, Michael Czaplicki, Ken Mazich, Yuan LU, Kevin Hicks, Austin O'Connor
  • Patent number: 11124476
    Abstract: Provided here are nitric oxide-releasing compounds that include at least two different NO donor functional groups of the same class. In some embodiments, such nitric oxide-releasing compounds are macromolecules such as dendrimer and co-condensed silica. Pharmaceutical compositions, wound dressings, kits and methods of treatments are also provided herein.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: September 21, 2021
    Assignees: Novan, Inc., The University of North Carolina at Chapel Hill
    Inventors: Mark Schoenfisch, Yuan Lu, Nathan Stasko, Jian Bao
  • Publication number: 20210277200
    Abstract: The present teachings contemplate a method comprising coating an polymeric material with a composition including a dicarbonyl compound and having a viscosity of from about 50 cps to about 500 cps, wherein the coating initiates either: (i) spontaneous polymerization (e.g., in less than about one minute) at room temperature of the composition without the addition of an initiator; or (ii) polymerization at room temperature at a selected later time with or without the addition of an initiator; and wherein the composition adheres or facilitates adhesion of the polymeric material to a substrate.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Inventors: Yuan Lu, Kenneth Mazich, Kevin Hicks, Austin O'connor, Michael Czaplicki
  • Publication number: 20210280579
    Abstract: A method comprises growing an epitaxial layer on a first region of a first wafer while remaining a second region of the first wafer exposed; forming a first dielectric layer over the epitaxial layer and the second region; forming a first transistor on a second wafer; forming a second dielectric layer over the first transistor; bonding the first and second dielectric layers; and forming second and third transistors on the epitaxial layer and on the second region of the first wafer, respectively.
    Type: Application
    Filed: May 21, 2021
    Publication date: September 9, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Te LIN, Wei-Yuan LU, Feng-Cheng YANG
  • Publication number: 20210257482
    Abstract: A method for fabricating a semiconductor device that includes a merged source/drain feature extending between two adjacent fin structures. An air gap is formed under the merged source/drain feature. Forming the epitaxial feature includes growing a first epitaxial feature having a first portion over the first fin structure and a second portion over the second fin structure, growing a second epitaxial feature over the first and second portions of the first epitaxial feature, and growing a third epitaxial feature over the second epitaxial feature. The second epitaxial feature includes a merged portion between the first fin structure and the second fin structure.
    Type: Application
    Filed: November 12, 2020
    Publication date: August 19, 2021
    Inventors: Feng-Ching CHU, Chung-Chi WEN, Wei-Yuan LU, Feng-Cheng YANG, Yen-Ming CHEN
  • Publication number: 20210225722
    Abstract: A package includes a device die, an encapsulant encapsulating the device die therein, a first plurality of through-vias penetrating through the encapsulant, a second plurality of through-vias penetrating through the encapsulant, and redistribution lines over and electrically coupling to the first plurality of through-vias. The first plurality of through-vias include an array. The second plurality of through-vias are outside of the first array, and the second plurality of through-vias are larger than the first plurality of through-vias.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Inventors: Hung-Jui Kuo, Tai-Min Chang, Hui-Jung Tsai, De-Yuan Lu, Ming-Tan Lee
  • Publication number: 20210214852
    Abstract: A method for electrolysis of water and a method for preparing a catalyst for electrolysis of water are provided. The method for electrolysis of water includes using a high entropy alloy as a catalyst. Further, the method for preparing a catalyst for electrolysis of water includes the steps of placing a substrate in an aqueous electrolyte containing a high entropy alloy precursor and performing an electroplating process on the substrate to form a high entropy alloy catalyst on the substrate.
    Type: Application
    Filed: March 15, 2020
    Publication date: July 15, 2021
    Applicants: National Tsing Hua University, Chang Chun Plastics Co., Ltd., Chang Chun Petrochemical Co., Ltd., DAIREN CHEMICAL CORP.
    Inventors: Chun-Lung Huang, Shih-Yuan Lu
  • Patent number: D939427
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: December 28, 2021
    Assignee: FEDERAL CORPORATION
    Inventor: Chang-Yuan Lu