Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a source electrode, a drain electrode, a gate electrode, and a third nitride-based semiconductor layer. The first nitride-based semiconductor layer has at least one trench. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and spaced apart from the trench. The source electrode and the drain electrode are disposed above the second nitride-based semiconductor layer. The gate electrode is disposed above the second nitride-based semiconductor layer and between the source and drain electrodes, so as to at least define a drift region between the gate electrode and the drain electrode and overlaps with the trench. The third nitride-based semiconductor layer is at least disposed in the trench and extends upward from the trench to make contact with the second nitride-based semiconductor layer.

Abstract: A semiconductor device and a method for manufacturing the same are provided in this disclosure. The semiconductor device includes a semiconductor heterostructure layer. The semiconductor heterostructure layer includes alternating first semiconductor material layers and second semiconductor material layers. Two-dimensional electron gas (2DEG) may be generated between each first semiconductor material layer and adjacent second semiconductor material layer. A conductive structure, including a plurality of conductive fingers extends from a surface of the semiconductor heterostructure layer into the semiconductor heterostructure layer. The plurality of conductive fingers are arranged in a direction substantially parallel to the surface. The lengths of the plurality of conductive fingers progressively increase in that direction so that an end portion of each conductive finger is respectively positioned in a different first semiconductor material layer and is in contact with the 2DEG.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers and a gate structure. The gate structure includes an outer spacer, an inner spacer and a gate electrode. The outer spacer has at least two opposite inner sidewalls to define a gate trench. The inner spacer is within the gate trench. The gate electrode disposed in the gate trench and covered by the inner spacer, wherein the inner spacer and the gate electrode extend downward to collaboratively form a bottom portion of the gate structure with a first width greater than a second width of a bottom surface of the gate electrode.

Abstract: A semiconductor device and a method for manufacturing the same are provided in this disclosure. The semiconductor device includes a semiconductor heterostructure layer. The semiconductor heterostructure layer includes alternating first semiconductor material layers and second semiconductor material layers. Two-dimensional electron gas (2DEG) may be generated between each first semiconductor material layer and adjacent second semiconductor material layer. A conductive structure, including a plurality of conductive fingers extends from a surface of the semiconductor heterostructure layer into the semiconductor heterostructure layer. The plurality of conductive fingers are arranged in a direction substantially parallel to the surface. The lengths of the plurality of conductive fingers progressively increase in that direction so that an end portion of each conductive finger is respectively positioned in a different second semiconductor material layer and is not in contact with the 2DEG.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes a semiconductor heterostructure layer and a conductive structure. The semiconductor heterostructure layer includes alternating first semiconductor material layers and second semiconductor material layers. 2DHGs may be generated between each first semiconductor material layer and adjacent second semiconductor material layer. The conductive structure includes a plurality of conductive fingers extending from a surface of the semiconductor heterostructure layer into the semiconductor heterostructure layer. The plurality of conductive fingers are arranged in a direction substantially parallel to the surface. The lengths of the plurality of conductive fingers progressively increase in that direction, so that an end portion of each conductive finger is respectively positioned in a different second semiconductor material layer and is not in contact with the 2DHG.

Abstract: The semiconductor device includes a substrate, a first nitride semiconductor layer disposed on the substrate, a second nitride semiconductor layer disposed on the first nitride semiconductor layer and having a bandgap greater than that of the first nitride semiconductor layer. The semiconductor device further includes a first gate conductor disposed on a first region of the second nitride semiconductor layer, a first source electrode disposed on a first side of the first gate conductor, a first field plate disposed on a second side of the first gate conductor, a first conductive terminal and a second conductive terminal disposed on a second region of the second nitride semiconductor layer, and a resistor formed in the first nitride semiconductor layer and electrically connected between the first conductive terminal and the second conductive terminal, wherein the resistor comprises at least one conductive region.

Abstract: A reaction chamber component for use in a deposition apparatus for depositing a layer of a first material on a substrate is provided. The component may have a base material being partially coated with a liner of the first material. The component may have a protective layer of a second material different than the first material on top of the liner of the first material to protect the component. This may be useful during a removal process for removing a parasitic coating of the same first material deposited during use of the reaction chamber component.

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a source electrode, a drain electrode, a gate electrode and a single field plate. The source electrode, the drain electrode, and the gate electrode are disposed on the second nitride-based semiconductor layer. The gate electrode is between the source and drain electrodes. The single field plate is disposed over the gate electrode and extends toward the drain electrode. The field plate has a first end part, a second end part and the central part. The first and the second end parts are located at substantially the same height. Portions of the central part are in a position lower than that of the first and second end parts, and the first end part extends laterally in a length greater than a width of the gate electrode.

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first nitride-based transistor, and a second nitride-based transistor. The first nitride-based transistor applies the 2DEG region as a channel thereof and comprising a first drain electrode that makes contact with the second nitride-based semiconductor layer to form a first Schottky diode with the second nitride-based semiconductor layer. The second nitride-based transistor applies the 2DEG region as a channel thereof and includes a second drain electrode that makes contact with the second nitride-based semiconductor layer to form a second Schottky diode with the second nitride-based semiconductor layer, such that the first Schottky diode and the second Schottky diode are connected to the same node.

Abstract: A semiconductor device includes a nitride-based transistor, a first metal layer, a second metal layer, a third metal layer, a source pad, and a drain pad. The first metal layer is disposed over the nitride-based transistor. The second metal layer is disposed over the first metal layer. The third metal layer is disposed over the second metal layer and includes a first pattern and a second pattern which are spaced apart from each other. The source pad is immediately above the first metal layer, the second metal layer, and the first pattern of the third metal layer and is electrically coupled with the nitride-based transistor. The drain pad is immediately above the first metal layer, the second metal layer, and the second pattern of the third metal layer and is electrically coupled with the nitride-based transistor.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a gate electrode, a first and a second field plates, and a first dielectric layer. The first field plate is disposed above the second nitride-based semiconductor layer. The second field plate is discontinuous and disposed above the second nitride-based semiconductor layer and in a position higher than the first field plate. The second field plate includes one or more enclosed discontinuities in a discontinuity region thereof. The first dielectric layer is disposed above the second field plate. The first dielectric layer covers and penetrates the second discontinuous field plate in the discontinuity region such that the second field plate encloses at least one portion of the first dielectric layer within its one or more enclosed discontinuities.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a first p-type doped nitride-based semiconductor layer, a first and a second electrodes. The first p-type doped nitride-based semiconductor layer is disposed above the second nitride-based semiconductor layer and has a bottom surface in contact with the second nitride-based semiconductor layer. The first p-type doped nitride-based semiconductor layer has a hydrogen concentration which decrementally decreases along a direction pointing from the bottom surface toward a top surface of the first p-type doped nitride-based semiconductor layer. The first electrode is disposed on the first p-type doped nitride-based semiconductor layer and in contact with the top surface of the first p-type doped nitride-based semiconductor layer. The second electrode is disposed above the second nitride-based semiconductor layer to define a drift region.

Abstract: A nitride-based semiconductor device includes a source electrode and a drain electrode, a first gate electrode, and a second gate electrode. The first gate electrode is disposed between the source electrode and the drain electrode. The first gate electrode includes a first gate bottom portion and a first gate top portion. The first gate top portion is located over the first gate bottom portion and wider than the first gate bottom portion. The second gate electrode is disposed above the first gate electrode and between the source electrode and the drain electrode. The second gate electrode includes a second gate bottom portion and a second gate top portion. The second gate bottom portion is in contact with the first gate bottom portion. The second gate top portion is located over the second gate bottom portion and wider than the second gate bottom portion.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a source electrode, a drain electrode, a passivation layer, a stress modulation layer and a gate electrode. The stress modulation layer is disposed over the second nitride-based semiconductor layer and extends along at least one sidewall of the passivation layer to make contact with the second nitride-based semiconductor layer, so as to form an interface. The gate electrode is disposed over the stress modulation layer and between the source and drain electrodes. The gate electrode is located directly above the interface of the stress modulation layer and the second nitride-based semiconductor layer.

Abstract: A nitride-based semiconductor device includes a buffer, a first nitride-based semiconductor layer, a shield layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. A first nitride-based semiconductor layer is disposed over the buffer. A shield layer is disposed between the buffer and the first nitride-based semiconductor layer and includes a first isolation compound that has a bandgap greater than a bandgap of the first nitride-based semiconductor layer, in which the first isolation compound is made of at least one two-dimensional material which includes at least one metal element. A second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap less than the bandgap of the first isolation compound and greater than the bandgap of the first nitride-based semiconductor layer. The pair of S/D electrodes and the gate electrode are disposed over the second nitride-based semiconductor layer.

Abstract: A semiconductor device includes a first to a third nitride-based semiconductor layers, a source electrode, a drain electrode and a gate electrode. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap less than a bandgap of the first nitride-based semiconductor layer, so as to form a heterojunction therebetween with a two-dimensional hole gas (2DHG) region. A third nitride-based semiconductor layer is embedded in the second nitride-based semiconductor layer and spaced apart from the first nitride-based semiconductor layer. The third nitride-based semiconductor layer is doped to have a first conductivity type different than that of the second nitride-based semiconductor layer.

Abstract: A nitride-based semiconductor device includes a first and a second nitride-based semiconductor layers, a source, a drain and a gate electrode, a doped nitride-based semiconductor layer, and a first field plate. The first field plate disposed over the doped nitride-based semiconductor layer. A vertical projection of the doped nitride-based semiconductor layer on the second nitride-based semiconductor layer overlaps with a vertical projection of the first field plate on the second nitride-based semiconductor layer, and a vertical projection of the gate electrode on the second nitride-based semiconductor layer is physically separated from the vertical projection of the first field plate on the second nitride-based semiconductor layer.

Abstract: A nitride-based semiconductor device includes a first and a second nitride-based semiconductor layers, a doped III-V semiconductor layer, a gate, a source electrode, and a drain electrode. The doped III-V semiconductor layer is disposed over the second nitride-based semiconductor layer and has opposite first sidewalls which recessed inward toward a body of the doped III-V semiconductor layer between the sidewalls to make a curved profile located at a bottom of the doped III-V semiconductor layer. The gate electrode is disposed above the doped III-V semiconductor layer. The source electrode and the drain electrode are disposed above the second nitride-based semiconductor layer. The gate electrode is located between the source and drain electrodes.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a doped nitride-based semiconductor layer, a plurality of negatively-charged ions, a source electrode, and a drain electrode. The negatively-charged ions are selected from a highly electronegative group and distributed within a plurality of depletion regions which extend downward from the doped nitride-based semiconductor layer and are located beneath the gate electrode. Any pair of the adjacent depletion regions are separated from each other. The source electrode is disposed above the second nitride-based semiconductor layer and spaced apart from the depletion regions. The drain electrode is disposed above the second nitride-based semiconductor layer and spaced apart from the depletion regions.

Abstract: A nitride-based semiconductor circuit includes a nitride-based semiconductor carrier, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, connectors, a connection line, and a power supply line. The first nitride-based semiconductor layer is disposed over the nitride-based semiconductor carrier. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The connectors are disposed on the second nitride-based semiconductor layer. The connection line electrically connects to one of the connectors. The power supply line electrically to the nitride-based semiconductor carrier. A heterojunction is formed between the first and the second nitride-based semiconductor layers. A potential difference is applied between the power supply line and the connection line.