Patents by Inventor Yuen Was Wong

Yuen Was Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11096671
    Abstract: Sparkle in color flow imaging is detected. Color flow data is estimated with different pulse repetition frequency (PRF). By correlating the color flow data estimated with different PRFs, sparkle is identified. Color flow images may be filtered to reduce motion while maintaining the sparkle region (e.g., kidney stone imaging) or reduce the sparkle region while maintaining motion (e.g., remove sparkle as system noise).
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: August 24, 2021
    Assignee: Siemens Medical Solutions USA, Inc.
    Inventors: Chi Hyung Seo, King Yuen Wong
  • Publication number: 20210257486
    Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a channel layer disposed on the substrate, and a barrier layer disposed on the channel layer. The semiconductor device further includes a dielectric layer disposed on the barrier layer and defining a first recess exposing a portion of the barrier layer. The semiconductor device further includes a first spacer disposed within the first recess, wherein the first spacer comprises a surface laterally connecting the dielectric layer to the barrier layer.
    Type: Application
    Filed: March 25, 2020
    Publication date: August 19, 2021
    Inventor: KING YUEN WONG
  • Publication number: 20210257475
    Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a barrier layer disposed above the substrate, and a dielectric layer disposed on the barrier layer and defining a first recess. The semiconductor device further includes a spacer disposed within the first recess and a gate disposed between a first portion of the spacer and a second portion of the spacer, wherein the gate defining a first recess.
    Type: Application
    Filed: March 25, 2020
    Publication date: August 19, 2021
    Inventor: KING YUEN WONG
  • Publication number: 20210202698
    Abstract: The present disclosure provides a high electron mobility transistor (HEMT). The HEMT includes a substrate, a buffer layer, a channel layer, a barrier layer, a source, a drain, and a gate. The substrate, the buffer layer, the channel layer, the barrier layer, the source, the drain, and the gate are stacked in sequence in a thickness direction of the HEMT. The channel layer includes a doped semiconductor structure. The present disclosure further provides a method for manufacturing an HEMT. The HEMT has good performance and has features such as low drain electric field intensity, a high breakdown voltage, high stability, and low costs.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 1, 2021
    Inventors: King Yuen WONG, Ronghui HAO, Jinhan ZHANG
  • Publication number: 20210202730
    Abstract: The present disclosure provides a high electron mobility transistor (HEMT). The HEMT includes a substrate, a buffer layer, a channel layer, a barrier layer, a source, a drain, and a gate. The substrate, the buffer layer, the channel layer, the barrier layer, the source, the drain, and the gate are stacked in sequence in a thickness direction of the HEMT. The barrier layer includes a first doped semiconductor structure, and the channel layer includes a second doped semiconductor structure. The present disclosure further provides a method for manufacturing an HEMT. The HEMT has features such as low drain electric field intensity, a high breakdown voltage, high stability, and low costs.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 1, 2021
    Inventors: Ronghui HAO, King Yuen WONG
  • Patent number: 11038025
    Abstract: The present disclosure, in some embodiments, relates to a method of forming a transistor device. The method may be performed by forming an anode and a cathode over an electron supply layer disposed on a semiconductor material. A doped III-N semiconductor material is formed over the electron supply layer, and an insulating material is formed over the electron supply layer and the doped III-N semiconductor material. The insulating material continuously extends from over the anode to over the cathode. The insulating material is patterned to form sidewalls of the insulating material that define an opening over the doped III-N semiconductor material. A gate structure is formed directly between the sidewalls of the insulating material and over the doped III-N semiconductor material.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: June 15, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
  • Patent number: 11011380
    Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformably over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: May 18, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Wei Tsai, King-Yuen Wong, Chih-Wen Hsiung, Ming-Cheng Lin
  • Patent number: 10991803
    Abstract: The present disclosure, in some embodiments relates to a semiconductor device. The semiconductor device includes a layer of semiconductor material disposed over a substrate and an electron supply layer disposed over the layer of semiconductor material between an anode terminal and a cathode terminal. A layer of III-N (III-nitride) semiconductor material is disposed over the electron supply layer. A passivation layer contacts an upper surface of the electron supply layer and further contacts an upper surface and a sidewall of the layer of III-N semiconductor material. A gate structure is separated from the layer of III-N semiconductor material by the passivation layer.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: April 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: King-Yuen Wong, Ming-Wei Tsai, Han-Chin Chiu
  • Patent number: 10971579
    Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a doped group III-V layer, a conductor structure, and a metal layer. The doped group III-V layer is disposed on the substrate. The conductor structure is disposed on the doped group III-V layer. The metal layer is disposed between the conductor structure and the doped group III-V layer.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: April 6, 2021
    Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
    Inventor: King Yuen Wong
  • Patent number: 10955395
    Abstract: In various embodiments the present invention is directed to a complex for use in detecting nitrite, a method for making the complex, and a method for detecting nitrite with the complex. The complex comprises a structure of Formula (I) where R1, R2, R3, R4, R5, R6, R7 and R8 are independently selected from hydrogen, a halogen atom, a C1-C4 straight or branched alkyl group, a C1-C4 straight or branched alkoxyl group, a phenyl group or a heterocyclic group, or any two of R1, R2, R3, R4, R5, R6, R7 and R8 together form a phenyl group and the others are independently selected from hydrogen, a halogen atom, a C1-C4 straight or branched alkyl group, a C1-C4 straight or branched alkoxyl group, or a hydroxyl group, where said phenyl group is optionally substituted with a C1-C4 alkyl group or a halogen atom; and wherein n is an integer selected from 0, 1 or 2.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: March 23, 2021
    Assignee: City University of Hong Kong
    Inventors: Chun-Yuen Wong, Hoi-Shing Lo
  • Patent number: 10945701
    Abstract: Flash suppression is provided in motion imaging. Separate regions of motion in a same frame or image are tested for flash independently. The size, shape, spatial variance, and/or location of a given region are used to categorize a level or likelihood of flash artifact for that region. Based on the level or likelihood, the motion information is altered to reduce flash.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: March 16, 2021
    Assignee: Siemens Medical Solutions USA, Inc.
    Inventors: King Yuen Wong, Chi Hyung Seo
  • Patent number: 10924107
    Abstract: Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: February 16, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chan-Hong Chern, Chu Fu Chen, Chun Lin Tsai, Mark Chen, King-Yuen Wong, Ming-Cheng Lin, Tysh-Bin Liu
  • Patent number: 10892047
    Abstract: Systems and methods of a cipher-based system for tracking a patient within a clinical pharmacy workflow, the system includes providing a meshed network having smart devices that communicate patient data with aggregators. The smart devices and aggregators located within the space form a meshed network, the aggregators communicate data to a computer in communication with a cloud-based network. A smart device with a mobile application wirelessly communicates with an internet system in communication with the cloud-based network. Receiving by the computer, information about the user smart device entering the meshed network by wireless tags positioned within the space.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: January 12, 2021
    Inventor: Sze Yuen Wong
  • Patent number: 10868134
    Abstract: A channel layer is grown over a substrate, and an active layer is grown over the channel layer, wherein the active layer has a band gap discontinuity with the channel layer. A dielectric layer is deposited over the active layer, and the dielectric layer is patterned to expose a portion of the active layer. A metal diffusion barrier is formed over the exposed portion of the active layer, and a gate is deposited over the metal diffusion barrier.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: King-Yuen Wong, Po-Chih Chen, Chen-Ju Yu, Fu-Chih Yang, Jiun-Lei Jerry Yu, Fu-Wei Yao, Ru-Yi Su, Yu-Syuan Lin
  • Patent number: 10868135
    Abstract: A high electron mobility transistor (HEMT) includes a silicon substrate, an unintentionally doped gallium nitride (UID GaN) layer over the silicon substrate. The HEMT further includes a donor-supply layer over the UID GaN layer, a gate structure, a drain, and a source over the donor-supply layer. The HEMT further includes a dielectric layer having one or more dielectric plug portions in the donor-supply layer and top portions between the gate structure and the drain over the donor-supply layer. A method for making the HEMT is also provided.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Ju Yu, Chih-Wen Hsiung, Fu-Wei Yao, Chun-Wei Hsu, King-Yuen Wong, Jiun-Lei Jerry Yu, Fu-Chih Yang
  • Patent number: 10833159
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a source, a drain, a gate structure, and a first p-type doped III-V compound/nitride semiconductor layer. The second semiconductor layer is disposed on the first semiconductor layer and has a bandgap greater than a bandgap of the first semiconductor layer. The source and the drain are disposed on the second semiconductor layer. The gate structure is disposed on the second semiconductor layer and between the source and the drain. The first p-type doped III-V/nitride semiconductor compound layer is disposed on the second semiconductor layer and between the gate structure and the drain with the drain at least partially covering the p-doped layer such that the first p-type doped III-V compound/nitride semiconductor layer and the drain are electrically coupled with each other.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: November 10, 2020
    Assignee: INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD.
    Inventors: Ronghui Hao, King Yuen Wong
  • Publication number: 20200350399
    Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a doped group III-V layer, a conductor structure, and a metal layer. The doped group III-V layer is disposed on the substrate. The conductor structure is disposed on the doped group III-V layer. The metal layer is disposed between the conductor structure and the doped group III-V layer.
    Type: Application
    Filed: September 9, 2019
    Publication date: November 5, 2020
    Inventor: KING YUEN WONG
  • Patent number: 10813626
    Abstract: In spectral pulsed wave Doppler imaging, spatial variance in signal and/or noise are reduced by combination of multiple spectra with at least partially decorrelated noise. Rather than requiring oversampling in time, the multiple spectra for one Doppler gate are created from different spatial signals. The Doppler gate is divided into sub-gates, the beamformed sample locations in the Doppler gate are grouped into two or more groups using any selection criterion, and/or different receive apertures are used to simultaneously sample the Doppler gate. Spectra for the gate are estimated from the samples with the different spatial content and then combined.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: October 27, 2020
    Assignee: Siemens Medical Solutions USA, Inc.
    Inventors: King Yuen Wong, Paul D. Freiburger
  • Patent number: 10811261
    Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: October 20, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Wei Tsai, King-Yuen Wong, Chih-Wen Hsiung, Ming-Cheng Lin
  • Patent number: 10804895
    Abstract: Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: October 13, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chan-Hong Chern, Chu Fu Chen, Chun Lin Tsai, Mark Chen, King-Yuen Wong, Ming-Cheng Lin, Tysh-Bin Lin